690 Pnr Jobs - Page 24

SUMMARY Part-Time Weekend Job Join Barbeque Nation’s Team in Mumbai Job Role: Weekend Supporting Staff Company: Barbeque Nation Location: Mumbai Work Locations: Andheri West (Infinity Mall) Lower Parel (High Street Phoenix Mall) Thane (Viviana Mall) Malad (Inorbit Mall) Vashi (Raghuleela Mall) Shift Timing: 12:00 PM 9:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 5,000 7,000 Work 9 hours and earn extra income every weekend Key Responsibilities: Assist kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orie...

Primary & Mandatory Skill: Python, Docker/Kubernetes Level: SA Client Round (Yes/ No): No Location Constraint if any : No Shift timing: 2-11pm JD: Good hands in Python scripting Experience in Docker & Kubernetes

Video Editing Intern Jaipur (In-office) - Digi Spheres Video Editing Intern Jaipur (In-office) Job Summary: We re seeking a creative and technically skilled Video Editing Intern to bring our content to life. You ll be responsible for editing short-form and long-form content for various platforms. Key Responsibilities: Edit videos, reels, and motion graphics for client campaigns Add music, text, transitions, and other visual effects Optimize content for Instagram, YouTube, and other platforms Collaborate with content creators and strategists for ideation Requirements: Proficiency in Premiere Pro, Final Cut Pro, or CapCut Strong sense of pace, timing, and narrative flow

Hiring for Travel Voice process UG/GRAD with Min 6 Months Exp in GDS mandatory Exp 6-18 Months Sal 34k In-hand, 18+ months Sal 50k In-hand Must Have SABRE/WORLDSPAN/Amadeus Knowledge 5 days working, 2 days Rotational offs Cabs in odds hours GGN LOC Required Candidate profile Its a proper voice process, Need Candidates with good Communications skills only, Interested WhatsApp/Call @ Sugandh 9910813775 komal 9811399344 Garvit 9811395422 Sahib 8448577782 Yash 9911862220 Perks and benefits Lucrative Incentives, Great growth opportunities

Greeting with HCL Tech! We were looking somebody who is having experience in Physical design Experience: 4 to 10 Years Location: Kochi JD#1 : 4-6years Tapeout experience in block level PnR implementation including synthesis for medium to complex blocks Good to have experience in TSMC/Intel lower technology node(16/14nm or below) Experience in independently analyzing/resolving congestion, timing issues and basic understanding of clock tree build Basic Timing understanding to independently analyze timing paths Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantage Basic equivalency check understanding. Good to have Conformal LEC experience. Should have understanding of basi...

* Perform Sub system level floor planning, placement, and routing for high-performance microprocessor design. * Collaborate with cross-functional teams to achieve design goals. * Close the design to meet timing, power, and area requirements. * Implement engineering change orders (ECOs) to rectify functional bugs and timing issues. * Ensure the quality and efficiency of the RTL to GDS2 implementation process. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8+ years of industry experience Good knowledge and hands on experience in physical design , timing and methodology which include logic synthesis, placement, clock tree s...

For our client, a travel company, having offices in Mumbai & Delhi, we are looking for professionals into Ticketing - DOMESTIC. Excellent command over English, pleasing and convincing personality, good to operate on travel ticketing sites & software. Required Candidate profile Experienced in Air ticketing, using software and sites for the same.. comparison between airlines, excellent communication skills. Budget for this opening is around 25,000. Work from Office.

Role & responsibilities Handling queries related to reservations, ticketing and other functional areas of Amadeus Creation and Issuance of tickets on Amadeus system Cancellation, reissue, refund, void etc. Any other tasks and duties as may be required by time to time. Mode of Service: On Call, Chat and Email. Preferred candidate profile Good Communication in English & Hindi must. Experience in travel industry with the working knowledge of Amadeus or other GDS is mandatory. Should match the Qualification Requirements.

Key Responsibilities: Floor planning: Develop and optimize floorplans for ASIC designs, ensuring optimal placement of cores, macros, and I/O cells while considering performance and manufacturability. Place & Route (P&R): Perform place-and-route tasks, optimizing for timing, power, and area, ensuring congestion-free routing and maximizing PPA (Performance, Power, Area). Static Timing Analysis (STA): Carry out static timing analysis to identify violations and work on techniques for timing closure such as resizing, retiming, or re-optimization. Power Analysis & Optimization: Perform power analysis, targeting low-power designs using techniques such as clock gating, power gating, and low-power st...

Role & responsibilities Job Description- REQUIRED KNOWLEDGE, SKILLS, AND ABILITIES : • Work experience with node 7nm or lower node designs with advanced low power techniques is must. • Experience on ASIC Physical Design: Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure, Physical Verification are essential part of the job. • Well versed with Cadence or Synopsys tools is important. • Experience with Static Timing Analysis in Primetime or Primetime-SI is important. • Hands-on experience in scripting languages such as PERL, TCL is important. • Timing closure on high-speed interfaces is a plus. • Knowledge on Full chip Physical Design is beneficial. • Good AS...

Collaborate with the design team for the implementation of various hard IPs and the SoC top level. Lead the top-level implementation of SoC designs, including IO ring integration. Utilize Synopsys Fusion Compiler for physical and WLM synthesis. Perform timing analysis and resolve timing issues related to implementation. Conduct DFT insertion and ensure robust design for testability. Execute place and route flows using Cadence Innovus and Synopsys Fusion Compiler. Manage chip-level and block-level design implementation. Design and analyze IO rings. Implement FlipChip SoC designs, including RDL routing. Ensure timing and design signoff, including STA, LVS, and DRC. Utilize tools such as Synops...

1. Hands on work on custom layout for analog blocks like High Speed SerDes and General purpose IO designs with Cadence Virtuoso on latest technologies like 5nm and below and also take leadership roles in delivery of IPs 2. Work on Floor planning, power design, signal routing strategy, EMIR awareness andparasitic optimisations 3. Understand and apply analog Layout techniques to ensure the design meets performance with minimum possible area and good yield. 4. Participate in building and enhancing layout flow for faster, higher quality design process. 5. Checking physical verifications like DRC/LVS/ERC/ANT/DFM and other IBM internal checks 6. Collaborate with Circuit Designers to solve challeng...

Greetings from ATPI Group!!! We are looking for a candidates with good knowledge in ticketing, ticket issue, reissue, ticket cancellation, GDS, Amadeus, Galileo, PNR creation, fresh bookings, reservations, etc. Position: Travel Consultant/Sr. Travel Consultant Experience: 1 to 15 years Qualification: HSC/Graduation/Post-Graduation Location: Nahur(WFO) Shift: Full Night Shifts (2 rotational week off) Job description: Ensures service delivery and customer satisfaction Proficient in all aspects of domestic and international travel includes air, car, hotel and rail. Process all reservations on behalf of client accounts air, land and other ancillary services Includes all reservation elements incl...

Travel Consultant – Intl Airfare & Group Bookings | Mumbai | 30–35K + incentives | 1–3 yrs exp | Handle group fares, GDS ticketing, corporate travel & visa guidance | Must have intl travel exp & GDS (Amadeus/Sabre/Galileo) skills.

SKS Enterpprises is looking for Manager/ Sr Manager - Placement to join our dynamic team and embark on a rewarding career journey Career Counseling: Provide guidance and career counseling to students or job seekers, helping them identify their skills, interests, and career goals Job Placement: Facilitate job placements by matching candidates with suitable job openings based on their qualifications and preferences Employer Engagement: Build and maintain relationships with employers, businesses, and organizations to understand their hiring needs and requirements Job Postings and Recruitment: Post job vacancies and coordinate recruitment processes, including conducting interviews and coordinati...

General Summary: Qualcomm is a global technology leader driving innovation to enable next-generation experiences and digital transformation for a smarter, connected future. As a Hardware Engineer specializing in Physical Design (PNR), you will take full ownership of the physical implementation of Qualcomm SoCs. This includes floor planning, placement, clock tree synthesis (CTS), optimization, signoff activities, and overall chip physical design flow on advanced process nodes (4nm, 5nm, 7nm, 10nm). You will collaborate with cross-functional teams to optimize performance, power, and area (PPA), and ensure robust timing closure and design integrity. This role demands strong expertise in state-o...

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Bachelor or Master degree from a top-tier institute. 6-11 years of experience in physical design from product-based companies. Experience: Proven experience in managing complex subsystems and small tea...

Physical Implementation activities for Subsystems whichincludes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Strongexpertisein timing convergence of high frequency data-path intensive Cores and advanced STA concepts we'll versed with the Block levelPnRconvergence with Synopsys ICC2/ CadenceInnovusand timing convergence in PTSI/Tempus in latest technology nodes Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issu...

Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Mast...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Mast...

Job Title: Lead RTL to GDS Engineer Block/Sub-System Level Company: Wafer Space an ACL Digital Group Location: Bangalore, India Experience: 7+ - 20+ Years Notice Period: Immediate to 30 Days Compensation: Best in Industry Overview: Wafer Space, part of ACL Digital , is actively hiring a Lead RTL to GDS Engineer with deep expertise in block/subsystem-level physical design and signoff for advanced SoC designs (7nm and below). The role involves leading full RTL to GDSII implementation, owning delivery, mentoring junior engineers, and collaborating across functions. We’re looking for professionals who are passionate about driving execution quality, solving complex physical design challenges, and...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview In this highly cross functional role, you will be part of the Global Design Enablement team responsible for the physical verification aspects of PDK development. You will conceptualize, develop, maintain and improve the Physical Verification flows. The role requires you to work on flow and rule deck development for various technology nodes utilizing the state of the art tools. You will be collaborating with the Custom Digital/Analog/Mixed Signal/RF, Physical design (PD) and Chip integration teams to understand their requirements and challenges and enabling flows to meets their needs. This role...