820 Physical Verification Jobs - Page 11

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

Qualcomm India Private Limited is looking for a Hardware Engineer to join their Engineering Group. As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, DSP systems, equipment and packaging, and test systems. The aim is to develop cutting-edge, world-class products and collaborate with cross-functional teams to meet performance requirements. Qualifications for this position include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with 4+ ye...

Alternate Job Titles: ASIC Physical Design Manager We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and accomplished leader with a deep-rooted expertise in ASIC physical design, ready to take on the challenge of managing complex chip projects from conception to tapeout. With 10-15 years of experience in the ...

About The Role This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; About The Role - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in ...

About The Role Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : SAP FI S/4HANA Accounting Good to have skills : SAP FI S/4HANA Central Finance Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your typical day will involve collaborating with various teams to ensure that application requirements are met, overseeing the development process, and providing guidance to team mem...

Responsible for Multi Voltage domain STA environment setup, execution and timing closure Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checksEnsuring timing correlation between PnR STA and timely feedbacks to PD teamGenerating block level HS session and using Top context from SoC for Block-SoC Interface timing closure Generating timing ECO using Tweaker/PrimeClosure

Food & Beverages Executive, Work Dynamics What this job involves: Prioritizing the facilities needs Working with both the facilities manager and the assistant facilities manager, you ll oversee the property s day-to-day operations and ensure that all administrative functions, security issues and facility services are covered. Likewise, you ll strive for continuous improvement in the process. Menu Planning and Execution: To liaise and develop weekly menus that cater to diverse tastes and dietary preferences. Conduct daily food tastings to maintain quality standards. Collaborate with vendors to refine menu offerings and address feedback. Special Event Planning: Prepare an Annual & Quarterly Ca...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

This position is for Physical Design and Timing Closure of complex, low power SoCs targeted for IOT and MCU markets. Candidate will be responsible to drive die area, performance, power goals for hierarchical blocks/Top. Candidate will work on various stages of physical design implementation which includes floorplanning, IO planning, packager co-design, power grid design, place and route, clock tree synthesis, timing closure, Static/Dynamic IRdrop, physical verification checks. Candidate is expected to have deep understanding and hands-on experience in implementing SOCs with multiple voltage islands, power islands and other power reduction techniques. Candidate should have good understanding ...

1. Deep Submicron Technology Experience: Hands-on experience with SYN/APR/Signoff and tapeout in deep submicron technology. 2. Familiarity with EDA Tools: Proficient in using EDA tools such as ICC, ICCII, and INNOVUS.3. ASIC Flow Knowledge: Well-versed in the ASIC design flow.4. Programming Skills: Proficient in Tcl, Perl, scripting, C, and C++ programming languages. 5. Strong Communication Skills: Excellent communication abilities. 6. Proactive and Responsible: Highly proactive, enthusiastic, and responsible. 7. Education and Experience: MS degree with at least 2 years of experience in the PnR field is preferred. 8. Large-Scale Design Experience: Experience handling designs with more than 2...

- Good knowledge on different types of Memory architecture. - Hands on experience on SRAM leafcell gds from scratch till top level integration. - Expertise in working on memory layout design for advanced nodes (TSMC : 7nm/5nm/3nm) is must. - Proficient in various physical verification flow debug, like DRC, LVS, DFM, PERC, ERC, EM, IR.. - Proficient in Cadence virtuoso layout editor and caliber Physical verification flow. - Synopsys Custom compiler experience is huge plus. - Understanding and working knowledge of good layout practices in lower process nodes like 7nm and 5nm. - Expertise working on FinFET architecture and challenges such as variability and manufacturability - Expertise in work...

In this role, you will be leading all block/chip level physical design activities. This includes tasks such as generating floor plans, abstract views, RC extraction, PNR, STA, EM, IR DROP, DRCs, and schematic to layout verification. Collaboration with the design team to address design challenges will be a key aspect of this position. You will also be assisting team members in debugging tool/design related issues and constantly seeking opportunities to enhance the RTL2GDS flow to improve power, performance, and area (PPA). Troubleshooting various design issues and applying proactive interventions will be part of your responsibilities. Your main responsibility will be overseeing all aspects of...

At AMD, we are dedicated to transforming lives with our cutting-edge technology to make a positive impact on our industry, communities, and the world. Our goal is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. Central to our mission is the AMD culture, where we continuously strive for innovation to address the world's most pressing challenges. We are committed to achieving excellence in execution while upholding values of directness, humility, collaboration, and inclusivity of diverse perspectives. As a SOC Physical Design Director at AMD, you will play a ...

Exciting opportunity awaits for Physical Verification Engineers at Digicomm Semiconductor Private Limited! Take your career to new heights and embark on a journey of professional growth and development with us. As a Physical Verification Engineer, you will play a crucial role in ensuring the accuracy and compliance of semiconductor designs with manufacturing rules and requirements. Your responsibilities will include running Design Rule Checking (DRC) using industry-standard tools, performing Layout vs. Schematic (LVS) verification, and verifying adherence to Electrical Rule Checking (ERC) standards. Collaboration with layout designers and manufacturing teams will be essential as you optimize...

As a Physical Design Engineer based in Bangalore, India with over 3 years of experience, you will be responsible for various aspects of physical design for SoC using Innovus. Your key responsibilities will include floorplanning, IO ring creation, understanding ESD and latch-up requirements for foundry, and implementation strategies for placement. You will need to demonstrate expertise in hierarchical design implementation, including partitioning, push down methodologies, core/tile PG creation, and knowledge of analog components placement based on design specifications. Additionally, RDL knowledge and experience working with packaging are essential for SoC floorplan design. A critical aspect ...

Job Description: Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. Check design layouts and detailed drawings. 3-5 years of experience. Qualification/Requirements: Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be abl...

Main Responsibilities: Ensure timely reporting of the consolidated actual performance, forecasts and targets whilst supporting the operations with analysis, advice and tools to optimize performance. Ensuring internal finance control and processes are maintained and followed in accordance with the statutory practices. Standard cost (PK) calculation and upload, Variance analysis monthly, Support in profitability, Support in profitability, Variance analysis monthly Preparation and validation of business cases and investment proposals Cost Centre/ Product wise Profitability Reporting & Monitoring CWIP Analysis & CAPEX Monitoring Analysis of Net Working Capital (improving DIP, Obsolete Slow movin...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...

The position will involve working with a very experienced physical design team of Server SOC and is responsible for delivering the physical design of tiles and FullChip to meet challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. THE PERSON: The ideal candidate has significant experience in industry, with good attitude who seeks new challenges and has good analytical and problem-solving skills. You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etcYou are meticulous about Power, Performanc...

THE ROLE: The position will involve working with a very experienced physical design team of Server SOC and is responsible for delivering the physical design of tiles and FullChip to meet challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. THE PERSON: The ideal candidate has significant experience in industry, with good attitude who seeks new challenges and has good analytical and problem-solving skills. You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collab...

The position will involve working with a very experienced physical design team of Server SOC and is responsible for delivering the physical design of tiles and FullChip to meet challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. THE PERSON: The ideal candidate has significant experience in industry, with good attitude who seeks new challenges and has good analytical and problem-solving skills. You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etcYou are meticulous about Power, Performanc...

The ideal candidate has significant experience in industry, with good attitude who seeks new challenges and has good analytical and problem-solving skills. You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc You are meticulous about Power, Performance and Area while driving schedule and managing cost. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, C...

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing ...