Senior Analog Layout Engineer

As an experienced Analog/Custom Layout Designer, your role involves designing and developing critical analog, mixed-signal, and custom digital layouts at both block and chip levels. Your expertise in using tools like Cadence VLE/VXL and Mentor Graphics Calibre for layout and verification is crucial for ensuring high-quality layout verification, including performing LVS/DRC/Antenna checks. Key Responsibilities: - Deliver block-level layouts on time with optimal quality - Address complex physical verification challenges in custom layout design - Play a key role in ensuring high-quality execution within project deadlines - Guide junior engineers by reviewing sub-block level layouts and critical elements Qualifications Required: - At least 5 years of experience in analog/custom layout design in advanced CMOS processes - Expertise in TSMC 3nm, 5nm, and 7nm nodes - Strong problem-solving skills in physical verification (LVS/DRC/Antenna checks) - Ability to mentor junior engineers and review complex layouts - Excellent communication and project management skills (Note: No additional details about the company were mentioned in the job description.),