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Physical Design Engineer

Physical Design Engineer

MosChip

3 - 13 years

0 Lacs

hyderabad telangana

Posted:1 day ago| Platform: Shine logo

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Skills Required

placement clock tree synthesis floor planning pr extraction scripting languages perl physical verification static timing analysis primetime toplevel floor planning pg planning partitioning scanchainreordering timing optimization si aware routing timing analysisclosure eco tasks si closure design rule checks logical vs schematic checks antenna checks low power design voltage islands power gating substratebias techniques timing closure on ddr2ddr3pcie interfaces asic physical design ir drop analysis timing signal integrity closure cadence synopsys magma physical design tools tcl primetimesi

Work Mode

On-site

Job Type

Full Time

Job Description

As an experienced physical design engineer with a B. Tech / M. Tech (ECE) background and 3 to 13 years of experience, you will be responsible for a variety of tasks including top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs). Your expertise in SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, as well as experience in working on 65nm or lower node designs with advanced low power techniques, will be crucial for success in this role. Key Responsibilities: - Provide technical guidance and mentoring to physical design engineers. - Interface with front-end ASIC teams to resolve issues. - Implement Low Power Design techniques such as Voltage Islands, Power Gating, and Substrate-bias. - Ensure timing closure on DDR2/DDR3/PCIE interfaces. - Utilize your strong background in ASIC Physical Design for tasks like Floor planning, P&R, extraction, IR Drop Analysis, and Timing and Signal Integrity closure. - Work with Cadence, Synopsys, or Magma physical Design Tools. - Develop expertise in scripting languages like PERL and TCL. - Perform Static Timing Analysis in Primetime or Primetime-SI. - Demonstrate good written and oral communication skills, including the ability to clearly document plans. - Collaborate with different teams and prioritize work based on project needs. Qualifications Required: - B. Tech / M. Tech in Electronics and Communication Engineering. - 3 to 13 years of experience in physical design engineering. - Extensive knowledge of Cadence, Synopsys, or Magma physical Design Tools. - Proficiency in scripting languages such as PERL and TCL. - Strong background in ASIC Physical Design with expertise in Low Power Design techniques. - Excellent communication skills to effectively interact with various teams and stakeholders. (Note: Additional details about the company were not provided in the job description.),

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Physical Design Engineer