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10.0 - 14.0 years

0 Lacs

karnataka

On-site

You should have over 10 years of experience and expertise in various aspects of analog layout and high-performance cores within the semiconductor industry. This includes working on planar and finfet technology nodes, executing mixed signal layout, and collaborating with circuit designers and CAD engineers to design custom analog mixed signal blocks. Your role will involve transistor level floorplan design in a multi-voltage, mixed-signal environment, utilizing techniques such as device matching, shielding, and minimizing parasitics. As the IC mask layout designer, you will be responsible for the physical verification of custom analog/RF mixed signal designs at both block/module and IO/ESD levels. Meeting delivery and revenue targets, managing technical teams, and ensuring customer satisfaction are key aspects of this role. Additionally, you should be prepared to work at customer sites and travel worldwide as needed, developing and driving business and technology strategies that align with the organization's long-term missions. Your responsibilities will also include liaising with partners, overseeing all sectors of the business, and providing leadership and direction to operations, projects, and staff. Building strategic partnerships and collaborating with external parties will be essential for the growth and competitiveness of the company.,

Posted 1 week ago

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5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

As an experienced Analog/Custom Layout Designer, you will be responsible for designing and developing critical analog, mixed-signal, and custom digital layouts at both block and chip levels. Your expertise in using Cadence VLE/VXL and Mentor Graphics Calibre for layout and verification will be crucial in ensuring high-quality layout verification, including performing LVS/DRC/Antenna checks. You will be expected to deliver block-level layouts on time with optimal quality while also addressing complex physical verification challenges in custom layout design. Working in multiple project environments, you will play a key role in ensuring high-quality execution within project deadlines and guiding junior engineers by reviewing sub-block level layouts and critical elements. Collaboration is essential in this role, as you will need to work effectively with local engineering teams to contribute to project success. Your ability to contribute to project management and ensure a smooth workflow will be highly valued. To excel in this position, you should have at least 5 years of experience in analog/custom layout design in advanced CMOS processes, with expertise in TSMC 3nm, 5nm, and 7nm nodes. Strong problem-solving skills in physical verification (LVS/DRC/Antenna checks), the ability to mentor junior engineers, review complex layouts, and excellent communication and project management skills are essential. This is a full-time position with a day shift schedule, and the work location is in person.,

Posted 1 month ago

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