16 Power Gating Jobs

Qualcomm India Private Limited is seeking a skilled Hardware Engineer to join the Engineering Group. In this role, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to contribute to the development of world-class products. Collaboration with cross-functional teams will be essential to meet performance requirements and drive innovation. The ideal candidate should possess a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with a minimum of 4 years of Hardware Engineering experience. Alternatively, a Master's degree...

Qualcomm India Private Limited is seeking a skilled Hardware Engineer to join the Engineering Group, specifically within the Hardware Engineering department. In this role, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. Your work will involve a wide range of tasks including bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to facilitate the launch of cutting-edge, world-class products. Collaboration with cross-functional teams is crucial to develop solutions and meet performance requirements effectively. To be considered for this position, you...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems for cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions and meet performance requirements. Minimum Qualifi...

As a skilled ASIC/SoC Verification Engineer, you will be responsible for defining and implementing a power-aware verification strategy using UPF (IEEE 1801). Your role will involve integrating power intent into simulation environments, verifying power management features, and developing power-aware test benches and test cases in System Verilog/UVM. You will run simulations, debug failures, and ensure design functionality across power states. Collaboration with RTL designers and architects to ensure correct power domain partitioning and isolation will be a key aspect of your responsibilities. Additionally, you will perform static checks for power intent correctness using tools such as Synopsy...

As an ASIC Design Engineer specializing in UPF and Low Power Design, you will be responsible for owning and driving RTL design for complex digital blocks with multiple power domains. Your role will involve defining, implementing, and validating power intent using UPF 2.0/3.0 for ASIC and SoC designs. Collaboration with verification and physical design teams will be crucial to ensure correct propagation and verification of power intent across the flow. You will work closely with architecture teams to define low power design strategies including power gating, clock gating, and multi-voltage domains. Additionally, analyzing and debugging power-related issues during RTL and gate-level simulation...

As an Electrical Engineer in the field of VLSI (Silicon engineering), you should hold a Bachelors or Masters degree in Electrical Engineering or a related field (BE/BTech/M.E/M.Tech). Your communication skills, both verbal and written, should be excellent. With a minimum of 8 years of experience in functional Design Verification (DV), you are expected to have proficiency in low-power UPF-based verification and possess strong debugging skills. Your skills should include an in-depth understanding of power gating and power management techniques, along with familiarity with AXI and SMN protocols. Previous experience with AMD is considered advantageous. This full-time position is open in Bangalor...

As a candidate for this position, you should hold a Bachelor's degree in Electronics or Computer Engineering/Science, or possess equivalent practical experience. With a minimum of 8 years of experience in SoC power modeling and analysis, you should also have a solid understanding of SOC architecture and power techniques. A Master's degree or PhD in Electronics, Computer Engineering, or Computer Science would be considered a preferred qualification. Additionally, experience with ASIC design flows and knowledge of low power architecture and power optimization techniques such as multi Vth/power/voltage domain design, clock gating, power gating, and Dynamic Voltage Frequency Scaling would be adv...

KEY RESPONSIBLITIES: SoC Design and Microarchitecture Lead Translate high level SoC architecture to microarchitecture details to help SoC implementation and verification Expertise in SoC Chip Pervasive Logic Clock, Reset and Power microarchitecture and design Expertise in SoC Low Power Design Handling voltage and clock domain crossings, Power Gating and Retention, Power States Expertise in industry standard bus protocols - AMBA Understanding of SoC Architecture, Boot flows, Chip initialization, Fuse distribution, power sequence, reset sequence, clock sequence Understanding of SoC RTL Integration Understanding of SoC implementation flows Synthesis and Physical Design ACADEMIC CREDENTIALS: Bac...

KEY RESPONSIBLITIES: SoC Design and Microarchitecture Lead Translate high level SoC architecture to microarchitecture details to help SoC implementation and verification Expertise in SoC Chip Pervasive Logic Clock, Reset and Power microarchitecture and design Expertise in SoC Low Power Design Handling voltage and clock domain crossings, Power Gating and Retention, Power States Expertise in industry standard bus protocols - AMBA Understanding of SoC Architecture, Boot flows, Chip initialization, Fuse distribution, power sequence, reset sequence, clock sequence Understanding of SoC RTL Integration Understanding of SoC implementation flows Synthesis and Physical Design ACADEMIC CREDENTIALS: Bac...

RTL/Integration- Design Engineer Work Location : Bengaluru, Whitefield Qualification : 5-10 years full-time experience in IP hardware design Mode of interview : Virtual Availability to join: candidates who can join in 30-45 Days are preferred. Normal Working Hours, 5 days a week Work Mode : Work from Office The Project and role : As a member of the Computing and Graphics group , you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. The Person: The ideal candidate will have experience developing RTL for IP or ...

We are seeking a skilled and highly motivated Physical Design Engineer to join our team. The ideal candidate will be responsible for the independent planning and execution of the entire Netlist-to-GDSII flow, demonstrating a strong understanding of all physical design aspects and methodologies. This role requires technical expertise, problem-solving abilities, and the capacity to guide junior engineers. Roles and Responsibilities: Responsible for independent planning and execution of the Netlist-to-GDSII flow. Demonstrate strong exposure to all aspects of design flows, including floor planning, placement, Clock Tree Synthesis (CTS), routing, crosstalk analysis, and physical verification . Po...

You should have at least 8 years of experience in Micro-architecture, SoC development, and full-chip design for multi-million gate SoCs. Your expertise should include a strong understanding of the design convergence cycle, encompassing architecture, micro-architecture, Verification, Synthesis, and timing closure. You should also be adept at managing IP dependencies and planning front-end design tasks effectively. Additionally, you should have experience in designing and developing high-speed serial IO protocols. Your skills should cover the implementation of clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, and low power modes. Experience in CPU...

Qualcomm India Private Limited is looking for a passionate STA and Synthesis Engineer to join their Engineering Group in Chennai. As an integral part of the cross-functional engineering teams, you will be engaged in all phases of design and development cycles, specifically focusing on Synthesis, Static Timing Analysis, and LEC of SoC/Cores. Your responsibilities will include full chip and block level timing closure, IO budgeting for blocks, logical equivalence checks between RTL to Netlist and Netlist to Netlist, as well as implementing low-power techniques such as clock gating, power gating, and MV designs. Additionally, you will be involved in ECO timing flow and should be proficient in sc...

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on a wide range of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems to develop cutting-edge products. You will collaborate with cross-functional teams to ensure that the solutions meet performance requirements and contribute to the overall success of the projects. The ideal candidate for this role should possess a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at lea...

Qualcomm India Private Limited is seeking a talented Hardware Engineer to join their Engineering Group under the Hardware Engineering division. As a part of Qualcomm, a leading technology innovator, you will play a crucial role in designing, optimizing, and testing electronic systems to contribute to the development of cutting-edge, world-class products. Collaborating with cross-functional teams, you will work towards creating solutions that meet performance requirements and drive digital transformation in the smart, connected future. To qualify for this position, you should hold a Bachelor's or Master's degree from a prestigious institute and possess a minimum of 6 to 10 years of experience...

y Low Power UPF Front-End Design Engineer :- Bangalore Founded in 2023,by Industry veterans HQ in California,US We are revolutionizing sustainable AI compute through intuitive software with composable silicon Low Power UPF Front-End Design Engineer :- Job Description: Deep expertise in low-power architecture, UPF-based power intent implementation, and front-end RTL methodologies. This role requires close collaboration with system architects, RTL design engineers, and back-end teams. Technical Requirement: Define and develop low-power architecture and strategies using Unified Power Format (UPF) Drive power intent specification, verification, and validation through all phases of the design lif...