30 Power Gating Jobs

Role Overview: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be part of the Engineering Group, focusing on Hardware Engineering. Your role involves planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements, pushing the boundaries of technology to enable next-generation experiences. Key Responsibilities: - Plan, design, optimize, verify, and test electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems - Collaborate with ...

In this role, you will be responsible for defining and implementing a power-aware verification strategy using UPF (IEEE 1801). Your key responsibilities will include: - Integrate power intent into simulation environments and verify power management features. - Develop and maintain power-aware test benches and testcases in System Verilog/UVM. - Run simulations, debug failures, and ensure design functionality across power states. - Collaborate with RTL designers and architects to ensure correct power domain partitioning and isolation. - Perform static checks for power intent correctness using tools such as Synopsys VC LP or Cadence Conformal Low Power. - Ensure compliance of low-power implemen...

You are seeking highly skilled and motivated DFT-DV Engineers to join the dynamic team in Bangalore. As a DFT-DV Engineer, you will play a pivotal role in ensuring the quality and reliability of digital designs through Design for Test (DFT) and Design Verification (DV) methodologies. The ideal candidates should possess a minimum of 4 to 7+ years of experience in the field, with a strong background in DFT DV flow, JTAG, MBIST, SCAN, PG, PHY-LP, and BSCAN. - DFT Implementation: Collaborate with design and verification teams to define and implement DFT strategies and methodologies that enable efficient testing of complex digital designs. - Scan and ATPG: Develop and maintain scan insertion, Aut...

Job Overview We are seeking highly skilled SOC (System-on-Chip) Power Architects to join our diverse team. If you are a self-motivated SoC engineer with expertise in Architecting solutions for managing power and thermals and looking to make a difference in an innovative and inclusive team, you have found the right place! Responsibilities As an SoC Power Architect, you will be accountable for gathering requirements, prototyping and developing the SOC Level power and thermal management architecture, ensuring the efficient and effective use of system resources. You must be able to resolve complex issues throughout the development lifecycle. You will work with partners, OEMs and internal hardwar...

Role Overview: You will be responsible for understanding the design convergence cycle, including architecture, micro-architecture, verification, synthesis, and timing closure. Your expertise will be crucial in managing IP dependencies, planning front-end design tasks, and designing high-speed serial IO protocols. Additionally, you will need to implement clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, and low power modes. Experience in CPU, bus fabrics, or coherence/noncoherent NOC domains will be highly beneficial. Your excellent communication and interpersonal skills will be essential for effective collaboration in a fast-paced, product-orien...

As an experienced physical design engineer with a B. Tech / M. Tech (ECE) background and 3 to 13 years of experience, you will be responsible for a variety of tasks including top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs). Your expertise in SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, as well as experience in working on 65nm or lower node designs with advanced low power techniques, will be crucial for success in this role. Key Responsibilities: - Provide technical guidance and mentoring to phy...

Senior RTL(ASIC) Design Engineers Experience : 5+ years Location : Bangalore SILICON DESIGN ENGINEER THE ROLE: As a member of the Computing and Graphics group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. RTL/Integration- Design Engineer The Person: The ideal candidate will have experience developing RTL for IP or subsystems and understand architectural specifications. Responsibilities include IP and subsystem design, integrating multiple IPs, performing quality checks and working collaboratively wit...

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on cutting-edge products involving circuits, mechanical systems, Digital/Analog/RF/optical systems, test systems, FPGA, and/or DSP systems. Collaboration with cross-functional teams will be essential to develop innovative solutions and meet performance requirements. Key Responsibilities: - Require 6-12 years of experience in physical design from product-based/EDA companies. - Expertise in DDRPhy/PCIE-high speed interface PD or 3DIC. - Experience in Timing Signoff with SNPS/CDNS tools. -...

As a passionate and highly motivated engineer at NVIDIA, you will be responsible for working on architectural power estimation for the world's leading GPUs and SOCs. Your role will involve developing advanced power models to estimate chip and board power under product-driven use cases. You are expected to understand the high-level chip architecture, application use-cases, low power design techniques, and process technology aspects that impact dynamic and leakage power. Your tasks will include developing the estimation infrastructure and estimating power consumption under various scenarios. Collaboration with architecture, design, synthesis, timing, circuit, and post-silicon teams will be ess...

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems for cutting-edge products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. **Key Responsibilities:** - Manage complex subsystems and small teams effectively. - Proficiency in synthesis, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off ...

NVIDIA is seeking a passionate, creative, and highly motivated engineer to work on architectural power estimation for the world's leading GPUs and SOCs. In this position, the responsibility includes development of advanced power models to estimate chip and board power under product driven use cases. You are expected to understand the high-level chip architecture, application use-cases, low power design techniques, process technology aspects which impact dynamic and leakage power, develop the estimation infrastructure, estimate power consumption under various scenarios. You will be working with architecture, design, synthesis, timing, circuit, and post silicon teams to accomplish your tasks. ...

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems including circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. Key Responsibilities: - Minimum 10 to 14 years of experience in physical design from product-based/EDA companies - Expertise in DDRPhy /PCIE-high speed interface PD or 3DIC - Experience with Timing Signoff using SNPS/CDNS tools - Knowledge of PDN: IR signoff and Physical veri...

As a Hardware Engineer at Qualcomm India Private Limited, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems, including circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems. Your role will involve developing cutting-edge products and collaborating with cross-functional teams to ensure that the solutions meet performance requirements and contribute to the projects" success. Key Responsibilities: - Plan, design, optimize, verify, and test electronic systems - Work on circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems - Develop cu...

Role Overview: You will be joining Qualcomm India Private Limited's Hardware Engineering division as a Hardware Engineer, where you will be responsible for designing, optimizing, and testing electronic systems to contribute to the development of cutting-edge products. Collaborating with cross-functional teams, you will work towards creating solutions that drive digital transformation in the smart, connected future. Key Responsibilities: - Manage complex subsystems and small teams - Utilize expertise in RTL2GDS, including Floorplan, place and route (PnR), and sign-off convergence - Meet demanding Power, Performance, and Area (PPA) requirements for complex subsystems and System on Chips (SoCs)...

Qualcomm India Private Limited is seeking a skilled Hardware Engineer to join the Engineering Group. In this role, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to contribute to the development of world-class products. Collaboration with cross-functional teams will be essential to meet performance requirements and drive innovation. The ideal candidate should possess a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with a minimum of 4 years of Hardware Engineering experience. Alternatively, a Master's degree...

Qualcomm India Private Limited is seeking a skilled Hardware Engineer to join the Engineering Group, specifically within the Hardware Engineering department. In this role, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. Your work will involve a wide range of tasks including bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to facilitate the launch of cutting-edge, world-class products. Collaboration with cross-functional teams is crucial to develop solutions and meet performance requirements effectively. To be considered for this position, you...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems for cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions and meet performance requirements. Minimum Qualifi...

As a skilled ASIC/SoC Verification Engineer, you will be responsible for defining and implementing a power-aware verification strategy using UPF (IEEE 1801). Your role will involve integrating power intent into simulation environments, verifying power management features, and developing power-aware test benches and test cases in System Verilog/UVM. You will run simulations, debug failures, and ensure design functionality across power states. Collaboration with RTL designers and architects to ensure correct power domain partitioning and isolation will be a key aspect of your responsibilities. Additionally, you will perform static checks for power intent correctness using tools such as Synopsy...

As an ASIC Design Engineer specializing in UPF and Low Power Design, you will be responsible for owning and driving RTL design for complex digital blocks with multiple power domains. Your role will involve defining, implementing, and validating power intent using UPF 2.0/3.0 for ASIC and SoC designs. Collaboration with verification and physical design teams will be crucial to ensure correct propagation and verification of power intent across the flow. You will work closely with architecture teams to define low power design strategies including power gating, clock gating, and multi-voltage domains. Additionally, analyzing and debugging power-related issues during RTL and gate-level simulation...

As an Electrical Engineer in the field of VLSI (Silicon engineering), you should hold a Bachelors or Masters degree in Electrical Engineering or a related field (BE/BTech/M.E/M.Tech). Your communication skills, both verbal and written, should be excellent. With a minimum of 8 years of experience in functional Design Verification (DV), you are expected to have proficiency in low-power UPF-based verification and possess strong debugging skills. Your skills should include an in-depth understanding of power gating and power management techniques, along with familiarity with AXI and SMN protocols. Previous experience with AMD is considered advantageous. This full-time position is open in Bangalor...

As a candidate for this position, you should hold a Bachelor's degree in Electronics or Computer Engineering/Science, or possess equivalent practical experience. With a minimum of 8 years of experience in SoC power modeling and analysis, you should also have a solid understanding of SOC architecture and power techniques. A Master's degree or PhD in Electronics, Computer Engineering, or Computer Science would be considered a preferred qualification. Additionally, experience with ASIC design flows and knowledge of low power architecture and power optimization techniques such as multi Vth/power/voltage domain design, clock gating, power gating, and Dynamic Voltage Frequency Scaling would be adv...

KEY RESPONSIBLITIES: SoC Design and Microarchitecture Lead Translate high level SoC architecture to microarchitecture details to help SoC implementation and verification Expertise in SoC Chip Pervasive Logic Clock, Reset and Power microarchitecture and design Expertise in SoC Low Power Design Handling voltage and clock domain crossings, Power Gating and Retention, Power States Expertise in industry standard bus protocols - AMBA Understanding of SoC Architecture, Boot flows, Chip initialization, Fuse distribution, power sequence, reset sequence, clock sequence Understanding of SoC RTL Integration Understanding of SoC implementation flows Synthesis and Physical Design ACADEMIC CREDENTIALS: Bac...

KEY RESPONSIBLITIES: SoC Design and Microarchitecture Lead Translate high level SoC architecture to microarchitecture details to help SoC implementation and verification Expertise in SoC Chip Pervasive Logic Clock, Reset and Power microarchitecture and design Expertise in SoC Low Power Design Handling voltage and clock domain crossings, Power Gating and Retention, Power States Expertise in industry standard bus protocols - AMBA Understanding of SoC Architecture, Boot flows, Chip initialization, Fuse distribution, power sequence, reset sequence, clock sequence Understanding of SoC RTL Integration Understanding of SoC implementation flows Synthesis and Physical Design ACADEMIC CREDENTIALS: Bac...

RTL/Integration- Design Engineer Work Location : Bengaluru, Whitefield Qualification : 5-10 years full-time experience in IP hardware design Mode of interview : Virtual Availability to join: candidates who can join in 30-45 Days are preferred. Normal Working Hours, 5 days a week Work Mode : Work from Office The Project and role : As a member of the Computing and Graphics group , you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. The Person: The ideal candidate will have experience developing RTL for IP or ...

We are seeking a skilled and highly motivated Physical Design Engineer to join our team. The ideal candidate will be responsible for the independent planning and execution of the entire Netlist-to-GDSII flow, demonstrating a strong understanding of all physical design aspects and methodologies. This role requires technical expertise, problem-solving abilities, and the capacity to guide junior engineers. Roles and Responsibilities: Responsible for independent planning and execution of the Netlist-to-GDSII flow. Demonstrate strong exposure to all aspects of design flows, including floor planning, placement, Clock Tree Synthesis (CTS), routing, crosstalk analysis, and physical verification . Po...