Job
Description
As a candidate for this position, you should hold a Bachelor's degree in Electronics or Computer Engineering/Science, or possess equivalent practical experience. With a minimum of 8 years of experience in SoC power modeling and analysis, you should also have a solid understanding of SOC architecture and power techniques. A Master's degree or PhD in Electronics, Computer Engineering, or Computer Science would be considered a preferred qualification. Additionally, experience with ASIC design flows and knowledge of low power architecture and power optimization techniques such as multi Vth/power/voltage domain design, clock gating, power gating, and Dynamic Voltage Frequency Scaling would be advantageous. Join a diverse team that is dedicated to pushing boundaries and developing custom silicon solutions to power the future of Google's direct-to-consumer products. Your contribution to the innovation behind products loved by millions worldwide will be crucial. Your expertise will play a significant role in shaping the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. At Google, our mission is to organize the world's information and make it universally accessible and useful. The Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. Through research, design, and development of new technologies and hardware, we aim to enhance user interaction with computing, making it faster, seamless, and more powerful. The Devices & Services team is dedicated to improving people's lives through technology by exploring new ways to capture and sense the world, advancing form factors, and enhancing interaction methods. Your responsibilities in this role will include defining power requirements for an SoC to optimize Power-Performance-Area (PPA) under current and thermal constraints. You will define power KPIs and SoC/IP-level power goals, guide architecture, design, implementation, and software to achieve power goals, and track power throughout the design cycle. Additionally, you will propose and drive power optimizations throughout the design process, perform algorithm development, modeling, and analysis of various power approaches, and lead power-performance trade-off analysis for engineering reviews and product roadmap decisions.,
