3.0 - 13.0 years

0 Lacs

hyderabad, telangana

On-site

As an experienced physical design engineer with a B. Tech / M. Tech (ECE) background and 3 to 13 years of experience, you will be responsible for a variety of tasks including top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs). Your expertise in SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, as well as experience in working on 65nm or lower node designs with advanced low power techniques, will be crucial for success in this role. Key Responsibilities: - Provide technical guidance and mentoring to phy...

Posted 1 month ago

AI Match Score

Apply

Physical Design Lead CRB Tech Solutions Pvt. Ltd

5.0 - 9.0 years

0 Lacs

delhi

On-site

As a Physical Design Implementation Engineer in the semiconductor/ASIC industry, your role will involve various tasks on advanced technology nodes such as 28nm and 20nm. You will be responsible for block level floor planning, PG planning, partitioning, placement, scan-chain reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks encompassing both timing and functional ECOs. Additionally, you will handle SI closure, design rule checks (DRC), Logical vs. Schematic (LVS) checks, and Antenna checks. It is crucial to possess a solid understanding of low power concepts, top-level physical design, partitioning, timing constraints, and IR Drop....

Posted 1 month ago

AI Match Score

Apply

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.