Job
Description
As an experienced Physical Design Engineer at Aion Silicon, your role will involve block development and potentially full chip responsibility, taking designs from RTL to GDS. You will have the opportunity to work in a dynamic physical implementation design team and contribute to the development of high-quality, cutting-edge designs. Key Responsibilities: - Contribute to physical design projects independently, delivering high-quality results with minimal supervision. - Address and resolve moderate complexity design challenges by applying sound judgment and quantitative analysis. - Take ownership of various aspects of the physical design flow, ensuring timely and accurate delivery from RTL to GDS. - Manage multiple assignments from different customers or teams, meeting deadlines and quality standards. - Collaborate with experienced team members to resolve design issues and apply expertise in physical design tools and techniques. - Demonstrate proficiency in tools such as Synthesis, PnR, Formal verification, Custom layout techniques, Analog simulation, or Chip finishing. - Contribute to the development of technical white papers and presentations. - Support sales activities, including Statement of Work preparation. - Maintain accurate timekeeping and effectively manage your workload. - Execute design tasks efficiently, adhere to best practices, and maintain a high standard of work. Key Relationships: Internal: - Reports to: Engineering Manager/Principal Engineer - Collaborates with: Engineers, Senior Engineers, Principal Engineers, Project Managers, Sales, Finance, and HR teams - Supervises: Physical Design Team (2-3 engineers) External: - Customers: Minimal technical engineer-to-engineer communication - Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses Qualifications: Essential: - A degree, Master's, or PhD in a relevant subject. - 5+ years of experience in physical design and implementation. Desirable: - Master's or PhD in a related subject with 5+ years of practical experience. Skills & Experience: Essential: - Good tapeout experience on multiple technologies (e.g., 5nm, 7nm, 12nm, 28nm). - Experience with physical verification checks (e.g., DRC, LVS, ANTENNA, ERC). - Solid understanding of synthesis, floorplanning, placement, CTS, routing, and STA concepts. - Proficiency in tools such as Synopsys ICC, Cadence EDI, Mentor Olympus, Synopsys DC, Cadence RC, Formality, Formalpro, Mentor Calibre, Synopsys IC Validator. - Strong scripting skills in Tcl, Perl, or Python. - Project management skills and ability to deliver results on time. Desirable: - Broad knowledge across multiple sub-functions within physical design. - Ability to contribute to multi-disciplinary teams. Attributes: - Excellent self-organisation and adaptability to changing priorities. - Strong leadership skills for managing and guiding a small team. - Ability to work under pressure and manage multiple projects simultaneously. - Strong problem-solving skills and attention to detail. - Self-motivated with a commitment to delivering high-quality results. If you are passionate about pushing the boundaries of digital design and have a keen interest in technology and leadership, Aion offers you the opportunity to join an innovative and collaborative team in Barcelona, working on cutting-edge ASIC designs. This role provides significant responsibility and the chance to influence key projects. Aion welcomes skilled Physical Design Engineers who are eager to take on challenges and make a difference.,