FPGA Engineer – Spatial Vision Intelligence

Mission

next-generation AI chip for spatial vision intelligence

latency, thermal, and bandwidth limits at the chip level

world-leading semiconductor partner

Role Overview

Lead FPGA / AI Chip Engineer

This role is for a builder: someone who writes RTL, debugs boards, closes timing, and ships silicon-proximate systems—while setting technical direction through execution, not documentation.

core spatial vision and intelligence pipelines

What You Will Do (Hands-On)

FPGA-based pipelines

• Real-time image and sensor capture
• Spatial vision and contextual understanding
• AI pre-processing and on-device intelligence supporting LLMs
• Write and maintain

  production-quality RTL

  (Verilog / SystemVerilog / VHDL)
• Build

  deterministic, ultra-low-latency datapaths

  with tight power and thermal budgets
• Implement and tune

  memory and data movement

  (DDR, BRAM, DMA, streaming fabrics)
• Integrate

  high-speed I/O

  (MIPI CSI-2, PCIe, Ethernet, LVDS)
• Perform

  timing closure, power optimization, and hardware debugging

• Lead FPGA bring-up on real hardware (not simulations only)
• Work directly with AI, embedded, and semiconductor partner teams to align implementation
• Guide and review work of senior engineers while remaining

  personally accountable for delivery

What You Will Not Do

• You will not be a pure “architect” detached from code
• You will not hand work off without ownership
• You will not optimize UX at the software layer alone

Required Qualifications

• 7–10+ years of

  hands-on FPGA engineering experience

• Strong mastery of

  RTL design and debugging

  in real systems
• Proven delivery of

  image / video / spatial processing pipelines

  on FPGA
• Deep understanding of

  latency, throughput, power, and thermal tradeoffs

• Experience with

  Xilinx (AMD) or Intel FPGA platforms and toolchains

• Comfortable leading a

  small elite team

  through example and code

Highly Valued Experience

• FPGA acceleration for

  AI / ML workloads

  (CNNs, transformers, pre/post processing)
• Edge AI systems coupled with

  LLM-based intelligence

• XR, humanoid robotics, or sensor-heavy embedded platforms
• Working alongside ASIC or custom silicon teams
• Performance- and thermally-constrained systems

Why This Role Matters

• You will be part of the

  core execution team

  , not a support function
• Your code directly defines

  latency, heat, and intelligence capability

• You will help deliver a platform that sets a new baseline for

  spatial intelligence hardware

What We Offer

• Leadership of a

  high-profile, mission-critical engineering team

• Deep hands-on ownership of core chip-level technology
• Collaboration with a

  top-tier global semiconductor partner

• Competitive compensation with meaningful equity
• A chance to build technology that reshapes

  how machines perceive and reason