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Design Verification -Senior Engineer

Design Verification -Senior Engineer

Qualcomm

2 - 7 years

13 - 18 Lacs

Chennai

Posted:1 month ago| Platform:

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Skills Required

digital design soc design system verilog hardware engineering uvm dsp soc design verification rtl design axi fpga oops debugging vector perl tcl arm perforce synthesis python systemc ovm cpu verilog gls electricals hdl multimedia clearcase pcie

Work Mode

Work from Office

Job Type

Full Time

Job Description

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skil Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Exp -3-6 yrs with Bachelors or Masters in Engineering

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Design Verification -Senior Engineer