142 Vector Jobs

The role at Wipro Limited involves preparing test cases and conducting testing of products, platforms, or solutions to be deployed at client sites, ensuring they meet 100% quality assurance standards. As part of this role, you will work on understanding test requirements, designing test cases, and implementing testing methodologies using Model based testing. Collaboration with the development team to identify test cases, ensure version control, and involvement in User Acceptance Testing (UAT) will be key responsibilities. You will be responsible for automating the test life cycle process, designing and executing automation frameworks, and reporting on software validation tests. Your role will also include detecting and reporting bug issues, ensuring no rejection or slippage of work items, and providing timely feedback on usability and serviceability to stakeholders. Additionally, you will be accountable for status reporting, maintaining a customer focus, delivering reports and updates on time, and accurately tracking efforts in project-related tools. Performance parameters for this role include understanding test requirements, error-free testing solutions, testing efficiency, on-time delivery, and troubleshooting queries within defined timelines. The ideal candidate for this position should have 5 to 10 years of experience in software test automation using Java, with strong hands-on experience in developing or modifying frameworks. Proficiency in programming logic, problem-solving, and coding skills with tools like Selenium WebDriver, BDD, and JS is required. Familiarity with Maven, GitHub, Jenkins, and TestNG and the ability to debug and provide solutions for practical problems are also essential. Good communication skills, the ability to work independently, and experience in manual testing of web applications are preferred qualifications for this role. The desired skill set includes Selenium, Java, and Postman, with at least 4 years of relevant experience. Immediate availability up to 30 days for joining is required for this position.,

As a Full Stack Developer specializing in AI projects, you will collaborate with engineers and product managers to understand requirements and translate them into technical specifications. Your responsibilities will include designing and implementing front-end interfaces using modern web technologies such as React and Angular, as well as building and maintaining back-end services and APIs to support AI applications using languages like Node.js, Python, and Java. Additionally, you will integrate machine learning models into production environments, ensuring their performance and reliability. You will optimize applications for speed and scalability, implement security and data protection measures, and conduct code reviews, write unit tests, and perform integration testing. Staying updated with the latest advancements in AI, machine learning, and web development technologies will be crucial, as well as troubleshooting and debugging issues across the stack. To excel in this role, you should have proven experience as a Full Stack Developer with a strong portfolio of AI projects. Proficiency in front-end technologies like HTML, CSS, JavaScript, and frameworks such as React and Angular is required. You should also be proficient in back-end technologies such as Python, Node.js, JavaScript, FastAPI, or similar, and have experience with machine learning frameworks and libraries like PyTorch, Scikit-learn, Redis, and Langchain. Familiarity with cloud platforms and services (AWS, GCP, Azure), a strong understanding of database technologies (PSQL and Vector), and experience with version control systems like Git are essential. Excellent problem-solving skills, attention to detail, and strong communication skills for a collaborative environment are also key. Experience with AI/ML model deployment and monitoring in production environments, knowledge of DevOps practices and tools like Docker and Kubernetes, and an understanding of natural language processing (NLP) and computer vision will be advantageous. Ideally, you should have experience with agile development methodologies, contributions to open-source projects, or publications in AI-related fields. This is a full-time position requiring a Bachelor's degree, with at least 1 year of experience in PyTorch, Scikit-learn, Redis, Langchain, Python, Node.js, JavaScript, FastAPI, or similar. Fluency in English is required for this in-person role located in Pune, Maharashtra. The expected start date for this opportunity is 29/04/2025. Benefits include paid sick time, paid time off, and a day shift schedule. Suitable candidates must be able to reliably commute to Pune, Maharashtra, or plan to relocate before starting work.,

Min 4–7-year experience performing security testing on Industrial control system components like PLC’s, SCADA, IIOT devices etc. Proven experience in conducting penetration tests, vulnerability assessments, and security audits across diverse environments. Knowledge of OT-ICS Security standards, including ISA/IEC 62443, NIST 800-82, NERC-CIP etc. Strong knowledge of common security vulnerabilities, attack vectors, threat modelling and exploitation techniques. Proficiency in using penetration testing tools and frameworks such as Nessus, Burp Suite, Nmap, and other ethical hacking tools. Understanding of component/system architectures in OT environments. Understanding and evaluation of security testing methods. Knowledge of typical industrial protocols (e.g., Modbus, Profinet, OPC, DNP3.0, CAN) Excellent communication skills, with the ability to clearly articulate technical findings and recommendations to both technical and non-technical audiences Roles and Responsibilities Handle the training delivery for IEC 62443 topics and OT security Handle the OT security project delivery and AUdits

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Bachelors /Masters degree in Engineering Relevant experience of 6+yrs in any of the mentioned domain - Verification/ Emulation/ Validation Verification: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce FPGA Emulation : Familiarity with Verilog/Vhdl and General Digital Logic Design concepts Knowledge of system-level architecture including buses like ARM processor bringup, AXI/AHB, bridges, memory controllers such as DDR/Nand. Knowledge of peripheral emulation like PCIE/USB is a plus. Strong working knowledge of UNIX environment and scripting languages such as Perl or shell Working knowledge XILINX Virtex FPGA architecture and experience with ISE tool flow Pre/Post silicon Validation: ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

About The Role : Job Title- Data Science Engineer, AS Location- Bangalore, India Role Description We are seeking a Data Science Engineer to contribute to the development of intelligent, autonomous AI systems The ideal candidate will have a strong background in agentic AI, LLMs, SLMs, vector DB, and knowledge graphs. This role involves deploying AI solutions that leverage Retrieval-Augmented Generation (RAG) Multi-agent frameworks Hybrid search techniques to enhance enterprise applications. What well offer you 100% reimbursement under childcare assistance benefit (gender neutral) Sponsorship for Industry relevant certifications and education Accident and Term life Insurance Your key responsibilities Design & Develop Agentic AI Applications:Utilise frameworks like LangChain, CrewAI, and AutoGen to build autonomous agents capable of complex task execution. Implement RAG PipelinesIntegrate LLMs with vector databases (e.g., Milvus, FAISS) and knowledge graphs (e.g., Neo4j) to create dynamic, context-aware retrieval systems. Fine-Tune Language Models:Customise LLMs (e.g., Gemini, chatgpt, Llama) and SLMs (e.g., Spacy, NLTK) using domain-specific data to improve performance and relevance in specialised applications. NER ModelsTrain OCR and NLP leveraged models to parse domain-specific details from documents (e.g., DocAI, Azure AI DIS, AWS IDP) Develop Knowledge GraphsConstruct and manage knowledge graphs to represent and query complex relationships within data, enhancing AI interpretability and reasoning. Collaborate Cross-Functionally:Work with data engineers, ML researchers, and product teams to align AI solutions with business objectives and technical requirements. Optimise AI Workflows:Employ MLOps practices to ensure scalable, maintainable, and efficient AI model deployment and monitoring. Your skills and experience 4+ years of professional experience in AI/ML development, with a focus on agentic AI systems. Proficient in Python, Python API frameworks, SQL and familiar with AI/ML frameworks such as TensorFlow or PyTorch. Experience in deploying AI models on cloud platforms (e.g., GCP, AWS). Experience with LLMs (e.g., GPT-4), SLMs (Spacy), and prompt engineering. Understanding of semantic technologies, ontologies, and RDF/SPARQL. Familiarity with MLOps tools and practices for continuous integration and deployment. Skilled in building and querying knowledge graphs using tools like Neo4j. Hands-on experience with vector databases and embedding techniques. Experience in developing AI solutions for specific industries such as healthcare, finance, or e-commerce. How well support you

About The Role : Job Title- Data Science Engineer, VP Location- Bangalore, India Role Description We are seeking a seasoned Data Science Engineer to spearhead the development of intelligent, autonomous AI systems. The ideal candidate will have a robust background in agentic AI, LLMs, SLMs, vector DB, and knowledge graphs. This role involves designing and deploying AI solutions that leverage Retrieval-Augmented Generation (RAG), multi-agent frameworks, and hybrid search techniques to enhance enterprise applications. What well offer you 100% reimbursement under childcare assistance benefit (gender neutral) Sponsorship for Industry relevant certifications and education Accident and Term life Insurance Your key responsibilities Design & Develop Agentic AI Applications:Utilise frameworks like LangChain, CrewAI, and AutoGen to build autonomous agents capable of complex task execution. Implement RAG PipelinesIntegrate LLMs with vector databases (e.g., Milvus, FAISS) and knowledge graphs (e.g., Neo4j) to create dynamic, context-aware retrieval systems. Fine-Tune Language Models:Customise LLMs (e.g., Gemini, chatgpt, Llama) and SLMs (e.g., Spacy, NLTK) using domain-specific data to improve performance and relevance in specialised applications. NER ModelsTrain OCR and NLP leveraged models to parse domain-specific details from documents (e.g., DocAI, Azure AI DIS, AWS IDP) Develop Knowledge GraphsConstruct and manage knowledge graphs to represent and query complex relationships within data, enhancing AI interpretability and reasoning. Collaborate Cross-Functionally:Work with data engineers, ML researchers, and product teams to align AI solutions with business objectives and technical requirements. Optimise AI Workflows:Employ MLOps practices to ensure scalable, maintainable, and efficient AI model deployment and monitoring. Your skills and experience 13+ years of professional experience in AI/ML development, with a focus on agentic AI systems. Proficient in Python, Python API frameworks, SQL and familiar with AI/ML frameworks such as TensorFlow or PyTorch. Experience in deploying AI models on cloud platforms (e.g., GCP, AWS). Experience with LLMs (e.g., GPT-4), SLMs (Spacy), and prompt engineering. Understanding of semantic technologies, ontologies, and RDF/SPARQL. Familiarity with MLOps tools and practices for continuous integration and deployment. Skilled in building and querying knowledge graphs using tools like Neo4j. Hands-on experience with vector databases and embedding techniques. Familiarity with RAG architectures and hybrid search methodologies. Experience in developing AI solutions for specific industries such as healthcare, finance, or e-commerce. Strong problem-solving abilities and analytical thinking. Excellent communication skills for cross-functional collaboration. Ability to work independently and manage multiple projects simultaneously. How well support you About us and our teams Please visit our company website for further information: https://www.db.com/company/company.htm We strive for a culture in which we are empowered to excel together every day. This includes acting responsibly, thinking commercially, taking initiative and working collaboratively. Together we share and celebrate the successes of our people. Together we are Deutsche Bank Group. We welcome applications from all people and promote a positive, fair and inclusive work environment.

Conduct comprehensive penetration testing of networks, web applications, mobile applications, and other systems to identify security vulnerabilities. Perform vulnerability assessments and provide detailed recommendations for remediation. Knowledge of OT-ICS Security standards, including ISA/IEC 62443, NIST 800-82, NERC-CIP, MITRE ATT&CK etc. Strong knowledge of common security vulnerabilities, attack vectors, threat modelling and exploitation techniques. Proficiency in using penetration testing tools and frameworks such as Nessus, Burp Suite, Nmap, and other ethical hacking tools. Strong understanding of network protocols, network and application security architectures, and common vulnerabilities (e.g., OWASP Top Ten). Prepare detailed reports of findings, including risk analysis and recommended mitigations, and present these findings to stakeholders. Stay current with emerging security threats, vulnerabilities, and technology trends, and apply this knowledge to improve our security posture. Understanding of component/system architectures in IT and OT environments. Understanding and evaluation of security testing methods. Knowledge of typical industrial protocols (e.g., Modbus, Profinet, OPC, DNP3.0, CAN) Excellent communication skills, with the ability to clearly articulate technical findings and recommendations to both technical and non-technical audiences Source code review for control flow and security flaws IEC 62443 Standard plus at least one of: ISO/IEC 27001 IEC 61508 NIST CSF IEC 61162-460:2024 Proficient in developing VAPT documentation and methodologies specifically aligned with IEC 61162-460:2024 for maritime navigation and radiocommunication equipment cybersecurity. Automotive Vehicle Testing Support Skilled in providing cybersecurity testing support for automotive vehicles , including VAPT of ECUs and in-vehicle networks , threat modeling , and ensuring compliance with industry standards like ISO/SAE 21434. Roles and Responsibilities Min. one professional certification such as Certified Ethical Hacker (CEH), ISA/IEC 62443, OSCP or certified Penetration Tester preferred. Min 2–5 years of experience performing security testing on Industrial control system components like IOT devices, PLCs, SCADA, IIOT devices etc. Familiarity with operating systems (Windows, Linux) and their security features. Excellent problem-solving skills and the ability to think critically to identify and address security issues. Strong verbal and written communication skills, with the ability to document and present technical information to both technical and non-technical audiences. Perform and report on penetration testing of systems, including cloud, NIST 800-53 CA-8 security control and using methodologies that may include, NIST SP 800-115, IEC 62243, PTES, and Information Systems Security Assessment Framework (ISSAF). Develop and maintain up-to-date knowledge of security testing tools and techniques. Contribute to the development and maintenance of security testing methodologies and procedures. Team Collaboration and Training Collaborate with other members of the security team to develop and maintain security policies, procedures, and standards

Requirements: AWS Python lead with GenAI five plus year Experience. Experience in API & microservices design and development. Experience required Python and NLP. Must have experience in GenAI -with good hands-on experience in Prompt Engineering, Cloud Vector DB AWS Bedrock, developing and deploying Generative AI applications in production. Must have experience in at least one end to end implementation of an Enterprise GenAI project. Must have experience in API development and deployment (FastAPI, Docker containerization, AWS lambda service.) Must have 1-2 years of experience in designing overall Solution architecture for GenAI/AI projects. Our Offering: Global cutting-edge IT projects that shape the future of digital and have a positive impact on environment. Wellbeing programs & work-life balance - integration and passion sharing events. Attractive Salary and Company Initiative Benefits Courses and conferences. Attractive Salary. Hybrid work culture. Here at Atos, diversity and inclusion are embedded in our DNA. about our commitment to a fair work environment for all. Atos is a recognized leader in its industry across Environment, Social and Governance (ESG) criteria. more on our CSR commitment.

Design and deploy GenAI apps using OpenAI, Azure, LangChain, AutoGen, etc. Build full-stack apps (React/NextJS, NodeJS), work on speech & vision AI, video processing (FFMPEG), and collaborate on agile R&D with global teams.

Job Summary This role encompasses a broad range of security responsibilities, including advanced offensive security operations, application security reviews, secure code reviews, and implementation of the Secure Software Development Lifecycle (SSDLC). The successful candidate will simulate sophisticated attacks, conduct secure code reviews, and contribute to the development of security tools. Responsibilities also include ensuring cloud security and Kubernetes security. The ideal candidate will possess the ability to conduct offensive security operations and apply their expertise to application security. They will perform threat modeling exercises with an attacker's mindset, leveraging their experience in bug bounty programs and red teaming simulations. The candidate will implement mitigations at the code level and support the Blue Team in improving detection capabilities using SIEM tools. This role requires a unique blend of skills and knowledge across multiple security domains. Job Requirements • Conduct Red Team exercises, simulating APTs in cloud, container, and AD environments. • Develop and execute adversary simulations based on the MITRE ATT&CK framework, focusing on assume breach scenarios. • Simulate attacks on software supply chains and CI/CD pipelines. • Perform in-depth penetration testing (both black-box and white-box) for web applications, APIs, and networks. • Conduct secure code reviews in collaboration with development teams to identify, exploit and implement mitigations on code level. • Integrate security tools and practices into the CI/CD pipeline, emphasizing DevSecOps methodologies. • Conduct threat modeling, design, and architectural reviews to identify potential security risks in the software development lifecycle. • Provide security guidance to development teams, assisting in risk mitigation and secure development practices. • Collaborate with the Blue Team to improve detection capabilities and test defensive measures. • Utilize SIEM tools for incident detection and response, providing insights to enhance monitoring and alerting mechanisms. • Develop and maintain custom security tools and frameworks to automate security testing and monitoring. • Stay informed about emerging threats, attack techniques, and security technologies. Education • Bachelor’s degree in computer science, information security, or a related field (or equivalent experience). • At least 4+ years of experience in offensive security and Application security. • Proven experience in offensive security, with a strong understanding of attack vectors and techniques. • Relevant certifications such as OSWE, OSCP, CRTO, or similar. • Significant contributions to security through Bug bounty programs, CVEs or recognized security research. • Recognized public acknowledgments in security research. • Experience with scripting or programming languages like Python, Go, or Ruby for developing custom attack tools/exploits. • Familiarity with CI/CD tools such as GitHub Actions, Jenkins, or TeamCity. • Knowledge of security practices of cloud computing platforms like AWS, Azure, GCP, as well as k8s.

We are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with aminimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans. Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse controllers, test clocking strategy, chip I/O test strategy and HSIO test strategy. Define JTAG TAP, boundary scan, I/O Test JTAG access, IEEE1687 iJTAG network and instrument design and implementation. Define the Test Interface for each of the P&R IP blocks for Scan, MBIST and other test interfaces. Define hierarchical block isolation, Test clocking and On Chip Clock controllers and reset methodology. Define scan and MBIST timing at the top level and block level timing. Analyse block level RTL or gates to ensure that scalability and coverage is satisfied as per the design goals. Ensure that DFT is provided to fix the DFT violations to ensure that the design goals are meet. Analyse compression requirements for each of the blocks, define Intest and Extest compression requirements and define the requirements for compression engines. Synthesize compression engines for each of the blocks. Create the collaterals for compression for the IPs. Block level scan insertion as well as development of the scan wrappers for the blocks. Do scan insertion on the blocks, analyse scan DRC, implement DFT fixes. Create scan protocol files for designs, create scan inserted netlist, create scan definitions as well as scan definition files for PD. Perform ATPG on the scan inserted netlist, analyse DRC and coverage violations. Deep knowledge of different scan models Stuck-at, transition test, path-delay, bridging, cell aware, small-delay transition, IDDQ test etc. Ability to analyse coverage for each of the model types. Running GLS with or without timing for the scan vectors. Ability to debug the failures and working with timing and PD teams to fix the timing issues. Understanding of pattern delivery to the post-silicon test engineering teams. Delivering to the Test engineering the Test pin muxing and other full chip requirements for the Test Engineering Team. Understanding tester requirements and delivering the patterns in the formats that the tester teams needs. Implement pattern retargeting. Create grey box models for blocks. Coverage analysis of full chip consolidating Intest and Extest patterns. Knowledge of Top level scan architecture and creating flow to create pattern retargeting. Knowledge of Streaming Scan Network and other Top level scan pin sharing and implementing the block to top level pattern generation for this flow. Implementing Memory Testing and MBIST. Knowledge of Memory defect models and test algorithms. Knowledge of memory bit mapping and redundancy analysis. Implementing memory repair and fuse sharing among various memory. Knowledge of LogicBIST with Test point insertion, X-blocking. Full chip DFT delivery for tapeout including but not limited to DFT netlist verification, pattern delivery, Tester requirements. Debug DFT patterns post silicon, ability to analyse chain test patterns for failures, scan pattern failures. Analyse MBIST pattern failures, yield and repair debug. Ability to perform volume diagnostics on the parts to isolate and improve the patterns. Requirements Bachelors degree in computer science, Electrical/Electronics Engineering, or related field. OR masters degree in computer science, Electrical/Electronics Engineering, or related field. OR PhD in Computer Science, Electrical/Electronics Engineering, or related field. 5+ years of hands-on experience in SOC Design for Test. Expertise in DFT tools and flows in scan intertion, ATPG, GLS simulation, diagnosis flows. Prior experience working on IP level and SOC level DFT projects. Proficient in DFT tools from Siemens (Tessent), Synopsys DFTmax, Tetramax, Spyglass DFT advisor, Genius DFT, Modus, VCS, Xcelium etc. Worked in full chip design or complex IP delivery in the area of DFT. Experience in post silicon debug, diagnosis and yield enhancements is a plus.

Seeking a Senior AI Engineer with strong expertise in machine learning, deep learning, and model deployment to design and implement scalable AI solutions for complex business problems.

Qualifications: Bachelor’s or Master’s degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) Excellent communication skills, both verbal and written Experience: Minimum of 7 years of experience in the field Proficiency in DVT pattern experience Experience with ATE and functional vectors generation Understanding of Stimgen flow Prior experience with AMD is preferred Skills: Strong debugging skills Experience with MBIST, JTAG, and Phy-loopback NoteCandidates are encouraged to provide a detailed resume showcasing their relevant experience and skills. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore IndiaHyderabad

Validation/ Test Engineer vTest Studio, CAPL, Canoe, VT System Exp: 5-8yrs Job Title Testing Engineer Job Description 4- 8 years of hands-on validation experience as a Test Engineer on Automotive . projects as per ASPICE (SWE.4,SWE.5,SWE.6);SWE6-experience is mandatory. Looking for ECU software testing. Experience in Hardware in Loop (HIL), Manual/Automated Testing, Functional and Regression Testing (Black Box and White Box testing). Good Experience in any HIL Platform validation and mandatory to have CANoe based Test Platform. Involved in Creation, Execution, Review of the Test Cases, analyzing the test result discrepancies and resolving them by debugging. Good knowledge about SDLC Software Development Life Cycle) & Automotive protocols like CAN and UDS. Expertise in Vector tools such as CANalyzer, CANoe, CANape, NeoVI, CANdiva etc. Mandatory Skills Candidate should have extensive Test engineering and Test management knowledge , preferably in the field of propulsion and/or chassis functions and at least 4 years of applied experience in the automotive . Develop and executing Test Cases from Customer requirements Experience in defect life cycle management and Requirement management tools. Experience in developing Test cases and have good Testing concepts Experience in project work using the Atlassian tool chain Good to Have Hands-on Tool usage experience on below Test specification and execution Tools: • EXAM, DSpace HIL • ETAS tool chain, CANape, CANoe, Wireshark; Canoe, CAPL, Vteststudio, VT System are mandatory to have. Git hub is good to have Knowledge with working in agile teams (SAFE, Scrum) Good to have experience with UDS, Transport protocol Good to have experience on Test bench setup Knowledge of software related process norms - ASPICE Problem-solving skills to develop solutions for specific operational issues Knowledge of CI/CD

Responsibilities: Full app design (web/mobile), branding, illustrations, Figma design system. Required: 3+ yrs UI/UX, strong Figma skills, UX/UI balance. Vector graphics Bonus: Animation skills, German for feedback loops. Food allowance Annual bonus

The role is to support process delivery by ensuring the daily performance of the Production Specialists, resolving technical escalations, and developing technical capability within the Production Specialists. You should have 8 to 10 years of experience in software test automation using Java, with a strong hands-on experience of 4+ years in developing Frameworks from scratch or modifying frameworks. Experience in managing teams as an Automation lead is required, along with very good exposure to API automation using tools like SOAP UI, Postman, etc. Strong programming logic and problem-solving capability is essential, along with deep hands-on and coding skills with Selenium web-driver, BDD, and JS. Hands-on experience in Maven, GitHub, Jenkins, and TestNG is also necessary. Your responsibilities will include handling technical escalations through effective diagnosis and troubleshooting of client queries, managing and resolving technical roadblocks/escalations as per SLA and quality requirements, and providing product support and resolution to clients by guiding users through step-by-step solutions. You will be expected to troubleshoot all client queries in a user-friendly, courteous, and professional manner, and offer alternative solutions to retain customers and clients" business. Furthermore, you will be responsible for building people capability to ensure operational excellence and maintaining superior customer service levels of the existing account/client. This will involve mentoring and guiding Production Specialists on improving technical knowledge, conducting trainings to bridge skill gaps, and staying current with product features, changes, and updates. Your performance will be measured based on various parameters including the number of cases resolved per day, compliance to process and quality standards, meeting process level SLAs, productivity, efficiency, absenteeism, triages completed, technical test performance, and more. Join Wipro and be a part of our journey to reinvent the world. We are an end-to-end digital transformation partner with ambitious goals, and we need individuals inspired by reinvention to join us. Be a part of a business powered by purpose and a place that empowers you to design your own reinvention. Realize your ambitions with us. Applications from people with disabilities are explicitly welcome.,

We are seeking a hands-on and forward-thinking Principal or Lead Engineer with deep expertise in Java-based backend development and a strong grasp of Generative AI technologies . You will lead the design, development, and deployment of Gen AI-based solutions, working across data, ML engineering, and software engineering teams to integrate AI capabilities into our core platforms and client-facing products. Responsibilities Lead end-to-end architecture and implementation of Generative AI solutions integrated with Java-based applications Evaluate, fine-tune, and deploy foundational and LLM models (e.g., GPT, LLaMA, Claude, Gemini) for use cases such as code generation, summarization, intelligent assistants, etc. Collaborate with engineers and practice leads to identify and scope high-impact Gen AI use cases Build solutions based on AI models with engineers. Mentor and guide junior engineers and set technical direction across AI initiatives Build scalable APIs and microservices in Java/Spring Boot that interact with AI models Optimize performance and cost of AI solutions in production using prompt engineering, retrieval-augmented generation (RAG), caching, and model selection Contribute to AI model experimentation and evaluation pipelines (OpenAI, Hugging Face, LangChain, etc.) Drive adoption of Gen AI best practices (e.g., guardrails, ethical AI, observability, and feedback loops) Requirements Bachelor’s or Master’s degree in Computer Science, Engineering, or related field 10+ years of experience in Java/J2EE/Spring Boot and backend architecture 3+ years of experience working on ML/AI/Gen AI systems, including hands-on work with LLM APIs or open-source models Strong knowledge of modern Gen AI frameworks likeLangChain, LlamaIndex, andVector DBs (e.g., FAISS, Pinecone, Chroma) Experience integrating with LLMs via APIs (OpenAI, Azure OpenAI, Hugging Face) or self-hosted models Working knowledge of Python for AI model orchestration and prototyping Solid understanding of data pipelines, REST APIs, containerization (Docker, Kubernetes), and CI/CD workflows Experience with AWS, GCP, or Azure AI/ML services Nice to have Familiarity with prompt engineering and fine-tuning LLMs using techniques like LoRA or PEFT Experience building RAG-based chatbots, copilots, or AI-powered developer tools Contributions to AI communities, research, or open-source Gen AI projects Strong communication and stakeholder management skills

Job Overview As a manager in the Signal Integrity team you will lead the SI engineers focusing on aspects of electrical design, simulation, and verification-validation testing of high speed products in the connector and/or cable assembly, radio system industrytargeting high speed communications and connectivity within datacenters and wireless infrastructure. You will be expected to drive development teams in the areas of signal integrity for product and system design including modeling, simulation, testing and circuit board layout. You will work collaboratively within a broader cross functional team of mechanical, manufacturing, & operations to execute leading edge products designs. You will assign resources to work on the signal integrity performance of a product/platform beginning with the initial analysis through prototype fabrication & evaluation, and production verification testing. You will be expected to coordinate to drive the advancement of simulation tools and capabilities, identifying potential areas of process improvement, and solving complex problems and ensuring product development success. Responsibilities: Align the technology roadmap with front end / customer, and implement accordingly Familiar with signal integrity design, simulation and validation activities through product development cycles Coordinate to define signal integrity design performance/functional requirements for new products by closely engaging with front teams / lead customers Guide the team to preform signal integrity simulations for multiple high-speed standards on each product, including determining the correct simulation methodology, as well as a good understanding of the criteria for each interface. Driving product development for business success Engaging in innovative simulation and test tool improvement and process enhancement Driving best practices and efficiency in connector design and component qualifications from a signal integrity standpoint. Being a mentor and teacher to other engineers across disciplines / BUs, writes and presents technical papers at internal and external conferences. Being an expert in analyzing competitive products and driving internal & competing IP positions Mandate Skills: Bachelors degree in electrical engineering or equivalent work experience; Masters degrees highly recommended Minium of 10 years of relevant work experience in electrical design, RF design, or PCB design, with 3+ years managerial experience in leading an electrical or SI engineering team Familiar with signal integrity analysis tools (Agilent ADS, Ansys HFSS, CST, or equivalent tools) A solid understanding of electromagnetic theory and electrical circuit behavior Good analytical capabilities to interpret simulation and lab data to identify issues and provide guidance to team to fix identified problem. Familiarity with printed circuit board design, fabrication and assembly. Fluent in English (both verbal and written) to facilitate global communication both internally and with external customers. Strong background to work in a global environment able to accommodate varying time zones and capable of collaborating with individuals across geographies. Ability to, and experience with, teaching and training peers in applying software tools and methodologies, and in the use of electrical test equipment, including VNAs and TDRs Individual must be highly motivated, a quick learner, and able to work independently Nice to have Skills: Experience with interconnect design, including socket/connector/cable/cable assembly design (high-speed twinax cables, direct attach copper (DAC) cables), and/or RF antenna, RF sub-system Design experience with communication systems (high-speed servers, switches, routers, storage, antennas, RF front end or similar systems) Solid presentation skills with an ability to clearly communicate technical concepts to diverse audiences in English Strong organizational and time management skills with an ability to manage and execute multiple tasks/deadlines/projects simultaneously with limited direction. Printed circuit board design, fabrication and assembly (Altium, AutoCAD) Test equipment (oscilloscope, vector network analyzer, BERT) Signal conditioning techniques (equalization, amplification) Direct customer design and support experience Application and test knowledge of high-speed devices and equalization techniques

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skil Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Exp -3-6 yrs with Bachelors or Masters in Engineering Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Systems Test Engineering General Summary: We are seeking a Senior Staff AI System-Level Test Engineer to lead end-to-end testing of Retrieval-Augmented Generation (RAG) AI systems for Hybrid, Edge-AI Inference solutions. This role will focus on designing, developing, and executing comprehensive test strategies for evaluating the reliability, accuracy, usability and scalability of large-scale AI models integrated with external knowledge retrieval systems. The ideal candidate needs to have deep expertise in AI testing methodologies, experience with large language models (LLMs), expertise in building test solutions for AI Inference stacks, RAG, search/retrieval architecture, and a strong background in automation frameworks, performance validation, and building E2E automation architecture. Experience testing large-scale generative AI applications, familiarity with LangChain, LlamaIndex, or other RAG-specific frameworks, and knowledge of adversarial testing techniques for AI robustness are preferred qualifications Key Responsibilities: Test Strategy & Planning Define end-to-end test strategies for RAG, retrieval, generation, response coherence, and knowledge correctness Develop test plans & automation frameworks to validate system performance across real-world scenarios. Hands-on experience in benchmarking and optimizing Deep Learning Models on AI Accelerators/GPUs Implement E2E solutions to integrate Inference systems with customer software workflows Identify and implement metrics to measure retrieval accuracy, LLM response quality Test Automation Build automated pipelines for regression, integration, and adversarial testing of RAG workflows. Validate search relevance, document ranking, and context injection into LLMs using rigorous test cases. Collaborate with ML engineers and data scientists to debug model failures and identify areas for improvement. Conduct scalability and latency tests for retrieval-heavy applications. Analyze failure patterns, drift detection, and robustness against hallucinations and misinformation. Collaboration Work closely with AI research, engineering teams & customer teams to align testing with business requirements. Generate test reports, dashboards, and insights to drive model improvements. Stay up to date with the latest AI testing frameworks, LLM evaluation benchmarks, and retrieval models. Required Qualifications: 8+ years of experience in AI/ML system testing, software quality engineering, or related fields. Bachelors or masters degree in computer science engineering/ data science / AI/ML Hands-on experience with test automation frameworks (e.g., PyTest, Robot Framework, JMeter). Proficiency in Python, SQL, API testing, vector databases (e.g., FAISS, Weaviate, Pinecone) and retrieval pipelines. Experience with ML model validation metrics (e.g., BLEU, ROUGE, MRR, NDCG). Expertise in CI/CD pipelines, cloud platforms (AWS/GCP/Azure), and containerization (Docker, Kubernetes). Why Join Us Work on cutting-edge AI retrieval-augmented generation technologies Collaborate with world-class AI researchers and engineers. If you are passionate about AI system testing and ensuring the reliability of next-generation generative models, apply now! Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Test Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Systems Test Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Test Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 2+ years experience in the area of ASIC/DFT -In depth knowledge of DFT concepts -In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis -Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations -Expertise in scripting languages such as perl, shell, etc. -Experience in simulating test vectors -Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TK, TetraMax) -Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus -Ability to work in an international team, dynamic environment -Ability to learn and adapt to new tools and methodologies. -Ability to do multi-tasking & work on several high priority designs in parallel. -Excellent problem solving skills -Excellent communication and team work skills and good English is required Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Minimum of 5+ years experience in the area of ASIC/DFT -In depth knowledge of DFT concepts -In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis -Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations -Expertise in scripting languages such as perl, shell, etc. -Experience in simulating test vectors -Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TK, TetraMax) -Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus -Ability to work in an international team, dynamic environment -Ability to learn and adapt to new tools and methodologies. -Ability to do multi-tasking & work on several high priority designs in parallel. -Excellent problem solving skills -Excellent communication and team work skills and good English is required Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The ideal candidate should leverage his knowledge and experience to provide leadership, technical guidance, and execution of silicon validation of ARM or DSP based multiple SOC projects and platforms Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skills Experience in Hifi Processor, Soundwire interface, ANC, DMA, I2S verification experience is a Plus. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. 12-15 years of experience with a Bachelor's/ Masters degree in Electrical/ Electronics engineering Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 3+ years experience in the area of DFT-, ATPG, Scan Insertion, MBIST, JTAG -In depth knowledge of DFT concepts. -In depth knowledge and hands on experience in DFT(scan/mbist) insertion, ATPG pattern generation/verification, mbist verification and post silicon bring up/yield analysis -Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations. -Ability to analyze and devise new tests for new technologies/custom RAM design/RMA etc. -Expertise in scripting languages such as perl, shell, etc. -Experience in simulating test vectors. -Knowledge of equivalence check and RTL lint tool (like spyglass). -Ability to work in an international team, dynamic environment -Ability to learn and adapt to new tools and methodologies. -Ability to do multi-tasking & work on several high priority designs in parallel. -Excellent problem-solving skills Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Dear Candidate, We are seeking a skilled Embedded Systems Engineer to join our dynamic team. The ideal candidate will be responsible for designing, developing, and testing embedded systems and firmware. You will work on a wide range of projects, from hardware integration to developing efficient, reliable, and high-performance embedded software solutions. Role & Responsibilities: Embedded System Design : Design and develop embedded systems and firmware for microcontrollers, microprocessors, and other embedded platforms. Firmware Development : Write and optimize firmware code in languages such as C , C++ , or Assembly for embedded systems. Hardware Integration : Interface embedded software with hardware components like sensors, actuators, displays, and communication modules (e.g., I2C , SPI , UART ). Embedded Software Testing : Conduct unit testing and debugging to ensure software reliability and meet system performance requirements. Optimization : Optimize embedded software for performance, memory usage, and power consumption, ensuring efficient execution on resource-constrained devices. Prototyping & Validation : Work with hardware engineers to develop and test prototypes, validating system designs and ensuring that hardware and software meet specifications. System Troubleshooting : Troubleshoot hardware and software issues in embedded systems and develop solutions to improve functionality and performance. Real-time Operating Systems (RTOS) : Implement embedded software solutions on RTOS platforms and manage real-time constraints for time-sensitive applications. Required Skills & Qualifications: Embedded Software Development : Proven experience in embedded software development with expertise in C , C++ , and Assembly programming languages. Microcontroller Programming : Hands-on experience with microcontrollers like ARM , AVR , PIC , or ESP32 , and familiarity with relevant development environments. Hardware-Software Integration : Experience in integrating embedded software with hardware platforms and peripherals (e.g., sensors, communication protocols). RTOS Knowledge : Experience working with Real-Time Operating Systems (RTOS) such as FreeRTOS , RTEMS , or VxWorks . Communication Protocols : Knowledge of communication protocols like UART , SPI , I2C , CAN , or Ethernet for device communication. Debugging & Testing : Strong debugging and troubleshooting skills, using tools such as JTAG , Oszilloscopes , and logic analyzers . Embedded Systems Optimization : Expertise in optimizing embedded software for power efficiency, performance, and resource constraints. Version Control : Proficiency in using version control systems like Git for managing codebase and collaborating with team members. Prototyping Tools : Familiarity with embedded development tools like Keil , IAR Embedded Workbench , Eclipse , and hardware prototyping platforms such as Arduino or Raspberry Pi . Soft Skills: Strong problem-solving and analytical skills. Excellent communication skills to work with cross-functional teams. Ability to work independently and as part of a team. Detail-oriented with a focus on delivering high-quality solutions Note: If you are interested, please share your updated resume and suggest the best number & time to connect with you. If your resume is shortlisted, one of the HR from my team will contact you as soon as possible. Kandi Srinivasa Reddy Delivery Manager Integra Technologies