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Debug IP Design Lead /MicroArchitect

Debug IP Design Lead /MicroArchitect

Qualcomm

4 - 9 years

6 - 11 Lacs

Bengaluru

Posted:1 day ago| Platform:

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Skills Required

ip drg arm system engineering ip system architecture c++ soc electrical engineering digital design vhdl design engineering rtl design fpga rtl coding perl system verilog asic sta asic verification c rtl uvm verilog asic design fpga design vlsi

Work Mode

Work from Office

Job Type

Full Time

Job Description

Job Area: Engineering Group, Engineering Group > Systems Engineering
General Summary:
We are seeking a highly skilled and experienced Debug IP Design Engineer/Microarchitect to focus on the development of Debug IPs. The ideal candidate will have a strong background in IP design, verification, and delivery, with specific expertise in CoreSight IP design.Key Responsibilities:

Debug IP Design: Focus on the design and development of CoreSight based Debug IPs, ensuring they meet the required specifications and performance standards.

RTL Design: Utilize your experience in RTL design for complex SoC development using Verilog and/or SystemVerilog to create efficient and reliable IPs.

Arm-Based Designs: Apply your knowledge of Arm-based designs and/or Arm System Architectures to develop and optimize IPs.

Collaboration: Work closely with cross-functional teams, SoC integration & Architecture teams to ensure successful IP delivery within the specified timelines.

Quality Assurance: Implement rigorous verification processes to ensure the IPs meet all functional and performance requirements.

Qualifications:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

Experience: Proven experience in RTL design for complex SoC development using Verilog and/or SystemVerilog.

Arm Expertise: Strong understanding of Arm-based designs and/or Arm System Architectures.

Technical
Skills:

Proficiency in IP design, verification, and delivery, with a focus on Debug IPs.

Communication: Excellent communication and collaboration skills to work effectively with cross-functional teams.

Preferred
Skills:

Experience with CoreSight based Debug IP design.

Strong problem-solving and analytical skillsMinimum Qualifications:

Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.

OR
Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.

OR
PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

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Debug IP Design Lead /MicroArchitect