110 Systemc Jobs - Page 2

This position involves promoting new capabilities to accelerate the design of innovative electronics products slated for deployment in 2025 and beyond. You will encounter a wide range of applications including Artificial Intelligence, Machine Learning, far space technologies, processors, high-performance computing, and automotive networks. Mirabilis Design values innovation and leadership in impacting new product design and development. Your responsibilities will include collaborating with product owners to create various marketing collaterals such as Press Releases, competitive analysis, brochures, videos, and presentation slides. You will craft marketing material tailored to the language of our customers and devise creative strategies to promote products in conferences, programs, and social media. Working closely with field marketing teams, you will support events and other outbound marketing activities. Key Responsibilities: - Define and execute a new marketing plan - Prepare articles and Press Releases - Collaborate with other teams to promote offerings - Inform clients and prospects about products and services through innovative marketing strategies - Track the performance of all marketing campaigns Location: This is a Hybrid position with flexibility in location. The office is situated in Santa Clara, CA, or Chennai, India. Education And Experience: - Masters degree or higher in Engineering, Computer Science, Information Technology, Computer Science and Engineering, Systems Science, or Operations Research, with no experience required. OR - Bachelors degree in Engineering, Computer Science, Information Technology, Computer Science and Engineering, Systems Science, or Operations Research, with two (2) years of experience in architecting electronics or semiconductors. Special Requirements: - Bachelors degree in Computer or Electronics Engineering - 2 years of experience in architecture of electronic systems or semiconductors - Experience in publishing articles is essential - Marketing experience is optional - Strong English verbal and written skills - Experience with modeling and simulation tools such as VisualSim, Opnet, NS2/3, or SystemC is advantageous. Join ELC Labs for the opportunity to collaborate with talented individuals, contribute to impactful software products, and be part of a company dedicated to doing what's right for employees, customers, and the community.,

Qualcomm India Private Limited is seeking talented Graphics System engineers to join their Engineering Group in Systems Engineering. Adreno GPU is a leading mobile graphics solution in today's smartphone market, crucial for enabling new markets like VR, IoT, AI, drone, and autonomous driving. The team is dedicated to creating world-class GPU products that deliver high-performance graphics and compute capabilities while maintaining low power consumption. As a member of the Graphics System team, you will play a key role in developing the simulator for the next generation graphics core for mobile devices. Your responsibilities will include developing GPU architecture designs using advanced modeling methodologies, creating functional models, developing test suites, and collaborating with various teams to ensure the correctness and stability of GPUs and compute systems. The critical skills and experience required for this role include a strong understanding of modern 3D graphics pipeline, programming experience in graphics or compute using APIs like DirectX, OpenGL, OpenCL, Vulkan, proficiency in C++ for modeling, and a good grasp of computer/GPU architecture and pipeline. Additionally, debugging, problem-solving abilities, and clean code writing skills are essential. Minimum qualifications include a Bachelor's degree in Engineering, Information Systems, Computer Science, or related field with 3+ years of Systems Engineering experience, or a Master's degree with 2+ years of experience, or a PhD with 1+ year of experience. Preferred qualifications include knowledge of graphics/ray-tracing/compute architecture & pipeline, proficiency in programming languages like C/C++/Perl/Python, good communication skills, and willingness to work collaboratively in a team environment. Experience with SystemC, TLM, agile development methodologies, graphics & compute driver or compiler, and Verilog/Vera/System Verilog is advantageous. Qualcomm is an equal opportunity employer committed to providing accommodations for individuals with disabilities during the application/hiring process. The company expects its employees to adhere to all policies and procedures, including security measures for protecting confidential information. Staffing and recruiting agencies are advised not to submit unsolicited profiles, applications, or resumes to Qualcomm's Careers Site. For more information about this role, please contact Qualcomm Careers.,

Qualcomm India Private Limited is currently seeking experienced Wireless Modem Hardware Model Developers to join their Bangalore Wireless R&D Hardware team. In this role, you will have the opportunity to work on Qualcomms" cutting-edge chipsets in modem WWAN IPs. Your responsibilities will include contributing to the development of flagship modem core IPs covering 5G (NR) and 4G (LTE) technologies. Additionally, you will be part of a team defining and developing next-generation multi-mode 5G modems. Your tasks will involve working on the development and verification of hardware models of modem core IPs, which are developed on the C++/SystemC platform and used as a golden reference for RTL verification and pre-silicon FW development (virtual prototyping). The ideal candidate should be well-versed in C++ and have a good exposure to SystemC and/or System Verilog and/or Matlab. Furthermore, you should possess the ability to understand HW micro-architecture and its modeling abstraction. A working knowledge of the physical layer of wireless technologies such as NR, LTE, WLAN, and Bluetooth is highly desired. Expertise in digital signal processing, as well as working experience in HW modeling and/or RTL design/verification of IPs, are preferred. Candidates with a software/firmware background in wireless IPs can also apply. Those with a strong technical know-how on non-wireless DSP-based HW IPs (with design/verification/modeling skills) will also be considered. Minimum qualifications for this position include a Bachelor's or Master's degree in Electrical/Electronics/Computer Science from a reputed college/university. Candidates with a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience are eligible to apply. Alternatively, candidates with a Master's degree in the mentioned fields and 1+ year of Hardware Engineering or related work experience, or a PhD in the relevant fields can also apply. Qualcomm is an equal opportunity employer committed to providing an accessible process for individuals with disabilities during the application/hiring process. If you require accommodation, you may reach out to Qualcomm at disability-accommodations@qualcomm.com or through their toll-free number. Qualcomm also expects its employees to adhere to all applicable policies and procedures, including security and confidentiality requirements. It is important to note that Qualcomm's Careers Site is intended for individuals seeking a job at Qualcomm, and staffing and recruiting agencies or individuals represented by an agency are not authorized to use the site. Unsolicited submissions from staffing agencies will not be accepted by Qualcomm. For more information about this role, please contact Qualcomm Careers directly.,

Project Role : Performance Engineer Project Role Description : Diagnose issues that an in-house performance testing team has been unable to. There are five aspects to Performance Engineering:software development lifecycle and architecture, performance testing and validation, capacity planning, application performance management and problem detection and resolution. Must have skills : Vmware Virtualization Administration Good to have skills : Nutanix Administration Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Performance Engineer, you will engage in diagnosing complex issues that the in-house performance testing team has been unable to resolve. Your typical day will involve collaborating with various teams to analyze performance metrics, conducting thorough assessments of application performance, and implementing strategies to enhance system efficiency. You will also be responsible for validating performance testing results and ensuring that applications meet the required performance standards, contributing to the overall success of the software development lifecycle and architecture. Roles & Responsibilities: Expected to be an SME. Collaborate and manage the team to perform. Responsible for team decisions. Engage with multiple teams and contribute on key decisions. Provide solutions to problems for their immediate team and across multiple teams. Conduct performance assessments and recommend improvements based on findings. Facilitate knowledge sharing sessions to enhance team capabilities. Deploy, maintain, and operate the virtualization infrastructure in strict adherence with the defined procedures with the aim of highest operational stability. Execute, maintain and improve the operational processes and activities, deliver according to the highest quality and standards, ensuring high service delivery levels, compliance and customer satisfaction. Conduct incident investigation, communication and resolution. Perform out of business hours support activities and participate to on-call rotation. Create, maintain and report KPIs. Support internal and external audits activities, as well as resolution of findings. Strictly adhere to corporate processes, standards, policies and operational procedures. Investigate and implement operations automation where relevant. Professional & Technical Skills: Must To Have Skills: Proficiency in VMware Virtualization Administration. Good To Have Skills: Experience with Nutanix Administration. Strong understanding of performance testing methodologies and tools. Experience in capacity planning and application performance management. Proficient in problem detection and resolution techniques. Excellent knowledge of the following solutions and technologies:RHEL, VMware ESX in a stretched cluster deployment, VMware VCF, disk storage replication, Python, Ansible, Terraform, Jira. Knowledge of alternative hypervisor solutions such as Nutanix or Huawei DCS is a plus. Very strong customer-oriented mindset and attitude, experience in interacting with both internal and external customers. Previous experience (5 years) in a similar role operating a highly critical virtualization infrastructure within a financial environment. Additional Information: The candidate should have minimum 7-10 years of experience in VMware Virtualization Administration. This position is based at our Hyderabad office. A 15 years full time education is required. Qualification 15 years full time education

Education: Bachelors degree (BE/B.Tech)orMasters degree (ME/M.Tech) Roles & Responsibilities: Acquire knowledge microarchitecture an ASIC unit by studying the specification and interacting with the logical design team. Write and perform the test plan in close cooperation with the logical design team. Develop coverage models and verification environments using UVM-SystemVerilog C++. Write, maintain and publish the verification specification. Monitor, analyze and debug simulation errors. Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time. Produce a maintainable and reusable code across projects Required Skills and Experience Curious, demanding and rigorous. Mastering object oriented programming. Knowledge of UVM verification methodology (or equivalent) and SystemVerilog SystemC hardware verification languages Knowledge of Constraint-Random Coverage-Driven verification environments development in SystemVerilog C ++ (drivers monitors, constraint random tests, checkers and self-checking models and coverage models written in SystemVerilog-Covergrourp SVA) Knowledge of simulation tools and coverage database visualization tools Effective in problems solving by rapidly identifying their root cause and developing patches or workarounds under tight timing constraints. Our Offering: Competitive salary package Leave Policies: 10 Days of Public Holiday (Includes 2 days optional) & 22 days of Earned Leave (EL) & 11 days for sick or caregiving leave. Benefit Plans (Insurance) Medical & Life & Accidental & EDLI

You will be responsible for the Tools and Infrastructure Platforms for the engineering team at Ethernovia. This responsibility includes developing software for Ethernovia's Evaluation platforms that are used to debug, test, and demonstrate the company's networking devices. This software includes BSP (Board Support Packages), drivers for onboard devices, middleware software. Our products and hence tool infrastructure is quite data intensive and we are looking for candidates who are able to create tools for handling large volume of test data output and help visualize this data in command line and graphic tools. Technical Qualifications Bachelors or Master's degree in Computer Science/Software or related field. Work Experience: 3 years for Mid-level and 7 years for Senior Level position. Strong understanding of Software Development lifecycle including Architecture, Implementation and Testing fundamentals. Proficient in C/C++ Programming Language. Experience in Python is a plus. Experience with BSP (Board Support Packages) preferably Linux systems like Beaglebone or Raspberry Pi. Device drivers, preferably for devices on hardware buses like I2C, SPI and Ethernet. Good understanding of Operating systems preferably Embedded Linux. Experience with integration and testing of open-source middleware, libraries, and drivers. Hands on Experience with Hardware and embedded processors. Nice to Have Experience with GNU or similar compiler, debugging suite. Embedded programming, preferably with communication devices and hardware buses like I2C, SPI, Ethernet, USB. Code Version Control and Review tools/processes like Perforce/Git, Swarm. Automation and DevOps tools like Jenkins. ARM family of processors or similar embedded processors. Performance testing of communication devices. GRPC, Protobuf or similar Remote Procedure Call (RPC) software. Boot code like uboot or similar. Experience in Verification/validation experience including HW languages (System Verilog, Verilog, UVM) is a big plus. Experience in SystemC and transaction-level modelling (TLM). Soft Skills Self-motivated and able to work effectively both independently and in a team. Excellent communication/documentation skills. Attention to details. What you'll get in return: Pre IPO stock options Cutting edge technology World class team Competitive base salary Flexible hours Medical, dental and vision insurance for employees Flexible vacation time to promote a healthy work-life balance,

As a Wireless Modem HW Model Developer at QCT's Bangalore Wireless R&D HW team, you will have the opportunity to work on Qualcomm's cutting-edge chipsets in modem WWAN IPs. Your primary responsibilities will include contributing to the development of flagship modem core IP for 5G (NR) and 4G (LTE) technologies. You will play a key role in defining and implementing next-generation multi-mode 5G modems. Your daily tasks will involve developing and verifying HW models of modem core IP using C++/SystemC platform. These models serve as the golden reference for RTL verification and pre-Silicon FW development, thereby aiding in virtual prototyping. To excel in this role, you must possess a strong command of C++ and familiarity with SystemC, System Verilog, and/or Matlab. Additionally, you should be adept at understanding HW micro-architecture and modeling abstraction. Ideal candidates will have a working knowledge of the physical layer of wireless technologies such as NR, LTE, WLAN, and Bluetooth. Expertise in digital signal processing and experience in HW modeling, RTL design/verification of IP are highly valued. Those with a background in software/firmware related to wireless IP are encouraged to apply. Moreover, candidates with a solid technical foundation in non-wireless DSP-based HW IPs, encompassing skills in design, verification, and modeling, will also be considered for this role. If you are passionate about innovation and possess the technical acumen to drive advancements in wireless modem HW modeling, we encourage you to join our dynamic team at QCT's Bangalore Wireless R&D HW division.,

You should have a strong understanding of Design & Verification methodologies related to either Times or Untimed SW Models, RTL IP, VIPs, and UVM Env. It is essential to be familiar with verification tools such as Simulator and Synthesis. Proficiency in C/C++, System Verilog, UVM, SystemC, and RTL is required. Knowledge of standard protocol interfaces like AMBA, Automotive, PCIe, and USB would be beneficial. Strong written and verbal communication skills are necessary, along with the ability to work effectively both independently and as part of a team. A self-motivated attitude and a collaborative approach to teamwork are also important attributes for this role.,

At Cadence, we are dedicated to hiring and developing leaders and innovators who aspire to influence the technology industry. With over 30 years of expertise in computational software, Cadence is a prominent figure in electronic design. Our Intelligent System Design approach enables us to provide software, hardware, and IP solutions that translate design ideas into reality. Our clientele includes the most forward-thinking companies worldwide, producing exceptional electronic products for various dynamic market applications such as hyperscale computing, automotive, 5G communications, aerospace, industrial, consumer electronics, and healthcare. The Cadence Advantage - You will have the opportunity to engage with cutting-edge technology in an environment that fosters creativity, innovation, and impact. - Our employee-centric policies prioritize the physical and mental well-being of our employees, career advancement, continuous learning opportunities, and recognizing and celebrating achievements tailored to individual needs. - The unique "One Cadence, One Team" culture encourages collaboration within and across teams to ensure customer success. - Various avenues for learning and development are available for employees to explore based on their specific interests and requirements. - You will collaborate with a diverse team of passionate, dedicated, and talented individuals who consistently go the extra mile for our customers, communities, and each other. Job Summary As a member of the Cadence Solutions Organization, your role will involve closely collaborating with our global customers to construct Virtual/Hybrid prototypes that facilitate early software development and system validation. This includes comprehending customer requirements, analyzing hardware specifications, constructing precise and high-performance models/platforms, and implementing Cadence solutions for operational use. You will gain a comprehensive technical knowledge base, exposure to the latest hardware and software architectures, and stay abreast of advancements in model-based systems engineering/hybrid prototyping. By utilizing Cadence Virtual and Hybrid tools firsthand and understanding customer expectations, you will provide essential feedback to product teams to enhance the tools and technologies continually. This position offers an excellent opportunity to work in a supportive and inclusive environment where we are invested in each other's success, and we share a mutual passion for technology, learning, and innovation. Job Responsibilities - Interpret customer software and system validation requirements to identify specific modeling needs. - Develop, optimize, and validate system models using C/C++/SystemC. - Integrate and validate models/platforms within larger hierarchies. - Implement production software stacks on Virtual/Hybrid platforms. - Assist customers in diagnosing software launch and system validation issues. - Create custom flows between third-party tools and Cadence Virtual/Hybrid tooling. Qualifications - BE/BTech/ME/MS/MTech in Computer Science/Electrical/Electronics. Experience And Technical Skills - 8+ years of relevant experience in Virtual/Hybrid Prototyping. - Proficiency in C/C++/SystemC and scripting languages. - Strong understanding of computer architecture and embedded software stacks. - Ability to integrate flows involving debug and simulation tools. - Excellent debugging skills with a grasp of HW/SW interactions. Behavioral Skills - Strong written, verbal, and presentation skills. - Effective customer-facing interpersonal skills. - Leadership qualities that drive growth and innovation. - Ability to collaborate across functions and geographies. - Commitment to raising standards while upholding integrity. Join us in tackling challenges that others cannot solve.,

The main responsibilities in this role include developing C++/SystemC models for complex ASIC IPs, SOCs, and Flash Memories. You will be required to create System Level Tests and/or Standalone Unit Tests to verify the models. It is important to be focused on meeting schedules and maintaining the quality of deliverables. Additionally, providing timely support to stakeholders to enable software bring-up will be a key aspect of the role. To be considered for this position, you should hold a B.E/B.Tech or M.E/M.Tech degree in Electronics, Computer Science, or related fields. The ideal candidate will have 2-8 years of relevant experience. Proficiency in SystemC/TLM, C++, and C is required. Hands-on experience in developing functional/approximately timed models using SystemC/C++ and embedded system test development using C is essential. The successful candidate should demonstrate the ability to troubleshoot and analyze complex problems, as well as have a strong understanding of Digital Fundamentals. Candidates should possess the ability to multitask, meet deadlines, and work well within a team. Being a fast learner with good written and verbal communication skills is crucial. Preferred skills for this role include an understanding of Computer Architecture, SoC, CPU (ARC/ARM/RISC-V/etc.), Bus Architectures, and RTOS. Exposure to scripting languages like Python, experience with the Visual Studio programming environment, and working knowledge of Interface Protocols like PCIe, AXI, USB, UFS, NVMe, and SD are also advantageous.,

At Cadence, we are on a mission to hire and nurture leaders and innovators who are eager to make a significant impact in the realm of technology. With over 30 years of expertise in computational software, Cadence stands as a key player in electronic design. Our Intelligent System Design strategy enables us to provide software, hardware, and IP solutions that bring design ideas to life. Our clientele consists of the most forward-thinking companies globally, producing remarkable electronic products across various dynamic market segments such as hyperscale computing, automotive, 5G communications, aerospace, industrial, consumer electronics, and healthcare. The Cadence Advantage: - You will have the chance to engage with cutting-edge technology in an environment that values creativity, innovation, and impact. - Our employee-centric policies prioritize the well-being of our workforce, career progression, continuous learning opportunities, and recognition of achievements tailored to individual needs. - Our unique One Cadence - One Team culture fosters collaboration within and between teams to ensure customer success. - We offer diverse avenues for learning and professional development based on individual requirements and interests. - Join a diverse team of dedicated individuals who are committed to exceeding expectations for our customers, communities, and each other every day. As a member of the Cadence Solutions Organization, you will collaborate closely with our global customers to construct Virtual/Hybrid prototypes that facilitate early software development and system validation. This involves comprehending customer requirements, analyzing hardware specifications, constructing precise and high-performance models/platforms, and implementing Cadence solutions for practical use. You will have the opportunity to broaden and deepen your technical expertise, gain exposure to the latest hardware and software architectures, and stay abreast of advancements in model-based systems engineering/hybrid prototyping. Being primary users of Cadence Virtual and Hybrid tools, along with a profound understanding of customer expectations, you will provide invaluable feedback to product teams for continual enhancement of tools and technologies. This role offers an exceptional chance to work in a supportive and collaborative environment where mutual success, technology, learning, and innovation are deeply cherished. **Job Responsibilities:** - Comprehend customer software and system validation requirements to evaluate specific modeling needs. - Develop, optimize, and validate system models using C/C++/SystemC. - Integrate and validate models/platforms within larger hierarchies. - Implement production software stacks on Virtual/Hybrid platforms. - Assist customers in debugging software bring-up and system validation issues. - Contribute to building custom workflows between third-party tools and Cadence Virtual/Hybrid tooling. **Qualifications:** - BE/BTech/ME/MS/MTech in Computer Science/Electrical/Electronics. **Experience And Technical Skills:** - Minimum 8 years of relevant experience in Virtual/Hybrid Prototyping. - Proficiency in C/C++/SystemC and scripting languages. - Solid grasp of computer architecture and embedded software stacks. - Experience in integrating flows involving debug and simulation tools is preferred. - Exceptional debugging skills with an understanding of HW/SW interactions. **Behavioral Skills:** - Strong written, verbal, and presentation skills. - Effective customer-facing interpersonal skills. - Leadership qualities to foster growth and innovation. - Ability to collaborate across functions and geographies. - Drive to elevate standards while upholding integrity. Join us in our meaningful work and help us solve challenges that others cannot.,

As a Python Expert for Electronic Design Automation (EDA) tool development in Bangalore, your primary responsibility will include developing EDA tools for SoC design, integration, and verification. You will be tasked with modeling hardware design problems in software and automating the process. Additionally, you will create UML models for design data and generate code from these models. Your role will also involve creating data structures to store design data, populating them with structured data such as XML or HDL-Models, and producing code based on this data. To qualify for this position, you must hold a Bachelor's or Master's Degree in Electronics & Communication Engineering or VLSI with 1-4 years of relevant experience. Proficiency in Python/C++, data structures, algorithms, and object-oriented programming concepts is essential. Exposure to Artificial Intelligence, Machine Learning, and Deep Learning concepts is highly desirable. Previous experience in designing and coding software/EDA tools and familiarity with Verilog, VHDL, System Verilog, and SystemC are required. Understanding of UML modeling language is preferred, and experience with test automation frameworks like pytest or Google Test is beneficial. Desirable skills include proficiency in C++, SoC Design, and FPGA. We are looking for candidates who are eager to learn new technologies quickly, possess strong analytical skills to assess complex situations, and excel in exchanging technical information effectively. The role also requires good reporting and presentation abilities, along with a solid understanding of internal interfaces.,

At AMD, we strive to transform lives with our cutting-edge technology, enriching our industry, communities, and the world. Our mission is to develop innovative products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. Central to our mission is the AMD culture, where we continuously push the boundaries of innovation to address the world's most critical challenges. We are dedicated to achieving excellence in execution while fostering a work environment that values directness, humility, collaboration, and inclusivity of diverse perspectives. As a Senior Software Development Engineer at AMD, you will play a key role in the Datacenter team by developing high-performance I/O software for compute, storage, and network acceleration in hyperscale, virtualized data centers. Your responsibilities will involve designing and implementing embedded software for Linux and standalone products, specifically focusing on creating software subsystems to manage FPGA hardware solutions. We are looking for a dynamic engineer who is eager to learn and grow their skills while working with the latest FPGA technology. To excel in this role, you should have experience with C/C++, with knowledge of Python/System-C considered an advantage. Additionally, proficiency in software development within a Linux environment, firmware development, low-level driver development, register interface programming, as well as familiarity with general algorithms and data structures are essential. Experience with industrial standard devices such as Ethernet, PCIe, RDMA, and memory architectures like DDR/SDRAM/DMA is highly desirable. You should also have a proven track record of delivering high-quality software projects, experience in working on high-performance, low-latency, multi-threaded, high-throughput SRIOV-capable PCIe-subsystem drivers, and the ability to collaborate effectively with international teams. In this role, you will be responsible for iterative software development, involving coding, debugging, and creating regressions to ensure code performance meets specifications. You will also document code according to organizational standards and demonstrate a collaborative approach to learning and problem-solving. As a self-starter and team player, you will engage in mentoring, code reviews, and leveraging the expertise of others to enhance project outcomes. The ideal candidate for this position should hold a Bachelor's or Master's degree in Computer/Software Engineering, Computer Science, or a related technical discipline, with 5+ to 12 years of relevant experience. If you are passionate about driving innovation in software development and are excited to work on challenging projects that have a global impact, we encourage you to apply. Join us at AMD, where together we advance the future of technology and make a difference in the world. #LI-RP1,

Eviden, part of the Atos Group, with an annual revenue of circa 5 billion is a global leader in data-driven, trusted, and sustainable digital transformation. As a next-generation digital business with worldwide leading positions in digital, cloud, data, advanced computing, and security, it brings deep expertise for all industries in more than 47 countries. By uniting unique high-end technologies across the full digital continuum with 47,000 world-class talents, Eviden expands the possibilities of data and technology, now and for generations to come. Role: ASIC Verification Engineer Location: Bangalore (Whitefield) Experience: 3+ years Education: Bachelor's Degree (BE / BTech) or Master's Degree (ME / MTech) Verification Engineer integrating ASIC functional verification team. ASIC developed includes network controller, router, and cache coherence controller targeting Bull high-end servers and Bull high-performance ("big data" and "exascale" servers). Using Constraint-Random, Coverage Driven functional verification methodologies underlying UVM verification framework to ensure full and effective verification of complex ASIC. Main Responsibilities Acquire knowledge microarchitecture an ASIC unit by studying the specification and interacting with the logical design team. Write and perform the test plan in close cooperation with the logical design team. Develop coverage models and verification environments using UVM-SystemVerilog / C++. Write, maintain, and publish the verification specification. Monitor, analyze, and debug simulation errors. Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time. Produce a maintainable and reusable code across projects. Skills And Capacities Curious, demanding, and rigorous. Mastering object-oriented programming. Knowledge of UVM verification methodology (or equivalent) and SystemVerilog / SystemC hardware verification languages. Knowledge of Constraint-Random / Coverage-Driven verification environments development in SystemVerilog / C ++ (drivers / monitors, constraint random tests, checkers, and self-checking models and coverage models written in SystemVerilog-Covergroup / SVA). Knowledge of simulation tools and coverage database visualization tools. Effective in problems solving by rapidly identifying their root cause and developing patches or workarounds under tight timing constraints. #Eviden Let's grow together.,

As part of the ASIC modeling team, you will be responsible for developing, maintaining, and testing the NAND/SoC models using C/C++/SystemC. The SoC models aim to accurately capture the functionality of the controller chip that oversees the NAND storage. You should have 4 to 7 years of experience and possess expertise in DFT implementation and verification. Additionally, experience in MBIST implementation and verification, along with a strong grasp of DFT/MBIST fundamentals, is essential. You will be involved in tasks such as DRC Clean up, coverage improvement, and modifying MBIST algorithms. It would be beneficial to have knowledge in PERL/TCL Scripting/Python and using assertions for monitoring clock frequencies and test-related registers. Familiarity with yield analysis and improvement flow, understanding CLP constructs, and working in multi-voltage, multi-power design environments will be advantageous. Your expected roles will include architecting DFT based on the PETE, Design, and Customer specifications. A self-motivated, self-driven attitude with a thirst for learning is desirable for this position. The ideal candidate should hold a BE/Btech/Mtech/ME degree. Western Digital values diversity and believes that embracing various perspectives leads to the best outcomes. The company is dedicated to creating an inclusive environment where every individual can thrive through a sense of belonging, respect, and contribution. Western Digital is committed to providing equal opportunities to applicants with disabilities. If you require accommodations during the application process, please contact us at staffingsupport@wdc.com with details of your request, including the job title and requisition number.,

Qualcomm India Private Limited is seeking a Hardware Engineer with expertise in complex high-performance RTL design, particularly on DSP or processor based sub-systems. You should be proficient in hardware design using Verilog, System Verilog, or VHDL and have knowledge of on-chip bus interface protocols like AXI, APB, and AHB. Experience in model development (SystemC, or C++), RTL to gates synthesis (Synopsys DCG or Cadence Genus), design rule and CDC checking (SVA assertions, Spyglass, 0-in), and working on high-performance low power RTL design is essential. Familiarity with scripting languages such as PERL, Python, TCL, C, etc., is also required. As a Hardware Engineer at Qualcomm, your responsibilities will include developing micro-architecture, designing and documenting specific ASIC modules, and sub-systems. You will own the RTL, ensuring its development, assessment, and refinement to meet power, performance, area, and timing goals. Troubleshooting architecture, design, or verification issues using sound ASIC engineering practices, and leveraging various design tools to enhance design quality will be part of your role. Additionally, you will collaborate with the design verification team to execute the functional verification strategy and contribute innovative ideas for IP core and process flow enhancements. The ideal candidate should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with at least 2 years of Hardware Engineering experience. Alternatively, a Master's degree with 1+ years of relevant experience or a PhD in a related field will also be considered. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities. Reasonable accommodations can be requested by emailing disability-accommodations@qualcomm.com or calling Qualcomm's toll-free number. The company expects all employees to adhere to applicable policies and procedures, including those related to security and protection of confidential information. Please note that Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies are not authorized to use the site for submissions. Unsolicited resumes or applications from agencies will not be accepted. For further information about this role, reach out to Qualcomm Careers directly.,

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Adreno GPU has been the industry leading mobile graphics solution and has been the dominating GPU in todays smart phone market. Our power efficient GPU solution is fundamental to enable the exciting new markets like VR, IoT, AI, drone, autonomous driving etc. We are looking for talented Graphics System engineers to create world class GPU products to enable high performance graphics and compute with low power consumption. As a member of our Graphics System team, you will help create the simulator of our next generation graphics core for mobile devices. In this position, you will be responsible for development of the GPU architecture design using advanced modeling methodologies. You are expected to understand the design and implementation, define the development scope, develop the algorithm for some functional blocks, and verify the correctness of the design. You will be working with architects, designers, driver, and compiler teams to accomplish your tasks. Develop bitwise accurate functional models (C-model) (by using C/C++ etc.) to simulate our new architectures and solutions Develop solid test suites and perform functional verification & validation with the C-Model and RTL simulation Perform conformance tests, stress & random tests and stabilize GPUs & Compute systems Additional About The Role Additional About The Role Critical "Must Have" skills/experience for role Good understanding of modern 3D graphics pipeline. Programming experience in graphics or compute using API like DirectX, OpenGL OpenCL, Vulkan. Programming experience in modeling using C++ and good understanding of computer/GPU architecture and pipeline. Debugging and problem-solving skills. Ability to write clean, professional & maintainable code in C++. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Preferred skills/experience for role Knowledge on graphics/ray-tracing/compute architecture & pipeline (e.g., DirectX, OpenGL, OpenCL, Vulkan, etc.) C/C++/Perl/Python programming language Good communication skills and ability & desire to work as a team player. SystemC and TLM experience are desirable Agile development methodology experience is preferable Graphics & compute driver or compiler experience is a plus Verilog/Vera/System Verilog experience is a plus Required : Minimum Qualifications - Bachelor's or higher degree in Computer Engineering, Computer Science, Electrical Engineering, or related field. 8+ years Systems Engineering or related work experience Preferred Qualifications - Master's or higher degree in Computer Engineering or Computer Science. 7+ years Systems Engineering or related work experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: General Summary: Qualcomm is the world's leading developer of next generation of always on Display technologies and is committed to building a world-class organization that will lead the industry. Be part of the team developing next generation Display subsystems and Display peripherals. The ASIC Systems Architect is responsible for system architecture definition activities supporting a sophisticated multimedia Low Power Display subsystem catering to various market segments like mobile, XR, compute, IOT, Wearables and automotive products. Candidates will be responsible for all aspects of the ASIC hardware architecture definition/validation including the following: Owning end to end system architecture Capturing detailed technology requirements working closely with product, hardware and software engineering teams for deriving subsystem hardware specification. Engage with all stakeholders and collaborate with cross functional teams to define robust architecture Defining architecture validation plans and reviewing development results Optimization and debug via modelling, system simulation and testing across key criteria including power and performance. Collaborating, reviewing and enabling design and system teams to execute independently from the specifications Engage and provide support from Concept to Commercialization, Post-silicon commercialization support and customer engineering documentation Defining and patenting novel architectures that drive industry leadership. Job Function: Oversees hardware architecture for ASIC systems development for a variety of products. Determines architecture design, and validation via system simulation. Defines module interfaces/formats for simulation. Ability to analyze and solve complex problems through various mechanisms. Ability to optimize architecture for Area, Performance and power efficiency. Evaluates all aspects of the HW architecture flow from high-level development to validation and review. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. Uses System tools, such as, MathWorks MATLAB, SIMULINK, VISIO and other toolboxes. Uses language such as HDL, C/C++, System C, Perl, Python. Provides technical expertise for next generation initiatives. Leverages experience in image processing, SoC hardware and computer architecture concepts to develop proposals to address system Display requirements using processor, memory, bus and low-power design techniques. Uses expertise in low-power design methodology, optimization and validation using various CAD tools and design techniques to optimize system power. Leverages experience in digital system performance analysis and systems modelling to ensure performance goals met. Leverages Verilog/VHDL and digital hardware design tools such as Synopsys/Cadence/Mentor ASIC design and simulation tool sets, power analysis and simulation, scripting languages (Python, Perl, TCL, C, etc.) to optimize system. Effectively utilizes advanced problem solving and ASIC engineering practices to resolve complex architecture, design, or verification problems. Writes technical documentation and provides technical expertise for design or project reviews and project meetings. Acts as a tech lead on small to large projects and owns team deliverables of the project Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Minimum Qualifications: Bachelor's degree in, Electronics/Computer Science Engineering, or related field and 7+ years of ASIC design, verification, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, or related work experience. OR PhD in Science, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Highly skilled SystemC Modeling Engineer is required to join dynamic and innovative NoC Systems team in Qualcomm Bangalore Design Center. The ideal candidate will have a strong background in digital design and a deep understanding of SystemC for hardware modeling and simulation. This role involves developing and maintaining high-quality SystemC models for complex digital systems, collaborating with cross-functional teams, and ensuring that Qualcomm products meet the highest standards of performance and reliability. Key Responsibilities: Model Development: Design and implementation of SystemC models for digital systems, including processors, memory controllers, and peripheral interfaces. Methodology Awareness of Virtual prototypes and Performance modeling using C++/SystemC/TLM 2.0. Approximately timed and Loosely Timed(LT) style of coding for software development when using Virtual Prototype Verification: Development and executution of testbenches to verify the correctness and performance of SystemC models. Optimization: Optimization of models for simulation speed and resource efficiency. Documentation: Creation and maintenance of detailed documentation for models, testbenches, and verification plans. Collaboration: Work closely with hardware and software engineers to ensure seamless integration of SystemC models into the overall system design. Troubleshooting: Identify and resolve issues in the modeling and simulation process. Research: Stay updated with the latest advancements in SystemC and digital design techniques. Technical Skills Proficient in SystemC and C++. Strong understanding of digital design principles and techniques. Experience with hardware description languages (HDLs) such as Verilog is a plus. Familiarity with simulation tools and environments is a plus. Soft Skills Excellent problem-solving and analytical skills. Strong communication and collaboration abilities. Ability to work independently and in a team environment. Attention to detail and a commitment to quality. Preferred Skills Experience with Network-on-chip, high-performance computing and parallel processing. Knowledge of ASIC design. Familiarity with scripting languages (e.g., Python, Perl). Experience with version control systems (e.g., Git). Qualifications: Education: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. Experience: 5 to 10 years of experience in digital design and SystemC modeling. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

You will be joining Silicon Labs, a leader in secure, intelligent wireless technology known for its integrated hardware and software platform, intuitive development tools, and robust support. As a part of the Digital Architecture team, you will be involved in the research and development of digital architecture and IPs, covering compute engines, processors, audio and video subsystems, accelerators, peripherals, and system IP. Your role will focus on designing and implementing scalable and innovative digital architectures to support the business objectives of providing power-efficient solutions for low-power embedded wireless devices. Your responsibilities will include leading the evaluation and selection of digital technologies, collaborating with stakeholders to understand requirements, ensuring the security and reliability of digital systems, and providing technical leadership to developers and junior architects. You will also need to stay updated with industry trends and emerging technologies to drive innovation and effectively document and communicate architectural solutions. To be successful in this role, you should have demonstrated experience in defining and designing high-complexity designs, excellent understanding of embedded systems, and strong communication skills. Additionally, you should possess knowledge in low power design, HDL-based RTL logic design, front-end design tools, and debugging in simulation, FPGA, and silicon environments. Preferred experience in the design of microprocessors, math-centric designs, high-level software languages for modeling, and scripting skills will be advantageous. In return, you will not only work in a collaborative and learning-driven team but also enjoy benefits such as equity rewards, insurance plans, flexible work policy, and childcare support. If you are looking to relocate to HYDERABAD and want to be a part of a team that values innovation, simplicity, quality, and smart development processes, we encourage you to apply for the Staff Digital Architect position at Silicon Labs.,

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, you enable customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, Siemens has quite a lot to offer. The company blurs the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow's idea. Siemens takes what the future promises tomorrow and makes it real for customers today. Join Siemens, where your career meets tomorrow. Siemens is looking for Siemens EDA ambassadors. The Veloce Transactor Group, part of Mentor Emulation Division R&D located in Noida, develops transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile, etc. The Veloce Transactor Library currently supports more than 25 protocol solutions and is growing further. As an individual in this role, you will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Your primary responsibilities will include understanding standard specifications, developing architecture and micro-arch for the design, and writing a synthesized design using Verilog/System Verilog. Required Experience: - We are seeking a graduate with at least 1-5 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college. - Your experience with protocols such as PCIe, USB, Ethernet, AMBA in Design or Verification is valued. - A good understanding of IP Verification Methodologies, Verification procedures, and practices are a plus. Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc., is beneficial. - Expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, will greatly contribute to the quality of Siemens products. - Candidates should be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes. - Exposure to object-oriented programming languages like C++ is considered an advantage. Experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. Engagement with customers for Deployment and R&D assistance is required. Siemens has a lot to offer, how about you Siemens - where we are always challenging ourselves to build a better future. With some of the most inquisitive minds working across the world, re-imagining the future and doing extraordinary things.,

You will be responsible for leading the verification efforts for complex System on Chips (SoCs) and multi-chiplet System on Packages at Krutrim. This includes developing verification plans, testbench environments, and reusable verification IP. You will work on module, sub-systems, chiplets, and complex multi-chiplet testbench environments. Additionally, you will be involved in developing UVM and C/Python based testbench environments for functional, netlist, and power simulations. You will also contribute to developing reference models using System Verilog/SystemC/Python and improving verification flow and methodology. Debugging design units using simulation and formal tools and methodologies will be part of your responsibilities. Collaboration with Architects, Systems, and Software engineering teams on post-silicon debug in the lab is also expected. To qualify for this role, you should have a Bachelor's/Masters degree in Electronics Engineering and a minimum of 10 years of experience in verification of complex SoC designs. Proficiency in System Verilog, SVA, and UVM for code development is essential. Deep knowledge and experience of metric-driven verification methodology and flow are required. You should have extensive experience with various state-of-the-art simulation and formal tools, as well as expertise in verification of CPU/DPU/GPU based sub-systems. Experience with industry standard protocols such as CXL, PCIe, UCIe, and Ethernet protocols will be beneficial. Join Krutrim to be part of the team that is shaping the future of AI computing through cutting-edge silicon design.,

As the owner of Ethernovia's India digital hardware team, you will be responsible for all aspects of digital design and digital verification. This position requires both hands-on technical contribution as well as managerial and technical leadership. You will hire and build your own team to plan and execute the design, verification, and validation of advanced automotive communication semiconductors and systems. Key Qualifications: - BS and/or MS in Electrical Engineering, Computer Science, or related field - Minimum 15+ years combined of ASIC design, verification, and leadership experience - Strong understanding of ASIC design and verification fundamentals and industry standard methodologies - Experience with Verilog/System Verilog, UVM, Python, TCL, C/C++ - Experience with the full verification flows, from spec to coverage analysis to gate level sims with SDF - Experience with all aspects of digital SoC design, from micro-architecture specification, RTL, verification, synthesis, lint, CDC, LEC, and static timing analysis to deliver a design meeting target power, performance, and area goals - Successful track record of leading and growing a digital hardware team - Debugging failures in simulation to root cause problems - Self-motivated and able to work effectively both independently and collaboratively - Startup attitude and expected compensation required Additional Success Factors: - Experience in any of the following areas: Networking (PCIe, Ethernet, MAC, PHY, Switching, TCP/IP, security, and other industry standard protocols), Video standards, protocols, processing, Digital signal processing filters, Third party IP (SerDes, controllers, processors, etc.), Modular and Reusable Testbench architecture, Design for re-use of pre and post-silicon tests and infrastructure, Automation of testbench creation, tests, regression, or EDA tools, Knowledge of SystemC and/or DPI Personal Skills: - Excellent communication/documentation skills - Attention to details - Collaboration across multidisciplinary and international teams What you'll get in return: - Technology depth and breadth expansion that can't be found in a large company - Opportunity to grow your career as the company grows - Pre-IPO stock options - Cutting-edge technology - World-class team - Competitive base salary - Flexible hours - Flexible vacation time to promote a healthy work-life balance,

As a part of this role, you will be focusing on the development of Virtual models using C++. Your key responsibilities will include designing, implementing, and testing these models. A strong skill set in SystemC, C++, C, Embedded Systems, and Linux kernel will be essential for excelling in this position. Your expertise in these areas will be crucial in contributing to the successful creation and refinement of these virtual models.,

Experience Level: Over 4 years Location: Bangalore Skills: Proficiency in SystemC, C++, and SV/Verilog, coupled with hands-on coding experience in these languages. Strong aptitude for debugging and effective communication. Familiarity with scripting languages (desirable). Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore