110 Systemc Jobs - Page 5

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Summary: Position for 5-8 years of experience in design verification of complex Qualcomm propriety DSP/NPU IP DSP team is responsible for delivering high-performance DSP/NPU cores which are at the heart of Qualcomm's multi-tier SoC roadmap targeted for mobile space, AI, Automotive and more. Qualcomm is one of the largest fabless semiconductor design companies in the world, generating over $35 Billion in annual revenues from chipsets and royalties from intellectual property. Job Responsibilities: Drive design verification of DSP IP by working with a global DSP design team involving architecture, implementation, power, post silicon and back-end teams. Implement and improve System Verilog/UVM Testbench Architecture. Develop and deploy new verification methodologies, automation to continuously improve quality and efficiency. Develop design corresponding test plans, architect and develop verification environments, and meet coverage goals. Hands-on simulations and ability to debug not only IP level, but Subsystem and SoC level fails and bugs. Complete all required verification activities at IP level and ensure high quality commercial success of our products. Assertions, simulation, formal verification (static property checking), HW-SW co-verification, constraint/HVL-based verification, simulation acceleration, emulation are all tools you will use on a daily basis. Responsible gate level simulation bring-up, gate level verification with timing simulations. Responsible for power aware RTL verification and gate level simulation. Skillset/Experience: 5-8 years experience in processor/ASIC design verification Solid background and understanding of Digital Design, Processor Architecture , Processor Verification and Power aware verification. Expertise in System Verilog Testbench Architecture and implementation. Experience in writing C based and assembly level testcases is preferred. Exposure to power aware implementation and verification using UPF is a plus. Experience with advanced verification techniques such as formal and assertions is a plus. Gate-Level Simulation and Debug 0-delay, timing annotated and power aware. Experience in System Verilog/UVM, and with simulators from Synopsys/Mentor/Cadence . Scripting/Automation Skills Perl, Python, Shell, Make file TCI . Solid analytical and debugging skills, strong knowledge of digital design and good understanding of Object Oriented Programming (OOP) concepts. Experience in Hardware verification languages (HVL) such as SystemVerilog testbench (OVM/UVM) and SystemC and Hardware description languages (HDL) such as Verilog, SystemVerilog is preferred. Experience in verification of Processor subsystems is preferred. Experience in creating validation suite and building automation. Should have excellent inter-personal and communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.You may e-mail or call Qualcomm's toll-free number found . To all Staffing and Recruiting Agencies :

We are looking for a talented Modelling Engineer with strong skills in C/C++ programming and CPU/IP/SoC modeling. The ideal candidate should have hands-on experience in developing models, debugging, and a solid understanding of computer architecture. Key Responsibilities: Develop and maintain models for CPU, IP, or SoC components. Apply object-oriented design principles and debugging techniques. Work independently to address complex technical requirements. Collaborate with architecture and design teams to ensure accurate modeling. Mandatory Skills: 1-3 years experience in CPU/IP/SoC modeling. Strong C/C++ programming and debugging skills. Knowledge of virtual memory, exceptions, and cache systems. Good to Have: ARM architecture knowledge. SystemC, TLM, Fast Models experience. Python/Shell scripting

Experience : 3 to 10 Years Qualification : Bachelors or Masters (Electronics and Communication Engineering or equivalent) Job Description: As an Emulation Engineer, youll be an integral part of a dynamic team dedicated to creating cutting-edge ASIC solutions for High-Performance Computing (HPC) systems. Your role will involve defining the validation strategy leading to functional sign-off for these high-performance computing designs. Key functions and responsibilities: Proficient in various emulation technologies, including simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, and hybrid methods. Familiarity with tools such as Palladium, Protium, Veloce, or Zebu. Good Knowledge of SystemC/C/C++ and UVM/SV verification languages Experience with SystemVerilog and C++ for modelling RTL components and transactors. Ability to develop C/C++/SystemC/SV tests in HDL-HVL (Hardware Description Language-Hardware Verification Language) Co-emulation platforms. Understanding of compilation and build flow. Skilled at building images from scratch, making necessary design modifications to adapt to emulation. Work closely with verification teams to define and implement comprehensive pre and post silicon test plans. Interface effectively with design, verification, validation, and software development teams to understand their needs from an emulation perspective. Experience in architecting emulation systems for various design scales (IP blocks, SOC, multi-chip systems). Balancing performance and ease of debug. Proficient in post-silicon bring-up, debugging, and issue reproduction on emulators. Familiarity with Python and TCL scripting languages. Exposure to domains such as PCIe, CXL, DDR, Flash, Memory, USB, and CPU. Strong communication and collaboration skills to work effectively with cross-functional teams and domain experts. Successfully manage multiple design releases and provide support for debugging customer issues.

Project Role : Performance Engineer Project Role Description : Diagnose issues that an in-house performance testing team has been unable to. There are five aspects to Performance Engineering:software development lifecycle and architecture, performance testing and validation, capacity planning, application performance management and problem detection and resolution. Must have skills : Vmware Virtualization Administration Good to have skills : NAMinimum 12 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Performance Engineer, you will engage in diagnosing complex issues that the in-house performance testing team has been unable to resolve. Your typical day will involve collaborating with various teams to analyze performance metrics, conducting thorough assessments of application performance, and implementing strategies to enhance system efficiency. You will also be responsible for validating performance testing results and ensuring that applications meet the required performance standards, contributing to the overall success of the software development lifecycle and architecture. Roles & Responsibilities:- Expected to be an SME.- Collaborate and manage the team to perform.- Responsible for team decisions.- Engage with multiple teams and contribute on key decisions.- Provide solutions to problems for their immediate team and across multiple teams.- Conduct performance assessments and recommend improvements based on findings.- Facilitate knowledge sharing sessions to enhance team capabilities.- Deploy, maintain, and operate the virtualization infrastructure in strict adherence with the defined procedures with the aim of highest operational stability.- Execute, maintain and improve the operational processes and activities, deliver according to the highest quality and standards, ensuring high service delivery levels, compliance and customer satisfaction.- Conduct incident investigation, communication and resolution.- Perform out of business hours support activities and participate to on-call rotation.- Create, maintain and report KPIs.- Support internal and external audits activities, as well as resolution of findings.- Strictly adhere to corporate processes, standards, policies and operational procedures.- Investigate and implement operations automation where relevant. Professional & Technical Skills: - Must To Have Skills: Proficiency in VMware Virtualization Administration.- Good To Have Skills: Experience with Nutanix Administration.- Strong understanding of performance testing methodologies and tools.- Experience in capacity planning and application performance management.- Proficient in problem detection and resolution techniques.- Excellent knowledge of the following solutions and technologies:RHEL, VMware ESX in a stretched cluster deployment, VMware VCF, disk storage replication, Python, Ansible, Terraform, Jira. Knowledge of alternative hypervisor solutions such as Nutanix or Huawei DCS is a plus.- Very strong customer-oriented mindset and attitude, experience in interacting with both internal and external customers.- Previous experience (5 years) in a similar role operating a highly critical virtualization infrastructure within a financial environment. Additional Information:- The candidate should have minimum 7-10 years of experience in VMware Virtualization Administration.- This position is based at our Hyderabad office.- A 15 years full time education is required. Qualification 15 years full time education

Project Role : Performance Engineer Project Role Description : Diagnose issues that an in-house performance testing team has been unable to. There are five aspects to Performance Engineering:software development lifecycle and architecture, performance testing and validation, capacity planning, application performance management and problem detection and resolution. Must have skills : Vmware Virtualization Administration Good to have skills : NAMinimum 12 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Performance Engineer, you will engage in diagnosing complex issues that the in-house performance testing team has been unable to resolve. Your typical day will involve collaborating with various teams to analyze performance metrics, conducting thorough assessments of application performance, and implementing strategies to enhance system efficiency. You will also be responsible for validating performance testing results and ensuring that applications meet the required performance standards, contributing to the overall success of the software development lifecycle and architecture. Roles & Responsibilities:- Expected to be an SME.- Collaborate and manage the team to perform.- Responsible for team decisions.- Engage with multiple teams and contribute on key decisions.- Provide solutions to problems for their immediate team and across multiple teams.- Conduct performance assessments and recommend improvements based on findings.- Facilitate knowledge sharing sessions to enhance team capabilities.- Deploy, maintain, and operate the virtualization infrastructure in strict adherence with the defined procedures with the aim of highest operational stability.- Execute, maintain and improve the operational processes and activities, deliver according to the highest quality and standards, ensuring high service delivery levels, compliance and customer satisfaction.- Conduct incident investigation, communication and resolution.- Perform out of business hours support activities and participate to on-call rotation.- Create, maintain and report KPIs.- Support internal and external audits activities, as well as resolution of findings.- Strictly adhere to corporate processes, standards, policies and operational procedures.- Investigate and implement operations automation where relevant. Professional & Technical Skills: - Must To Have Skills: Proficiency in VMware Virtualization Administration.- Good To Have Skills: Experience with Nutanix Administration.- Strong understanding of performance testing methodologies and tools.- Experience in capacity planning and application performance management.- Proficient in problem detection and resolution techniques.- Excellent knowledge of the following solutions and technologies:RHEL, VMware ESX in a stretched cluster deployment, VMware VCF, disk storage replication, Python, Ansible, Terraform, Jira. Knowledge of alternative hypervisor solutions such as Nutanix or Huawei DCS is a plus.- Very strong customer-oriented mindset and attitude, experience in interacting with both internal and external customers.- Previous experience (5 years) in a similar role operating a highly critical virtualization infrastructure within a financial environment. Additional Information:- The candidate should have minimum 7-10 years of experience in VMware Virtualization Administration.- This position is based at our Hyderabad office.- A 15 years full time education is required. Qualification 15 years full time education

Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Required technical and professional expertise 5 + years of experience in Functional Verification of Processors or ASICs. Minimum 3+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Multi-processor cache coherency, Memory subsystem, IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Preferred technical and professional experience Verify the different functions/components in a PCI Express Controller & high speed SERDES (PHY). Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug Formal verification experience

You will be responsible for developing Simulation models of IBM Enterprise Power Systems and Processors. You will work on design, development, test and support of the Simulation models for IBM Power Servers. You will be involved in defining and implementing high performance software by demonstrating a strong understanding of Embedded Hardware Design. You will contribute in developing an environment of continuous improvement across product lines and development groups. Define, design, implement and test software applications using a variety of technologies, including, but not limited toC/C++, Linux, Python, GIT and scripting languages. Interact with the test team to define test plans and test data; identify reproduce and defects; fix and verify defects. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 6+ years of Firmware / Simulation design and development experience. Strong understanding of the CPU Architecture Experience to the Processor or other Hardware Simulation Should be able to understand the Processor Instruction Set Proven Programming skills in C Programming and Python scripting Good knowledge of low level software stacks , operating systems and device drivers. Experience with Git, Gerrit , Jenkins , Perl / Python. Knowledge to enterprise server domain and its firmware development. Experience with simulation tools and languages like Simics, QEMU, SystemC or Virtualizer on Linux is required Experience with virtual platform development and bringup of firmware is required. Exposure to Agile methodology with project management and defect tracking with Jira, Github, Bugzilla or similar. Understanding of code versioning and test CI tools like Git Hub Enterprise, Gerrit and Jenkins or Travis. Preferred technical and professional experience QEMU model development experience C proficiency.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Required education Bachelor's Degree Required technical and professional expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails

We are seeking an experienced System on Chip (SoC) Architect to join our development team. The ideal candidate will be involved in designing, integrating, and optimizing SoC hardware architectures and ensuring seamless software-hardware co-development. You have: Bachelors Degree in Electrical Engineering, Computer Engineering, or a related field (Masters or Ph.D. preferred). Overall,15+ years of experience as a Chip design expert. 8+ years of proven experience in IC design, SoC architecture, or a similar role. Proficiency in hardware description languages: Verilog, VHDL, and System Verilog Expertise in EDA tools for IC design and verification: Mentor Graphics, Cadence, or Synopsys Strong understanding of SoC architecture, including processor, memory subsystem, and interconnects (e.g., AXI, AMBA). Experience with hardware-software co-design and debugging tools. Knowledge of low-power design techniques and methodologies. Strong scripting skills in Python, Tcl, or Perl for automation. Tools : MATLAB/Simulink, Microsoft Visio, Mentor Graphics QuestaSim It would be nice if you also had: Familiarity with high-level modeling tools like SystemC. Knowledge of advanced packaging technologies (e.g., Chiplets, 3D ICs). Exposure to machine learning or AI accelerators in SoC design. Develop SoC architectures for advanced applications, ensuring scalability, performance, and power efficiency Lead hardware design and integration processes, including RTL coding, synthesis, and verification Collaborate with software teams to ensure efficient software-hardware co-design and integration Perform system-level modeling and simulations to validate architectural choices Guide SoC implementation, including floor planning, physical design, and timing closure Follow best practices for IC design and manufacturing Analyze system requirements, identify bottlenecks, and propose innovative solutions