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Qualcomm
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SoC STA/Timing Engineer

SoC STA/Timing Engineer

Qualcomm

2 - 7 years

4 - 9 Lacs

Bengaluru

Posted:2 weeks ago| Platform:

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Skills Required

perl tcl sta python hardware engineering dsp physical design soc simulation vhdl floorplan rtl design fpga drc synthesis technical writing primetime lvs timing analysis rtl verilog physical verification floor planning timing closure pnr gds

Work Mode

Work from Office

Job Type

Full Time

Job Description

Job Area: Engineering Group, Engineering Group > Hardware Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.Qualifications:

Bachelor’s or Master’s degree from a top-tier institute.

5+ years of experience in STA/Timing from product-based companies.

Job :

STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.

Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.

Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.

Evaluate multiple timing methodologies/tools on different designs and technology nodes.

Work on automation scripts within STA/PD tools for methodology development.

Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment

Experience in design automation using TCL/Perl/Python.

Familiar with digital flow design implementation RTL to GDS ICC, Innovous , PT/Tempus

Familiar with process technology enablementCircuit simulations using Hspice/FineSim, Monte Carlo.

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SoC STA/Timing Engineer