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0.0 - 5.0 years

0 Lacs

Mumbai, Maharashtra

On-site

Kenvue is currently recruiting for a: Manager, , Global Aggregate Reporting and Risk Management What we do At Kenvue, we realize the extraordinary power of everyday care. Built on over a century of heritage and rooted in science, we’re the house of iconic brands - including NEUTROGENA®, AVEENO®, TYLENOL®, LISTERINE®, JOHNSON’S® and BAND-AID® that you already know and love. Science is our passion; care is our talent. Who We Are Our global team is ~ 22,000 brilliant people with a workplace culture where every voice matters, and every contribution is appreciated. We are passionate about insights, innovation and committed to delivering the best products to our customers. With expertise and empathy, being a Kenvuer means having the power to impact millions of people every day. We put people first, care fiercely, earn trust with science and solve with courage – and have brilliant opportunities waiting for you! Join us in shaping our future–and yours. Role reports to: Associate Director GARRM Team Lead Location: Asia Pacific, India, Maharashtra, Greater Mumbai Work Location: Fully Onsite What you will do Kenvue is currently recruiting for: Manager, Global Aggregate Reporting and Risk Management (GARRM) This position reports into the Associate Director, GARRM Team Lead and is based in Mumbai, India. Who we are At Kenvue, we realize the extraordinary power of everyday care. Built on over a century of heritage and rooted in science, we’re the house of iconic brands - including NEUTROGENA®, AVEENO®, TYLENOL®, LISTERINE®, JOHNSON’S® and BAND-AID® that you already know and love. Science is our passion; care is our talent. Our global team is made by 22,000 diverse and brilliant people, passionate about insights, innovation and committed to deliver the best products to our customers. With expertise and empathy, being a Kenvuer means to have the power to impact life of millions of people every day. We put people first, care fiercely, earn trust with science and solve with courage – and have brilliant opportunities waiting for you! Join us in shaping our future–and yours. Role reports to: Associate Director, GARRM Team Lead Location: Mumbai, India Travel %: 10 What you will do The Manager, Global Aggregate Reporting and Risk Management (GARRM) will be responsible for core safety deliverables including scheduled aggregate reports, Risk Management Plans (RMPs) and Company Core Data Sheets (CCDS) and will serve as the report owner for assigned reports within Medical Safety for Kenvue products. The Manager is an aggregate reporting expert and will have in-depth product knowledge to support daily activities including planning, conducting meetings, database searching, aggregate safety analysis and case level review, writing, project management/coordination of strategic safety documents, and oversight of deliverables produced by other team members. The Manager provides subject matter expertise and technical guidance on functional requirements and enhancements to meet emerging global regulatory requirements and implementation of global aggregate reporting solutions and training, monitors compliance metrics and implements corrective and preventative actions to remediate non-conformance issues. She/he will partner with team members, stakeholders including Global Risk Assessment and Safety Physicians (GRASPs), Qualified Person for Pharmacovigilance (QPPV), Signal Detection and Management (SDM), Global Case Management (GCM), Epidemiology, Regulatory Affairs, Clinical, Medical Affairs, Global PV System Operations (GPSO), Local Pharmacovigilance (LPV), and contracted vendor organizations. Key Responsibilities Ensure timely, quality reports/safety analyses related to core deliverables as appropriate: Collaborate with GRASP, QPPV (where applicable), and other stakeholders on strategy development Provide oversight of staff involved in aggregate reporting Develop quality systems and procedures for the aggregate analysis and reporting of adverse effects related to Consumer products, to assure regulatory compliance with company standards and regulatory requirements Initiate/Conduct/Oversee searches of internal and external databases Perform management review of all vendor-produced materials (e.g. draft reports and assessment responses); and/or lead aggregate safety analysis and case level review Author, contribute, and coordinate the preparation of core safety deliverables Prepares global aggregate reports for local authorities Ensure compliance (quality, procedures, regulations, consistency) and commitments (e.g., Pharmacovigilance Agreements (PVAs), assessment reports) are met, where applicable Partner with vendor to develop reports/deliverables Develop and maintain global pharmacovigilance aggregate reporting processes and procedures in compliance with regulatory requirements. Lead and manage a team of pharmacovigilance professionals to ensure timely and accurate submission of aggregate reports. Collaborate with cross-functional teams to ensure timely and accurate data collection and analysis for aggregate reporting. Stay up-to-date with regulatory changes and industry trends related to pharmacovigilance aggregate reporting and implement necessary changes to processes and procedures. Develop and maintain systems, tools and processes for drug safety operations. Participate and/or lead cross-functional training of relevant stakeholders and colleagues. Act as product or process Subject Matter Expert (SME) during audits/inspections. Daily management of vendor activities and responsibility for compliance with SOPs/WIs, global regulations/guidelines by either onsite or offshore resources. Performs training, onboarding, and oversight of offshore vendor. Participate or lead department and/or cross-functional initiatives. Contributes metrics and ensures quality, compliance, and timeliness of aggregate safety reports. What we are looking for Required Qualifications Bachelor’s degree required (health/life sciences field) 10 years of experience in the pharmaceutical or related industry with 5 years of experience in Pharmacovigilance Proven experience working in matrix environment and cross-functional teams Comprehensive clinical/medical writing experience Strong English verbal and written communication skills Strong knowledge of global pharmacovigilance regulations and guidelines (i.e., ICH, GVP, etc.). Ability to work collaboratively with cross-functional teams. Strong analytical and problem-solving skills. Desired Qualifications Advanced degree (e.g., MS, MPH, MSN, PharmD, RPh, PhD, etc.) preferred Strong leadership and presentation skills. Experience in developing and implementing drug safety policies and operating procedures. Ability to work in a fast-paced environment and manage multiple projects simultaneously. SME with in-depth product knowledge of assigned products; knowledge and hand-on experience in aggregate reports writing and compliance management. In-depth working knowledge of AE safety databases to identify system enhancements and efficiencies. What’s in it for you Competitive Benefit Package* Paid Company Holidays, Paid Vacation, Volunteer Time, Summer Fridays & More! Learning & Development Opportunities Employee Resource Groups This list could vary based on location/region Note: Total Rewards at Kenvue include salary, bonus (if applicable) and benefits. Your Talent Access Partner will be able to share more about our total rewards offerings and the specific salary range for the relevant location(s) during the recruitment & hiring process. Kenvue is proud to be an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, age, national origin, or protected veteran status and will not be discriminated against on the basis of disability. If you are an individual with a disability, please check our Disability Assistance page for information on how to request an accommodation.

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0.0 - 31.0 years

1 - 1 Lacs

Bhubaneswar

On-site

Responsibilities and essential job functions include but are not limited to the following: Acts with integrity, honesty, and knowledge that promote the culture and values of TATA Starbucks. Anticipates customer and store needs by constantly evaluating environment and customers for cues. Maintains a calm demeanor during periods of high volume or unusual events to keep store operating to standard and to set a positive example for the shift team. Develops enthusiastically satisfied customers all of the time. Welcomes and connects with every customer. Discover customer needs and appropriately suggests product with every customer to enhance service and meet sales goals. Responds to customer needs and says thank you to every customer. Demonstrates the "Just Say Yes" behavior by taking care of customer needs. Delivers legendary customer service to all customers by acting with a customer comes-first attitude. Assists with new partner training by positively reinforcing successful performance and giving respectful and encouraging coaching as needed. Contributes to a positive team environment by recognizing changes in partner behaviors that might signal potential problems or changes in partner morale and performance and communicating the changes to the immediate supervisor/store manager. Follows TATA Starbucks operational policies and procedures, including those for cash handling and safety and security, to ensure the safety of all partners during each shift. Maintains a clean and organized workspace so that partners can locate resources and product as needed. Maintains regular and consistent attendance and punctuality. Provides quality beverages, whole bean, and food products consistently for all customers by adhering to all recipe and presentation standards. Follows health, safety and sanitation guidelines for all products. Recognizes and reinforces individual and team accomplishments by using existing organizational methods. Protects employees and customers by providing a safe and clean store environment. Follows store policy and procedures for operational flow at each station. Purpose and Scope of position-This position contributes to our success by: Providing legendary customer service to all customers. This job creates the Starbucks Experience for our customers by providing customers with prompt service, quality beverages and products, and maintaining a clean and comfortable store environment. Barista is responsible for modelling and acting in accordance with TATA Starbucks guiding principles. Required experience and education- No experience required Minimum education qualification 12th / Diploma + Competencies- Winning With Integrity Working Together Achieving Results Helping Others Succeed Living Our Misson And Values Making Every Customer Feel Special

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8.0 - 11.0 years

0 Lacs

Hyderabad, Telangana, India

On-site

HIH - Software Engineering Associate Advisor Position Summary Evernorth, a leading Health Services company, is looking for exceptional data engineers/developers in our Data and Analytics organization. In this role, you will actively participate with your development team on initiatives that support Evernorth's strategic goals as well as subject matter experts to understand business logic you will be engineering. As a software engineer, you will help develop an integrated architectural strategy to support next-generation reporting and analytical capabilities on an enterprise-wide scale. You will work in an agile environment, delivering user-oriented products which will be available both internally and externally by our customers, clients, and providers. Candidates will be provided the opportunity to work on a range of technologies and data manipulation concepts. Specifically, this may include developing healthcare data structures and data transformation logic to allow for analytics and reporting for customer journeys, personalization opportunities, pre-active actions, text mining, action prediction, fraud detection, text/sentiment classification, collaborative filtering/recommendation, and/or signal detection. This position will involve taking these skills and applying them to some of the most exciting and massive health data opportunities that exist here at Evernorth. The ideal candidate will work in a team environment that demands technical excellence, whose members are expected to hold each other accountable for the overall success of the end product. Focus for this team is on the delivery of innovative solutions to complex problems, but also with a mind to drive simplicity in refining and supporting of the solution by others Job Description & Responsibilities Be accountable for delivery of business functionality. Work on the AWS cloud to migrate/re-engineer data and applications from on premise to cloud. Responsible for engineering solutions conformant to enterprise standards, architecture, and technologies Provide technical expertise through a hands-on approach, developing solutions that automate testing between systems. Perform peer code reviews, merge requests and production releases. Implement design/functionality using Agile principles. Proven track record of quality software development and an ability to innovate outside of traditional architecture/software patterns when needed. A desire to collaborate in a high-performing team environment, and an ability to influence and be influenced by others. Have a quality mindset, not just code quality but also to ensure ongoing data quality by monitoring data to identify problems before they have business impact. Be entrepreneurial, business minded, ask smart questions, take risks, and champion new ideas. Take ownership and accountability. Experience Required 8 - 11 years of experience in application program development Experience Desired Knowledge and/or experience with healthcare information domains. Documented experience in a business intelligence or analytic development role on a variety of large-scale projects. Documented experience working with databases larger than 5TB and excellent data analysis skills. Experience with TDD/BDD Experience working with SPARK and real time analytic framework Education And Training Required Bachelor’s degree in Engineering, Computer Science Primary Skills PYTHON, Databricks, TERADATA, SQL, UNIX, ETL, Data Structures, Looker, Tableau, GIT, Jenkins, RESTful & GraphQL APIs. AWS services such as Glue, EMR, Lambda, Step Functions, CloudTrail, CloudWatch, SNS, SQS, S3, VPC, EC2, RDS, IAM Additional Skills Ability to rapidly prototype and storyboard/wireframe development as part of application design. Write referenceable and modular code. Willingness to continuously learn & share learnings with others. Ability to communicate design processes, ideas, and solutions clearly and effectively to teams and clients. Ability to manipulate and transform large datasets efficiently. Excellent troubleshooting skills to root cause complex issues About Evernorth Health Services Evernorth Health Services, a division of The Cigna Group, creates pharmacy, care and benefit solutions to improve health and increase vitality. We relentlessly innovate to make the prediction, prevention and treatment of illness and disease more accessible to millions of people. Join us in driving growth and improving lives.

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0 years

0 Lacs

Bengaluru, Karnataka, India

On-site

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates. Requisition ID: 74531 Senior Electrical Engineer Responsibilities Architects, designs and verifies circuits, logic, systems, algorithms, etc. to meet product requirements Determine design approaches and parameters Develops innovative new designs for patenting or protecting as trade secret Demonstrates good judgment in solving a broad range of issues, based on an advanced understanding of industry practices and company policies and procedures Responsible for custom layout, including overseeing the work of layout designers Reports on design results through design reviews, in accordance with company quality requirements and resolves action items generated as a result of these reviews Attends design reviews to provide input and learn from other designers’ experiences Research design techniques through technical publications and seminars Supports marketing in product definition Having a wide-ranging experience uses professional concepts and company objectives to resolve complex issues in creative and effective way Determines methods and procedures on new assignments and may coordinate the activities of other personnel Requirements A technology-related master’s degree or equivalent training and 3 or more years of analog/mixed-signal design experience developing mixed-signal ICs Proven leadership in analog/mixed signal design projects Strong knowledge of engineering fundamentals Advanced knowledge of CMOS fabrication processes Advanced knowledge of MOS transistors and analog/digital circuit design Knowledge of complex AD/DC analysis (poles, zeros, compensation) Advanced signal analysis knowledge Basic understanding of CMOS and BCD parasitic junctions and the risks associated with them Strong parasitic analysis knowledge (capacitance, resistance, power grid) Advanced knowledge of circuit building blocks (e.g., OPAMP, gm-C filters, switch capacitors, ADC, DAC, state-machines, and bus interfaces) Advanced design skills in system modeling Strong knowledge of UNIX, Matlab, and circuit simulation tools Proficiency in layout verification, DRC, LVS Additional skills (one or more of these are highly desirable) Working knowledge of device physics Working knowledge of digital design and design flows System knowledge (e.g., High Performance PLLs) Knowledge of scripting language (python, shell, skill) Advanced laboratory measurement skills (analog, digital) Knowledge of MS Office documentation, spreadsheet, presentation tools or equivalent tools Excellent written and verbal presentation skill. Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.

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8.0 years

0 Lacs

Hyderabad, Telangana, India

On-site

Job Summary Key Responsibilities  Lead block-level PNR activities from floor planning through final routing, ensuring robust physical implementation aligned with timing, power, and area goals.  Drive power grid design and EM/IR-aware routing strategies to ensure block-level power integrity and reliability.  Collaborate closely with timing closure engineers to resolve physical design bottlenecks impacting timing and signal integrity.  Manage and optimize physical verification flows including DRC, LVS, antenna checks, and physical signoff.  Automate PNR flows and develop scripts to improve productivity and design quality.  Mentor and guide junior physical design engineers, fostering technical growth and best practices.  Coordinate with cross-functional teams including RTL design, STA, verification, and backend integration to ensure seamless block-to-chip integration. Qualifications and Skills 8+ years of experience in physical design with a strong focus on block-level Place and Route (PNR) for complex SoC/IP subsystems, preferably at advanced technology nodes (16nm, 7nm, 5nm, or below).  Proven expertise in block-level physical implementation including floorplanning, placement, clock tree synthesis (CTS), routing, and physical verification (DRC/LVS).  Hands-on experience with industry-standard PNR tools such as Cadence Innovus, Synopsys ICC2, and Mentor Calibre.  Strong understanding of power grid design, EM/IR analysis, signal integrity (SI), and reliability checks at the block level.  Experience in managing timing closure in coordination with STA teams, resolving congestion, and optimizing for power, performance, and area (PPA).  Proficiency in scripting languages (Tcl, Python, Perl) for flow automation and custom tool development.  Demonstrated ability to lead block PNR efforts, coordinate with RTL designers, physical design teams, and verification groups to meet aggressive tapeout schedules.  Familiarity with low-power design techniques and power- aware physical implementation.

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10.0 years

0 Lacs

Hyderabad, Telangana, India

On-site

Job Summary Static Timing Analysis (STA) & Place and Route (PNR) Key Responsibilities  Lead STA and PNR activities for complex subsystems, ensuring robust timing closure and physical implementation with a focus on power, performance, and area optimization.  Develop and refine methodologies for STA and PNR tailored to the unique challenges of large, multi-interface, or mixed-signal subsystems.  Drive automation and validation of timing and physical design data across subsystem boundaries.  Mentor and guide junior engineers, fostering technical growth and knowledge sharing within subsystem teams.  Collaborate cross-functionally to resolve design, timing, and physical implementation challenges specific to complex subsystem integration.  Exhibit excellent communication skills to present technical solutions and lead discussions with internal teams and customers, especially regarding subsystem-level trade-offs and integration Qualifications and Skills 10+ years of experience in Static Timing Analysis (STA) and Place and Route (PNR) for complex subsystems within ASIC/SoC design, including advanced technology nodes (7nm, or below).  Demonstrated expertise in STA tools (e.g., Synopsys PrimeTime, Cadence Tempus) and PNR tools (e.g., Synopsys ICC2, Cadence Innovus) applied to large, multi-block or hierarchical subsystems.  Proven track record in timing closure, floorplanning, placement, clock tree synthesis, routing, and physical verification for high-complexity subsystems.  Proficient in scripting languages (Tcl, Perl, Python) for automating STA and PNR flows across multiple subsystem blocks.  Deep understanding of SoC design flows, with experience collaborating across frontend, physical design, and verification teams to integrate complex subsystems.  Experience with IP collateral generation and quality assurance for timing and physical design at the subsystem level preferred.  Background high-speed interfaces, or mixed-signal SoC subsystems

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8.0 years

0 Lacs

Hyderabad, Telangana, India

On-site

Job Summary Key Responsibilities  Lead block-level PNR activities from floorplanning through final routing, ensuring robust physical implementation aligned with timing, power, and area goals.  Drive power grid design and EM/IR-aware routing strategies to ensure block-level power integrity and reliability.  Collaborate closely with timing closure engineers to resolve physical design bottlenecks impacting timing and signal integrity.  Manage and optimize physical verification flows including DRC, LVS, antenna checks, and physical signoff.  Automate PNR flows and develop scripts to improve productivity and design quality.  Mentor and guide junior physical design engineers, fostering technical growth and best practices.  Coordinate with cross-functional teams including RTL design, STA, verification, and backend integration to ensure seamless block-to-chip integration. Qualifications and Skills 8+ years of experience in physical design with a strong focus on block-level Place and Route (PNR) for complex SoC/IP subsystems, preferably at advanced technology nodes (16nm, 7nm, 5nm, or below).  Proven expertise in block-level physical implementation including floorplanning, placement, clock tree synthesis (CTS), routing, and physical verification (DRC/LVS).  Hands-on experience with industry-standard PNR tools such as Cadence Innovus, Synopsys ICC2, and Mentor Calibre.  Strong understanding of power grid design, EM/IR analysis, signal integrity (SI), and reliability checks at the block level.  Experience in managing timing closure in coordination with STA teams, resolving congestion, and optimizing for power, performance, and area (PPA).  Proficiency in scripting languages (Tcl, Python, Perl) for flow automation and custom tool development.  Demonstrated ability to lead block PNR efforts, coordinate with RTL designers, physical design teams, and verification groups to meet aggressive tapeout schedules.  Familiarity with low-power design techniques and power- aware physical implementation.

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2.0 years

0 Lacs

Pune, Maharashtra, India

On-site

At Iravan Technologies, we're on a mission to build next-gen silicon solutions, and our AMS Verification team is growing! Locations: Pune | Bangalore | Hyderabad What we’re looking for: 🔹 2+ years in AMS Verification 🔹 Hands-on with Cadence tools (Virtuoso, Spectre, AMS Designer) 🔹 Experience with ADCs, DACs, PLLs, complex mixed-signal IPs 🔹 RNM (Real Number Modeling) knowledge is a plus 🔹 Collaborative mindset & strong debugging skills M.Tech graduates with at least 1 year in Analog Design are also welcome! Why join us? Be part of high-impact projects for global semiconductor leaders, innovate alongside talented engineers, and grow your career in a dynamic, supportive environment. Interested or know someone perfect for this? Share your CV at: careers@iravan.tech Or comment hashtag #HiringNow #AMSVerification #AnalogMixedSignal #VLSICareers #SemiconductorJobs #VerificationEngineers #TechCareers #CadenceTools #UVMAMS #VLSIDesign #JoinIravan #LifeAtIravan #IravanTechnologies

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8.0 - 12.0 years

0 Lacs

Chennai

On-site

What you’ll do: The Technical Sales Manager will play a critical role in supporting the MTL Sales Leader to activate, accelerate, and amplify end-user engagement by promoting the MTL product range. This individual will serve as a technical expert, solution advisor, and trusted partner to the broader MTL sales team, end-users, consultants, and EPC contractors across a variety of industries including Oil & Gas, Petrochemical, Chemical, Marine, Pharmaceutical, Paints & Coatings, and Diversified Industrial Segments.This role will be pivotal in driving specifications, technical adoption, and solution-fitment of the MTL product portfolio at the early stages of the customer lifecycle and will work closely with internal and external stakeholders to build deep technical preference for MTL solutions. Act as the primary technical authority on MTL products (including signal conditioners, surge protection devices, fieldbus infrastructure, HMI/visualization systems, and barriers). Provide frontline technical consulting to the sales team, helping develop customized solutions that meet customer requirements and industry safety standards. Collaborate with product management and engineering teams to shape the right product strategies for complex projects and non-standard requests. Create and maintain solution blueprints, application notes, system architecture diagrams, and sizing guides Drive the adoption of MTL solutions by demonstrating total cost of ownership (TCO) benefits, reliability, safety, and compliance advantages. Qualifications: Bachelor’s Degree in Electrical / Instrumentation / Electronics Engineering (required); Master’s degree is a plus. 8–12 years of experience in technical sales, solution engineering, or application engineering in the industrial automation, instrumentation, or hazardous area equipment domain. Strong exposure to hazardous area equipment, intrinsically safe systems, signal conditioning, process control interfaces, or related technologies. Proven ability to engage and influence technical decision-makers in Oil & Gas, Petrochemical, Marine, Chemical, and similar industries. Familiarity with ATEX, IECEx, SIL, and other applicable industry standards. Skills: Exposure to control systems (DCS/PLC) integration. Knowledge of hazardous area classification and wiring practices. Prior experience with MTL or similar competing brands is a strong advantage Competencies: Deep technical understanding and a solution-oriented mindset. Strong communication and technical presentation skills. Proactive, with a hunter mindset in engaging new technical opportunities. Collaborative and capable of working in a matrixed sales environment. Ability to handle complex customer requirements and provide value-added advisory

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1.0 years

2 - 4 Lacs

Chennai

On-site

We are seeking an experienced PCB Design Engineer to join our team. The candidate will be responsible for designing and developing printed circuit boards (PCBs) for a wide range of electronic products. Responsibilities: Design complex and high-density PCBs using industry-standard software such as KiCad or OrCAD. Collaborate with electronic engineers to interpret schematics, specifications, and design requirements. Ensure compliance with industry standards, design rules, and manufacturing guidelines. Perform signal integrity analysis, electromagnetic compatibility (EMC) analysis, and thermal analysis. Prepare comprehensive documentation, including design files, Gerber files, and assembly drawings. Troubleshoot and resolve design issues, conduct design reviews, and provide technical support. We offer a competitive compensation package and opportunities for professional growth. If you are passionate about PCB design and electronics, we encourage you to apply for this exciting role. Job Type: Fresher Pay: ₹20,000.00 - ₹35,000.00 per month Ability to commute/relocate: Chennai, Tamil Nadu: Reliably commute or planning to relocate before starting work (Required) Education: Bachelor's (Preferred) Experience: PCB Design: 1 year (Preferred) License/Certification: PCB Design Course Certification (Required) Location: Chennai, Tamil Nadu (Required) Work Location: In person

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6.0 years

2 - 5 Lacs

Bengaluru

On-site

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout. With a minimum of 6 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design. You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart. Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques. You are adept at communicating effectively with cross-functional teams to ensure successful project execution. You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future. What You’ll Be Doing: Design and development of transistor-level analog and mixed-signal layout. Device level floorplan, placement, routing, and physical verification. Troubleshoot physical verification issues to achieve clean and desired results. Create and review layout documents to ensure they meet quality standards and are delivered on time. Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment. Collaborate with cross-functional teams to ensure successful project execution. The Impact You Will Have: You will drive the design and development of high-quality analog and mixed-signal layouts. Your expertise will ensure the successful implementation of CMOS and FINFET technologies. Through effective troubleshooting, you will contribute to achieving clean physical verification results. Your attention to detail will ensure that layout documents meet quality standards and deadlines. By managing project schedules and milestones, you will help deliver projects on time. Your collaboration with cross-functional teams will enhance project success and innovation. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering or a related field. Minimum 6 years of experience in Analog and Mixed Signal Circuit Layout. Proficiency in Analog Layout Flow from device placement to GDS release. Strong knowledge of CMOS and FINFET technologies and semiconductor device physics. Experience with EDA tools for custom mixed-signal layout flows. Understanding of CMOS fabrication technology and deep sub-micron effects on layout. Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout. Passion for learning and exploring new techniques. Who You Are: Detail-oriented and self-directed with excellent problem-solving skills. Strong communication skills for effective collaboration with cross-functional teams. Ability to manage multiple projects and meet deadlines effectively. Innovative thinker with a passion for technological advancement. Team player who thrives in a dynamic and fast-paced environment. The Team You’ll Be A Part Of: You will be part of a highly skilled and dedicated team focused on pushing the boundaries of analog and mixed-signal design. Our team collaborates closely with cross-functional departments to drive innovation and deliver high-performance solutions. We value creativity, teamwork, and a commitment to excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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8.0 years

0 Lacs

Bengaluru, Karnataka, India

On-site

About This Opportunity We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrow's mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport – to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we don't just follow industry trends—we set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, you'll play a pivotal role in shaping the future of global connectivity, contributing to the advancement of 5G and 6G technologies. As part of our global R&D organization, you'll collaborate with talented teams across Sweden, the US, and beyond. We are committed to fostering a collaborative and innovative work environment that encourages creativity and teamwork. What You Will Do Take charge of delivering high-impact ASIC IP solutions, ensuring alignment with broader project goals and requirements. Creative Freedom: Immerse yourself in an environment that champions innovation and critical thinking. You'll have the opportunity to explore advanced verification technologies alongside skilled experts. Global Impact: Contribute to projects with far-reaching impacts, transforming industries, advancing digital economies, and enhancing communication worldwide. Work-Life Balance: We prioritize the well-being of our team members, offering a balanced work-life environment to help you excel professionally without compromising your personal life. Professional Growth: Engage in continuous learning opportunities, tackle exciting challenges, and collaborate with brilliant minds in a supportive and forward-thinking atmosphere. An international work environment with opportunities for professional growth and development. A collaborative and inclusive culture that values diversity and innovation. A competitive compensation and benefits package. You will bring Key Responsibilities: Lead a team of verification engineers, providing mentorship and guidance to ensure efficient and reusable verification practices. Collect and address, team status and metrics. Take full responsibility for the verification strategies that the team has responsibility for. Define and implement UVM-based test environments. Break down requirements to create a Verification Strategy and develop and execute a Verification Plan. Develop, run, and debug test cases to ensure design quality. Continuously improve and optimize verification methodologies. Generate comprehensive documentation throughout the verification lifecycle. Collaborate closely with other verifiers, designers, and architects. Develop competence in the technical domain. Foster cross-team collaboration to ensure seamless project delivery and integration. Required Qualifications: Bachelor’s degree in electrical or computer engineering. 8+ years of industry experience in verification using SystemVerilog and UVM. Proven track record of leading verification test plan development in cross-site environments. Proficiency in/with: architecting and creating new grounds-up random and directed test environments and testcase strategies. formal verification for connectivity checks and using assertion-based VIPs. architecting and leading implementation of scoreboards, checkers, bus functional models SystemVerilog Assertions. Strong experience in low-power design verification. Additional Requirements: Experience with Cadence or Synopsys verification suites. Team-oriented, prioritizing team success within the team, across teams, and across sites over individual results. Specifically, experienced at communicating and meeting expectations within and across teams in an agile environment. High attention to detail and commitment to quality. Strong focus on meeting project deadlines and deliverables. Proficient in English, with strong communication skills. Preferred Skills: Understanding of radio access systems and their components. Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysis environments (e.g., Simscope), issue-tracking (e.g., Jira). Experience in verification in one or more of the following hardware domains: AMBA-based designs especially AXI and CHI. ARM-based real-time microcontroller systems including their control and interface peripherals. Wireless infrastructure specific protocols and interfaces and protocols. Implementation of hardware-based digital signal processing systems (filters, adaptation, etc.) Why join Ericsson? At Ericsson, you´ll have an outstanding opportunity. The chance to use your skills and imagination to push the boundaries of what´s possible. To build solutions never seen before to some of the world’s toughest problems. You´ll be challenged, but you won’t be alone. You´ll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next. What happens once you apply? Click Here to find all you need to know about what our typical hiring process looks like. Encouraging a diverse and inclusive organization is core to our values at Ericsson, that's why we champion it in everything we do. We truly believe that by collaborating with people with different experiences we drive innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity Employer. learn more. Primary country and city: India (IN) || Bangalore Req ID: 766878

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0.0 - 1.0 years

0 - 0 Lacs

Chennai, Tamil Nadu

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We are seeking an experienced PCB Design Engineer to join our team. The candidate will be responsible for designing and developing printed circuit boards (PCBs) for a wide range of electronic products. Responsibilities: Design complex and high-density PCBs using industry-standard software such as KiCad or OrCAD. Collaborate with electronic engineers to interpret schematics, specifications, and design requirements. Ensure compliance with industry standards, design rules, and manufacturing guidelines. Perform signal integrity analysis, electromagnetic compatibility (EMC) analysis, and thermal analysis. Prepare comprehensive documentation, including design files, Gerber files, and assembly drawings. Troubleshoot and resolve design issues, conduct design reviews, and provide technical support. We offer a competitive compensation package and opportunities for professional growth. If you are passionate about PCB design and electronics, we encourage you to apply for this exciting role. Job Type: Fresher Pay: ₹20,000.00 - ₹35,000.00 per month Ability to commute/relocate: Chennai, Tamil Nadu: Reliably commute or planning to relocate before starting work (Required) Education: Bachelor's (Preferred) Experience: PCB Design: 1 year (Preferred) License/Certification: PCB Design Course Certification (Required) Location: Chennai, Tamil Nadu (Required) Work Location: In person

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2.0 years

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Bengaluru, Karnataka, India

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Join the leader in entertainment innovation and help us design the future. At Dolby, science meets art, and high tech means more than computer code. As a member of the Dolby team, you’ll see and hear the results of your work everywhere, from movie theaters to smartphones. We continue to revolutionize how people create, deliver, and enjoy entertainment worldwide. To do that, we need the absolute best talent. We’re big enough to give you all the resources you need, and small enough so you can make a real difference and earn recognition for your work. We offer a collegial culture, challenging projects, and excellent compensation and benefits, not to mention a Flex Work approach that is truly flexible to support where, when, and how you do your best work. The Advanced Technology Group (ATG) is the research division of the company. ATG’s mission is to look ahead, deliver insights, and innovate technological solutions that will fuel Dolby’s continued growth. Our researchers have a broad range of expertise related to computer science and electrical engineering, such as AI/ML, algorithms, digital signal processing, audio engineering, image processing, computer vision, data science & analytics, distributed systems, cloud, edge & mobile computing, computer networking, and IoT. We are seeking a talented Researcher to join our Advanced Technology Sight Research Lab. You will bring your experience in generative AI on computer vision tasks and deep learning technology to Dolby. As a prerequisite for your work, you have proven knowledge of the generative network (VAE, GAN, diffusion model), low-level/high-level computer visions, 2D/3D scene representation and reconstruction, and deep learning. Your solid understanding of trade-offs between computational complexity and achieved performance of different implementations will guide you in decisions. You will: Research and develop new neural network architectures, training methods, representation, and processing algorithms on the areas of modern computer vision. Have an in-depth understanding of the key processes in computer vision. You have extensive experience in developing architectures, VAE/GAN/diffusion-based network, multi-modal generative network, image/video generative restoration/enhancement, 3D novel view synthesis, and deep learning solution to improve performance of computer vision tasks. Join a highly skilled and motivated team to research and develop advanced computer vision and processing technologies to improve end user experience. What will you accomplish: Build cutting-edge technology in the areas of Computer Vision, AI and Deep Learning . Develop new neural network architectures, training methods, representation, and processing algorithms Creates early-stage conceptual models that demonstrate feasibility. Document and present the new architectures and algorithms in various forms, such as technical white papers and internal meeting Maintain the highest technical and moral integrity for Dolby in the workplace and marketplace. Skills, Education, And Experience Required Ph.D. degree in electrical engineering, computer engineering, or computer science. Minimum of 2 years of experience in developing algorithms for generative neural network, multi-modal tasks, generative 2D/3D computer vision tasks. You are familiar with computer graphics, video processing systems, as well as corresponding software in consumer and professional products. Solid background in the latest AI technologies and their applications to image research. Proficient in Matlab, C/C++, OpenCV, and Python (TensorFlow/PyTorch) programming applied to computer vision is required. Self-motivated, quick learner and business partner with ability to work with minimal supervision. Excellent written and verbal communication skills. It is highly desirable to have one or more of the following: Experience in filing patents of newly developed technologies. Hands-on experience in applying Generative Network, Computer Vision, and Machine Learning algorithms to real-world problems Proven track record of successful research accomplishments, published papers, and/or patent applications in the field of video encoding and processing. Note: All official communication regarding employment opportunities at Dolby will come from an official dolby.com email address. We will never request payment as part of the hiring process. If you receive a suspicious message, please verify its authenticity before responding.

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5.0 years

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Bengaluru, Karnataka, India

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Join the leader in entertainment innovation and help us design the future. At Dolby, science meets art, and high tech means more than computer code. As a member of the Dolby team, you’ll see and hear the results of your work everywhere, from movie theaters to smartphones. We continue to revolutionize how people create, deliver, and enjoy entertainment worldwide. To do that, we need the absolute best talent. This is an opportunity to play a key role in Dolby's new R&D Center in Bangalore as a Senior Research Manager in our Advanced Technology Group " ATG ", the research and technology arm of Dolby Labs. With multiple competencies that innovate on technologies in audio, video, AR/VR, gaming, music, broadcast and user-generated content, areas of expertise related to computer science and electrical engineering, such as AI/ML, computer vision, data science & analytics, distributed systems, cloud, edge & mobile computing, natural language processing, social network analysis, and computer graphics are highly relevant to our research. What You’ll Do As a Senior Manager within Dolby ATG research, you focus on three key areas of responsibility: State-of the art, cutting edge, hands-on research: As a researcher, you will invent and develop the next generation of AI driven image and video analysis, enhancement, and processing technologies. Jointly with Dolby’s world-class global research teams, you will set directions, identify projects, and build the next wave of image technologies driving Dolby’s cloud and licensing business. With a solid understanding of both traditional image processing and newer AI technologies, you will not only perform research using signal processing based only solutions, but you will also work at the intersection of classical image processing and new AI algorithms. You will apply these insights to the research of image delivery, analysis, and content creation technologies. Managing, nurturing, and grooming top research talent: As a senior leader, you will manage and mentor a small group of researchers working in image processing, computer graphics, computer science, and content enhancement. You will work with your team as a coach and mentor. You are passionate about developing junior, highly talented staff into researchers that work fully independently in a corporate environment. Contribute to developing a dynamic, flexible, transparent, results-oriented and innovative working atmosphere. Technology strategy and direction setting: Jointly with Dolby’s world-class global research teams, you will set directions, identify projects, and build the next wave of AI based technologies driving Dolby’s cloud and licensing business. You work with ATG technology leaders to co-define projects and assign your staff to global R&D initiatives led by other technology initiative leads. Work jointly with upper management, lead resource and work allocation. You will also work with Dolby’s Business Groups (BG) to bring the research to life in many products, working closely with product managers, program managers, and BG engineering teams worldwide. Education And Desired Experience Ph.D. plus 5-10 years of corporate research experience with a degree in Physics, Electrical Engineering, Mathematics, Computer Science. Very deep understanding and strong record of research in Computer Vision, image analysis, enhancement, compression, and processing technologies. You are an absolute top expert in AI with a deep and thorough theoretical understanding of the latest state-of the art AI technologies. You have a detailed understanding of all main network architectures, deployment modes, data augmentation and preparation, and theoretical performance analysis of model architectures. Knowledge of NLP and/or multi-modal architectures is highly desired. You have a good understanding of: Diffusion, autoregressive, or other generative models. Self-supervised, contrastive learning, auto-encoders Audio, image, or text applications – Source separation, text-to-speech, music synthesis, image segmentation, image captioning, question answering, language models, etc. Knowledge of Game environments, graphical processing, consumer products, SoC architectures, embedded software, GPU/CPU implementations, algorithm validation and testing, implementation of ML/AI algorithms. Demonstrated ability to create fundamentally new, novel (patentable) image processing, enhancement, and rendering technologies. Strong publication record in major image/video/AI conferences and journals (e.g. NeurIPS, ICLR, ICML, etc.). Strong track of inventing, developing and productizing video technologies in an industrial research environment. Ability to envision applications of new technologies in the form of innovative product solutions. Strong innovator. Highly skilled in C/C++, Python. Experience in managing, guiding and mentoring younger researchers. Team-oriented work ethic and interest to work in cross-continental teams. Strong personal interest in learning, researching, and creating relevant new technologies with high commercial impact. Excellent communication, collaboration, and presentation skills in English. All official communication regarding employment opportunities at Dolby will come from an official dolby.com email address. We will never request payment as part of the hiring process. If you receive a suspicious message, please verify its authenticity before responding

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2.0 years

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Bengaluru, Karnataka, India

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Job Title: Memory Design Engineer Experience Required: 2+ Years Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory IP Job Summary: We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and low-power memory blocks (e.g., SRAM, ROM, Register Files) for use in SoCs and ASICs across leading-edge process technologies. Key Responsibilities: Design custom memory circuits such as SRAM, ROM, CAM, Register Files, or eFuse. Work closely with layout, verification, and technology teams to ensure optimal performance, power, and area (PPA). Perform transistor-level circuit design, simulation, and optimization for speed, power, and robustness. Analyze and simulate key circuits: sense amplifiers, bitline pre-charge, wordline drivers, decoders, write drivers, etc. Run simulations across PVT corners using tools like HSPICE, Spectre, or XA. Collaborate with layout teams for floorplanning and to ensure DRC/LVS clean layouts. Perform post-layout simulations and analysis (IR drop, EM, aging). Participate in memory characterization, yield improvement, and silicon bring-up support. Contribute to memory compiler development (if applicable). Required Skills and Experience: B.E/B.Tech or M.E/M.Tech in Electronics, Electrical Engineering, or VLSI. 2+ years of experience in full custom memory design. Strong background in analog/mixed-signal CMOS circuit design. Proficiency in simulation tools: HSPICE, Spectre, FastSPICE, XA. Experience with design in advanced nodes (e.g., 28nm, 16nm, 7nm, 5nm, FinFET). Familiarity with ESD, IR drop, EM, and reliability analysis techniques. Understanding of process variation and Monte Carlo simulations. Good debugging, problem-solving, and documentation skills. Preferred Qualifications: Experience with memory compiler architecture/design. Knowledge of radiation-hardened memory (RHBD) or safety-compliant memory (ISO 26262). Scripting knowledge (e.g., Python, Perl, Tcl) for automation. Exposure to silicon bring-up and correlation to simulation results.

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0 years

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Bengaluru, Karnataka, India

Remote

Hi All, Title : Analog Layout Engineer Exp Level:3+ yrs Location: Bangalore Job Description: Design and development of full custom analog/mixed-signal layout at block and top level. Strong expertise in analog layout techniques for circuits such as ADC, DAC, PLL, LDO, Bandgap, etc. Hands-on experience with layout tools like Cadence Virtuoso, Calibre, and Mentor tools. Ensure layout meets DRC, LVS, ERC, Antenna, and other physical verification requirements. Work closely with circuit design engineers to plan, review, and optimize layout. Experience in advanced process nodes (e.g., 7nm, 5nm, 3nm) preferred. Understanding of EMIR, ESD, and reliability requirements Proficient in hierarchical and flat layout methodologies. Good knowledge of parasitic extraction and optimization. Ability to handle tight schedules and complex designs independently. Experience working in ODC/remote team model is a plus Strong communication and documentation skills. Commitment to high quality and first-pass success. Interested can share Cv to himabindu.jeevarathnam@acldigital.com Thanks, K Himabindu

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4.0 years

0 Lacs

Bengaluru, Karnataka, India

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FPGA Design Engineer We are seeking an RTL FPGA Engineer with a strong background in FPGA design, RTL development, and digital system design. The ideal candidate will have expertise in developing FPGA solutions using VHDL or SystemVerilog , along with solid experience in hardware verification and debugging. This role will involve designing RTL for complex FPGA architectures, optimizing for performance and resource utilization, and ensuring robust verification and integration of your designs. Key Responsibilities: RTL Design: Design and implement high-quality RTL code for FPGA-based systems, primarily using VHDL or SystemVerilog . System Design: Work on complex digital system designs, including signal processing , interface design , and integration of components such as memory controllers , processors , or peripheral devices . Verification: Develop and execute verification plans, including testbenches, to validate your designs in simulation and on real hardware. Debugging: Use hardware debugging tools (e.g., oscilloscopes , logic analyzers ) to troubleshoot and validate designs during both simulation and hardware implementation phases. Optimization: Ensure that designs are optimized for FPGA performance, resource usage (LUTs, flip-flops, etc.), and power consumption. Collaboration: Work closely with cross-functional teams including hardware engineers, firmware developers, and systems engineers to integrate and test complete FPGA solutions. Documentation: Create and maintain detailed design documentation, including specifications, schematics, test cases, and verification reports. Support: Assist with bringing up and debugging prototypes on FPGA hardware, as well as providing support for post-silicon validation and production systems. Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering , Computer Engineering , or a related field. 4+ years of hands-on experience in FPGA design and RTL development. Expertise in HDL design using VHDL or SystemVerilog . Strong understanding of digital logic design and FPGA architecture . Familiarity with FPGA toolchains like Xilinx Vivado , Intel Quartus , or Lattice Diamond . Experience with FPGA verification using simulation tools such as ModelSim , VCS , or Questa . Knowledge of scripting languages (e.g., TCL , Python ) for automation and tool integration. Experience with hardware debugging tools, including oscilloscopes, logic analyzers, and in-circuit emulators. Solid understanding of timing analysis , clock domain crossing , and resource optimization techniques in FPGA design. Experience with interfaces such as PCIe , Ethernet , USB , or DDR is a plus. Strong problem-solving skills and attention to detail. Ability to work independently and as part of a collaborative team. Location: Bengaluru / Hyderabad Experience: 4 to 8 Years

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0 years

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Gurugram, Haryana, India

On-site

At LAT Aerospace , we’re building a clean-sheet Short Take-off and Landing (STOL) aircraft to transform regional air mobility in India . We’re looking for an Avionics Engineer to support the design, integration, and validation of the aircraft’s avionics systems — from navigation and communication to system health monitoring and fly-by-wire system. What you’ll do • Design and integrate key avionics systems, including INS, GNSS, communication systems (datalinks, SATCOM), and flight control computers. • Build out the core fly-by-wire architecture—bringing together sensors, actuators, and safety-critical signal pathways. • Create and manage the electrical wiring and interconnect system layout specific to avionics components. • Work closely with teams handling flight controls, propulsion, and the airframe to ensure the avionics systems integrate smoothly across the aircraft. • Collaborate on the development and integration of autopilot functions, pilot displays, and ground-based support systems. • Ensure all avionics systems meet relevant safety and certification standards, such as DO-178C, DO-254, ARP4754A or equivalent. • Support the full testing lifecycle—from bench testing to ground checks and flight validation—to verify system performance and reliability. • Plan for system-level redundancy, conduct failure mode analysis, and help design fault-tolerant architectures for critical avionics. What we're looking for • Proven experience in designing avionics architecture for safety-critical aerospace systems. • Hands-on experience with integration and testing of avionics sensors, including INS, GNSS, air data sensors, and RF communication systems. • Skilled in evaluating and validating avionics hardware and software against specification sheets and relevant standards, including MIL-STD-461/810. • Solid understanding of aviation safety and certification standards, such as DO-178C (software), DO-254 (hardware), ARP4754A (system development), and DO-160 (environmental testing). • Experience with system-level integration, troubleshooting, and debugging avionics in both lab and flight test environments. • Exposure to redundant architectures, fault-tolerant design, and FMEA (Failure Mode and Effects Analysis) is desirable. Why LAT? • Core team opportunity at a high-conviction deep-tech startup • Real aircraft, real flying hardware, real impact • Build the future of sustainable aviation in India

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0 years

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Gurugram, Haryana, India

On-site

At LAT Aerospace, we’re building a clean-sheet Short Take-off and Landing (STOL) aircraft to transform regional air mobility in India. We’re looking for a Controls Engineer to develop, simulate, and validate advanced motor control systems for electric propulsion — from high-fidelity Simulink models to real-time embedded implementation for PMSM drives. What you’ll do Design and simulate motor control algorithms for PMSM/IPM motors using techniques like FOC (Field Oriented Control) and Direct Torque Control. Develop sensor less control strategies for PMSM systems. Build and validate Model-Based Design (MBD) workflows using MATLAB/Simulink for embedded implementation. Collaborate with powertrain, avionics, and electronics teams to integrate and tune control strategies across hardware systems. Support control loop tuning, hardware-in-the-loop (HIL) testing, and real-world calibration of propulsion units. Perform fault diagnosis and mitigation through robust control design and system modelling. Maintain clean model architecture and documentation for scalable future development. What we're looking for Strong experience in designing motor control strategies for PMSM/IPM drives using FOC, DTC, and sensor less techniques. Hands-on expertise in MATLAB/Simulink for Model-Based Design, code generation, and real-time control testing. Familiarity with embedded implementation of control algorithms and real-time constraints. Understanding of electric propulsion systems, inverter topologies, and signal interfaces. Experience with HIL/simulation setups and validation of control performance. Bonus: exposure to aircraft electric propulsion or automotive traction systems. Why LAT? Core team opportunity at a high-conviction deep-tech startup Real aircraft, real flying hardware, real impact Build the future of sustainable aviation in India

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4.0 years

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Bengaluru, Karnataka, India

On-site

Brief About Bert Labs Bert Labs is an International Award Winning, one of the fastest growing AI Innovation Companies in the world. Founded in 2017, Bert Labs is growing at 300% year on year to be USD 1 Billion global revenue by 2027-28. And bringing in Business Transformation impact across industries. Bert Labs is bringing USD 360 million in energy cost savings and 60 million Tonnes of carbon footprint reduction with 100+ clients in India & globally. And USD 460 million in production cost savings. In the next 4 years, our platform will bring in USD 1.6 billion in energy cost savings and 260 million Tonnes of carbon footprint reduction with 600+ clients. And production cost savings of USD 2 billion. This will lead to USD 1 Billion revenues by FY 2027-28 end for an IPO. At Bert Labs, we are leading ClimateTech as we tackle complex challenges through Bert Geminus- First Principles, powered by Deep Neural Network Operational Digital Twins prediction, and Bert Optimus- Reinforcement Learning optimization. These are facilitated by Bert Nova Multi-Tenant Distributed Computing, Bert Maximus IoT Devices, and Bert Qrious IoT-powered Wireless Sensor Network, all part of the Bert Platform Solution- , driving Business Transformation Goals on Sustainability, Energy Efficiency Improvement, Net Zero, and Production. We consistently innovate, filing 4-5 patents monthly, totalling 50-60 patents annually across various regions. Anticipating accelerated innovation, we aim to file 100 patents per year in FY 2025-26, 150 patents in FY 2026-27, and a remarkable 400 patents in FY 2027-28. At Bert Labs we believe in challenging the status quo every day. We do this with the power of diversity, inclusion, and collaboration. By connecting different perspectives, we can imagine new possibilities, inspire innovation, and release the full potential of our people. Our employee experience includes appreciation, belonging, growth, and purpose for everyone. We are committed to a diverse and inclusive workplace. At Bert Labs, we are an equal opportunity employer and do not discriminate on the basis of race, national origin, gender, gender identity, sexual orientation, disability, age, or other legally protected status. Welcome to Bert Labs family. Responsibilities Leading and executing the development effort of Embedded Hardware of Bert products end to end, product development responsibility starting from conceptualizing to deployment. Stay up to date on forefront of Microcontrollers, Microprocessors, Sensors, Board peripherals and bringing state of the art in the development cycle Entrepreneurial Leadership role, where in you Innovate every day and do things beyond your current capabilities. Requirements Engineering degree from IITs/BITS/NITs/Jadavpur University/DTU/Top Engineering Institutes in USA, Europe, UK/NUS Proven relevant work experience (as above) in EEE/CS/Embedded Systems or any other relevant field with 5-10 years of experience of Industrial Experience in Product/Platform/Deep Tech/ AI/IoT/Semiconductor/Embedded Systems/IT Services company Hardware Design and Architecture of mixed signal boards is required. Experience with CAD design tools - Altium/Orcad is required. POC, component research and component selection for new designs. Library management and footprint design in Altium designer. PCB layout of multilayer boards (4 layers and above) is required. Design documentation - DFM and DFA is required. Experience and knowledge of Hardware Certifications, EMI, EMC is appreciated. Experience and knowledge of industrial standards and protocols is appreciated. Board Bring-up, Hardware Validation and Verification is required. Hardware debugging, circuit analysis and board rework is appreciated. Experience with ARM based controllers/processors required. Experience on Radio Frequency design and layout is highly appreciated. Coordination with fabrication and assembly houses for manufacturing is appreciated Experience in managing projects end-to-end, including gathering requirements, - solutioning and designing architecture, developing, testing, deploying, and maintaining systems Excellent data structure & algorithm and problem-solving skills Good understanding of any OOP based programming language Proven experience in understanding complex user needs and providing practical solutions that can work in production Excellent communication and leadership skills (ref:hirist.tech)

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20.0 - 25.0 years

0 Lacs

Greater Bengaluru Area

On-site

Technology Expert, PCIe 7.0 & UCIe ( Senior Director level ) www.omnidesigntech.com Location: Bengaluru www.omnidesigntech.com Location- Bangalore About Omni Design Technologies Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins-Colorado, Bangalore-India, Hyderabad-India, Dublin-Ireland, Boston-Massachusetts. Job Summary: Principal SerDes Technology Expert We are seeking a highly motivated and experienced Principal SerDes Technology Expert to lead the development of next-generation connectivity solutions. Your journey will begin by spearheading the design and optimization of high-performance Active Electrical Cables (AECs), enhancing electrical integrity and signal quality across demanding link budgets. Building on this foundation, you will architect and implement SerDes technology tailored for PCIe 7.0, tackling challenges such as lane equalization, jitter tolerance, and power efficiency. Finally, your work will expand into integrating cutting-edge optical interconnects and optocouplers, driving innovations in retimer technologies and hybrid signaling frameworks. This role directly impacts the performance and reliability of AI and cloud infrastructure—empowering massive data throughput, energy-efficient links, and scalable system architectures. Responsibilities: Lead the architecture and design of high-speed SerDes for PCIe 7.0, targeting data rates of 128 GT/s and beyond. Spearhead the development and integration of advanced optical interconnects and retimer solutions within our Smart Cable Modules™. Define and specify the requirements for mixed-signal SerDes PHYs, including transmitter (TX), receiver (RX), and clock and data recovery (CDR) circuits. Conduct in-depth analysis and simulation of high-speed channel performance, including signal integrity (SI) and power integrity (PI). Collaborate with cross-functional teams, including hardware design, firmware, and system validation, to ensure successful product development and bring-up. Stay at the forefront of industry standards and emerging technologies, particularly related to PCIe, CXL, and high-speed optical interconnects. Mentor junior engineers and provide technical leadership across the organization. Work closely with partners and vendors to evaluate and select key components. Qualifications: Required Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. 20-25 years years of experience in high-speed SerDes design and development. Proven expertise in PCIe protocols, with direct experience in PCIe 4.0/5.0/6.0 design and a strong understanding of the upcoming PCIe 7.0 specification. In-depth knowledge of mixed-signal design, including experience with PAM4 signaling, equalization techniques (e.g., FFE, DFE), and clocking architectures. Hands-on experience with high-speed test and measurement equipment (e.g., oscilloscopes, BERTs, VNAs). Strong understanding of signal integrity principles and experience with simulation tools (e.g., HSPICE, ADS, Ansys). Preferred Qualifications: Master's or Ph.D. in a relevant technical field. Experience with the design and integration of optical interconnects, silicon photonics, or high-speed optoelectronics. Familiarity with the design of retimers and their application in Active Electrical Cables. Experience with high-level modeling of SerDes links using tools like MATLAB or Python. Knowledge of other high-speed protocols such as Ethernet, CXL, or NVLink. A track record of leading complex projects from concept to production. Excellent communication and interpersonal skills. We are seeking a highly skilled and experienced IP Design Engineer to join our team, focusing on the design, development, and validation of cutting-edge high-speed interface Intellectual Property (IP). The ideal candidate will have a strong background in complex digital and mixed-signal design, with a particular emphasis on interfaces such as UCIe, Die-to-Die (D2D), and various memory PHYs (DDR/LPDDR). Expertise in advanced clocking architectures including PLLs and DLLs is also essential. This role involves contributing to the full IP development lifecycle, from architectural definition and RTL design to silicon validation and post-silicon support, ensuring first- pass silicon success for critical products that enable next-generation data center interconnects. Key Responsibilities: • Design & Development: Architect, design, and implement high-speed interface IPs, including UCIe, D2D, DDR, and LPDDR PHYs. Contribute to the development of high-speed SerDes IP transceivers supporting rates like 100G PAM4 (106.25 Gbps), 50G PAM4 (53.125 Gbps), and 25G NRZ (26.5625 Gbps) for applications such as PCIe, Ethernet, and data center interconnects. • Clocking Design: Develop and optimize PLL (Phase-Locked Loop) and DLL (Delay- Locked Loop) circuits for high-speed clock generation and synchronization, ensuring low jitter and high accuracy. This includes experience with Fractional/Spread-spectrum/Integer Frequency synthesizers, LC VCOs, Multi- Modulus Dividers, Charge Pumps, LPFs, LDO regulators, and BGRs. • IP Development Lifecycle: Participate in the complete IP design flow, including architectural definition, specification development, RTL coding, synthesis, static timing analysis (STA), and collaborating on physical design activities (GDSII). 1 • Verification & Validation: Work closely with verification teams to define test plans, debug complex design issues, and lead pre-silicon and post-silicon validation efforts, including silicon bring-up and characterization .2 Implement features for deep in-cable diagnostics (e.g., eye metric readout, PRBS bit error rate, loopback modes), fleet management, and security for robust interconnect solutions. • Analog/Mixed-Signal Integration: Collaborate on the integration of analog and mixed-signal blocks within the PHYs, addressing complex integration challenges and optimizing for performance, power, and area (PPA). • Documentation: Create comprehensive design specifications, integration guidelines, and application notes for IP blocks.• Problem Solving: Debug and resolve complex design issues at various stages of the development cycle, including silicon debugging and fault isolation. • Standards Compliance: Ensure IP designs comply with industry standards (e.g., JEDEC for DDR/LPDDR, QSFP-DD/OSFP mechanical and common management interface specifications) and customer requirements. • Performance Optimization: Focus on achieving low-latency data paths (< 100 ns) and optimizing for lower power consumption in high-speed interconnect solutions. Required Qualifications: • Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field.3 • 20-25 years of experience in digital, mixed-signal, or analog IP design within the semiconductor industry. (Adjust X based on Senior/Principal level). • Proven experience with high-speed interface designs such as UCIe, D2D, DDR PHY, or LPDDR PHY. • Demonstrated experience in the design and optimization of PLLs and/or DLLs, including various types of frequency synthesizers and clock generation circuits. • Familiarity with the entire IP development flow from architectural concept to silicon validation. • Strong understanding of signal integrity, power integrity, and layout considerations for high-speed designs, especially for PAM4 and NRZ signaling over copper cables. • Proficiency with industry-standard EDA tools for design, simulation, and analysis. • Experience with deep diagnostic features, security implementations (firmware security, unauthorized access prevention), and non-disruptive firmware updates for high-speed modules. • Excellent problem-solving skills and attention to detail. • Strong communication and collaboration skills to work effectively with cross- functional teams. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

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5.0 - 6.0 years

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Bengaluru, Karnataka, India

On-site

Assistant / Deputy Manager- Finance, Bangalore (On-Site) ENNOVI Mobility Solutions India Pvt Ltd 89A, Hosur Road | Electronics City | Bangalore | INDIA 560100 About Company ENNOVI, a Mobility Electrification Solutions Partner, is a world leader in designing and manufacturing customized interconnect and high-precision system solutions for electric vehicles. The company is fully dedicated to the mobility market with the agility to act at speed in realizing EV OEMs’ needs, from product, process, and manufacturing, on a global level. ENNOVI is accelerating EV market customers’ ideas and requirements through end-to-end competencies in battery systems, power, and signal interconnect needs. Headquartered in Singapore, ENNOVI has more than 8,000 employees across 15 locations globally, where all its activities are socially responsible, with minimal environmental impact. ENNOVI. Electrify faster. Learn more at www.ennovi.com. Ennovi is an equal opportunity employer in conformance with all applicable laws and regulations to individuals who are qualified to perform job requirements. The Company administers its personnel policies, programs, and practices in a non-discriminatory manner in all aspects of the employment relationship, including recruitment, hiring, work assignment, promotion, transfer, termination, wage and salary administration, and selection for training. Why Join Us At Ennovi, we envision a future of electrification and innovation and strive to create an inspiring workplace where our employees are integral to shaping that future. We offer a dynamic, collaborative and inclusive culture that encourages continuous learning, professional growth, and a sense of purpose. As a part of the Ennovi family, employees experience the excitement of being at the forefront of cutting-edge technologies and contributing to a sustainable future. Our commitment to the transformation is epitomized by our five pillars: Speed, Innovation, Best Talent, Global Reach, and Sustainability. This entails navigating exponential market changes through agile structures, fostering innovation across all aspects of our business, strategically expanding our global footprint, championing sustainability initiatives, and nurturing a winning team. Privacy Policy By applying to this job posting, you agree with and acknowledge our privacy policy. Job Summary Product Costing/ Management reporting. Main Responsibilities P & L Analysis – Budget & Forecast vs Actuals. Good Knowledge in product costing/ profitability analysis. Standard cost roll up & Month End activities in SAP. Analysing in Sales price movement/ product mix analysis/ product cost variances. Variance Analysis. Inventory valuations. Rolling out Yearly Machine Hour rates for Standard costs. Capital Budgeting/ ROI computations for new projects. Audit Support for all Inventory / costing related activities. Qualification and Skills CMA Qualified with a minimum of 5-6 years of experience. Good Proficiency in excel, Power point and SAP knowledge.

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4.0 years

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Bengaluru, Karnataka, India

Remote

Description As an ITS Support Engineer at Amazon, you'll be the go-to expert for corporate employees, providing seamless end-to-end services and frictionless on-site technical support to ensure uninterrupted productivity. With an advanced understanding of IT standards, systems, and equipment, you'll work independently or collaboratively to manage projects, adapt quickly to new processes, and serve as a mentor for escalations. Your role involves engaging with Amazonians across teams, diagnosing and resolving a wide variety of specialized hardware and software issues, and implementing successful solutions. As part of the Amazon Helpdesk, you'll be the first point of contact for technical questions and problems, working with service managers and staff to maintain internal solutions and manage on-premises infrastructure. This dynamic position requires strong communication skills, technical and analytical competencies, and above all, a customer-obsessed mindset. You'll have the opportunity to develop your career while supporting Amazon's unique corporate infrastructure, service platforms, and employees, making you a crucial part of the IT Services Team in maintaining the company's innovative and efficient work environment. Key job responsibilities As a dedicated IT Support Professional, responsibilities encompass providing comprehensive ticket-based, walk-up, and remote Help desk support across Amazon's multi-site environments, while delivering high-quality, hands-on troubleshooting and resolution of technical issues. The role involves managing service provider engagements, overseeing routine processes including new hire onboarding, computer lifecycle management, asset inventory, imaging, warranty support, and hardware recycling. Key functions include participating in process development and implementation, researching and deploying new hardware/software solutions, and evaluating system health through log analysis. Critical responsibilities include providing on-call support for high-severity incidents and serving as an escalation point of contact for the team, while assisting with activities to triage and escalate system or network outages to minimize downtime. The position requires effective understanding and execution of change management activities in a high-availability environment, along with active collaboration with partner teams and vendors on continuous improvement projects, defining requirements, and managing execution to deliver operational excellence and value. The role demands strong problem-solving skills, a commitment to expanding technical expertise, and staying current with IT policies and emerging technologies to ensure optimal system performance and reliable IT service delivery. A day in the life Seeking a customer-focused IT Support Associate who excels in Windows/Mac/Linux OS deployment, remote technical support, and comprehensive user hardware/software/peripheral assistance, while demonstrating expertise in LAN troubleshooting and hardware asset management. The ideal candidate will maintain detailed documentation while handling a high volume of urgent requests, displaying innovation, energy, and adaptability in new processes. They must be self-motivated, able to work independently with minimal supervision, and maintain high productivity levels while managing ambiguous situations. This role requires someone who combines strong technical capabilities with genuine curiosity, commitment to team success, and an initiative in delivering hands-on IT support across all platforms. Basic Qualifications 4+ years of corporate setting Windows, Mac or Linux Operating systems support experience and experience in the AV sector with a proven record of effectively commissioning, configuring, troubleshooting or installing corporate AV systems Microsoft MCSE, MCITP Systems Administrator (Active Directory) experience ITIL Knowledge Experience in Linux, Microsoft, and network systems administration Experience working with AV technologies such as Extron, Crestron, BiAmp, Cisco, Shure and Poly; control systems, DTP systems, matrix switchers, extenders and audio DSPs Excellent troubleshooting, problem-solving and diagnosis skills with a strong understanding of signal flow Experience with network technology including video and audio over IP (e.g. Dante/AES) Candidates should be results oriented and delivery focused with demonstrated experience working with corporate users and engineering teams. Analytical abilities and proven problem-solving skills; must be a real troubleshooter who excels at spotting issues and monitoring problems. Ability to establish and build healthy working relationships and partnerships with peers, customers, vendors and suppliers Excellent communication, interpersonal and presentation skills, both oral and written communication Strong prioritization and organizational skills with attention to detail Ability to multi-task and handle multiple priorities in an innovative and fast paced environment. Strong verbal and written communications skills, including an ability to effectively communicate with both business and technical teams. Ability to manage high priority projects Ability to travel up to 10% Preferred Qualifications At least 5 years of related industry experience in an enterprise environment. Candidates should be results oriented and delivery focused with demonstrated experience working with corporate users and engineering teams. Analytical abilities and proven problem-solving skills must be a real troubleshooter who excels at spotting issues and monitoring problems. Ability to multi-task and handle multiple priorities in an innovative and fast paced environment. Strong verbal and written communications skills, including an ability to effectively communicate with both business and technical teams. Significant experience supporting users and their hardware and software. Experience with AD Systems Administration in a mixed operating system environment – Chrome OS, Windows and Unix. Knowledge of networking hardware and concepts. Crestron DMC-T or DMC-E Certification ITIL Certified SynAudCon Training CTI-P101 Foundations of Crestron Programming Certification CompTia Network+ and Cisco Certified Network Associate (CCNA) Additional Certifications or formal training by AV manufacturers (e.g., Crestron, Extron, Biamp, QSC, Cisco, Dante, etc.) Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Company - ADCI - Karnataka Job ID: A3032235

Posted 4 weeks ago

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6.0 years

0 Lacs

Bengaluru, Karnataka, India

On-site

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout. With a minimum of 6 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design. You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart. Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques. You are adept at communicating effectively with cross-functional teams to ensure successful project execution. You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future. What You’ll Be Doing: Design and development of transistor-level analog and mixed-signal layout. Device level floorplan, placement, routing, and physical verification. Troubleshoot physical verification issues to achieve clean and desired results. Create and review layout documents to ensure they meet quality standards and are delivered on time. Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment. Collaborate with cross-functional teams to ensure successful project execution. The Impact You Will Have: You will drive the design and development of high-quality analog and mixed-signal layouts. Your expertise will ensure the successful implementation of CMOS and FINFET technologies. Through effective troubleshooting, you will contribute to achieving clean physical verification results. Your attention to detail will ensure that layout documents meet quality standards and deadlines. By managing project schedules and milestones, you will help deliver projects on time. Your collaboration with cross-functional teams will enhance project success and innovation. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering or a related field. Minimum 6 years of experience in Analog and Mixed Signal Circuit Layout. Proficiency in Analog Layout Flow from device placement to GDS release. Strong knowledge of CMOS and FINFET technologies and semiconductor device physics. Experience with EDA tools for custom mixed-signal layout flows. Understanding of CMOS fabrication technology and deep sub-micron effects on layout. Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout. Passion for learning and exploring new techniques. Who You Are: Detail-oriented and self-directed with excellent problem-solving skills. Strong communication skills for effective collaboration with cross-functional teams. Ability to manage multiple projects and meet deadlines effectively. Innovative thinker with a passion for technological advancement. Team player who thrives in a dynamic and fast-paced environment. The Team You’ll Be A Part Of: You will be part of a highly skilled and dedicated team focused on pushing the boundaries of analog and mixed-signal design. Our team collaborates closely with cross-functional departments to drive innovation and deliver high-performance solutions. We value creativity, teamwork, and a commitment to excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Posted 4 weeks ago

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