30 Parasitic Extraction Jobs

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate ...

As a Layout Design Engineer at RFIC Solutions Inc., you will be responsible for the Layout design of RF and Analog circuits in a fast-paced environment. Your key responsibilities will include: - Excellent problem solving skill of DRC, LVS issues - Parasitic extraction of layout and layout quality checking - Custom layout experience must include high frequency circuits such as LNAs, Mixers, VCOs, etc. - Full familiarity with Cadence Virtuoso and ADS (Advance Design System) Caliber tools for 65nm and lower design processes - Full understanding of hierarchical planning (top down and bottom up) and integration To qualify for this role, you should have an M.Tech or BE/B.Tech in Electronics and Te...

Role Overview: As an experienced RF Circuit Designer with 5-10 years of experience, you will be responsible for the design and simulation of RF circuits including LNAs, mixers, power amplifiers, VCOs, and filters. You should be proficient in using RF design tools such as ADS, HFSS, and Cadence Virtuoso, and have a strong understanding of RF layout techniques like impedance matching and parasitic extraction. Your role will also involve antenna design, system integration, and compliance with RF standards like FCC and ETSI. Key Responsibilities: - Design and simulate RF circuits including LNAs, mixers, power amplifiers, VCOs, and filters - Utilize RF design tools and simulation methodologies fo...

Job Overview We are seeking a talented Analog Layout Engineer with 3- 5 years of experience in advanced semiconductor technologies (5nm and below). The ideal candidate will have hands-on expertise in custom layout design, FinFET technology nodes, and EDA tools like Cadence Virtuoso and Calibre. This is a fantastic opportunity to work on cutting-edge analog and mixed-signal circuit layouts as part of a high-performance team. Key Responsibilities Execute full custom layout design for high-speed analog and mixed-signal blocks. Collaborate closely with circuit design teams to interpret and implement layout specifications. Perform layout verification, including DRC, LVS, and parasitic extraction ...

Role Overview: As an Analog Layout Engineer at Radiant Semiconductors, you will be responsible for designing and implementing analog layouts for high-performance circuits such as amplifiers, ADCs, DACs, and voltage regulators using TSMC/Samsung 7nm and below nodes. Your role will involve ensuring design compliance by performing design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC). Key Responsibilities: - Design and implement analog layouts for high-performance circuits using TSMC/Samsung 7nm and below nodes - Perform design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) Qualifications Required: - 3 to 8 years of experie...

Hi All, Title : Analog Layout Engineer Exp Level:3+ yrs Location: Bangalore Job Description: Design and development of full custom analog/mixed-signal layout at block and top level. Strong expertise in analog layout techniques for circuits such as ADC, DAC, PLL, LDO, Bandgap, etc. Hands-on experience with layout tools like Cadence Virtuoso, Calibre, and Mentor tools. Ensure layout meets DRC, LVS, ERC, Antenna, and other physical verification requirements. Work closely with circuit design engineers to plan, review, and optimize layout. Experience in advanced process nodes (e.g., 7nm, 5nm, 3nm) preferred. Understanding of EMIR, ESD, and reliability requirements Proficient in hierarchical and f...

Role Overview: You will be working as an Analog and Mixed Signal Design Engineer in the Reference design team at GlobalFoundries" Bangalore office. Your main responsibilities will include designing, simulating, and verifying analog circuit design blocks such as BGR, LDO, OTA, and Current mirrors with a focus on quality and minimal cycle time. Key Responsibilities: - Have a solid foundation in Analog and Mixed signal circuit design in advanced silicon technologies - Support silicon bring-up and characterization - Participate in implementation & design/layout reviews - Contribute innovative ideas for addressing design problems Qualifications Required: - MTech or PhD from top-tier institutes - ...

As an experienced Physical Design Engineer, you will be responsible for executing block level P&R and Timing closure activities. Your primary role will involve owning up block level P&R and performing Netlist2GDS on blocks. You will be working on the implementation of multimillion gate SoC designs in cutting-edge process technologies such as 28nm, 16nm, 14nm, and below. Your expertise should cover various aspects of physical design, including Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning and Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal I...

As an AMS Design, Verification and Layout professional with 4+ years of experience in the Semiconductor domain, your role will involve: - Designing analog and mixed-signal circuits like amplifiers, data converters, PLLs, and regulators. You will conduct detailed transistor-level simulations including DC, AC, transient, PVT, and Monte Carlo. - Developing and maintaining behavioral models using Verilog-A/AMS. You will also create comprehensive testbenches for mixed-signal co-simulation with digital blocks. - Executing block-level and top-level verification, encompassing functional, corner-case, noise, and signoff simulations to ensure design adherence to specifications in all scenarios. - Crea...

As a Principal Engineer - Analog IP/IC specializing in Semiconductor Chip Design, your role involves leading and coordinating the execution of analog and mixed-signal integrated circuit development projects. You must possess a strong technical background in analog design, verification, and physical implementation, along with exceptional project management skills. Your responsibilities will include: - Designing analog/mixed-signal blocks such as ADC/DAC, PLL, LDO/DCDC, IO, Motor & Gate Drivers. - Running MATLAB modeling, circuit simulations, and post-layout analysis (LPE, Monte Carlo). - Developing and managing verification plans, mixed-signal simulation, and behavioral models. - Guiding cust...

Mirafra Technologies Hiring Physical Verification _ SVRF Expert Engineers: Experience - 5 to 15 years Notice Period - 0 to 60 days Location - Bangalore Please find the Job Description Below: Knowledge, Skills and Experience: 5+ years of DRC/LVS development and support experience required. Exceptions made for the right candidates. Good knowledge of CMOS fundamentals with background in electrical engineering or semiconductor physics Good basic understanding of DRC, LVS and Parasitic Extraction , Knowledge of Calibre SVRF required. PVS/Pegasus experience is a plus Knowledge of Tcl required. Perl, Python experience desired. Strong debugging capability, not limited only by Physical verification f...

As part of the Design Technology Platform Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of top-notch engineers solving challenging technical problems enabling PDKs for Intel's most advanced process technologies, Enablement, Validation and Foundry Certifications of Industry Standard EDA Reliability (EM/IR); ESD Perc tools and drive PDKs towards industry standard methods and ease of use for the end customers. The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors and product design teams to develop and deliver high quality technology collaterals, models and enablement of EDA tools. Direct reportin...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and detail-oriented analog/mixed-signal engineer driven by a desire to create world-class solutions that enable the next generation of smart, connected devices. You thrive in fast-paced, collaborative environments and are excited by the challenges of high-spee...

At AMD, we are dedicated to transforming lives with our cutting-edge technology to make a positive impact on our industry, communities, and the world. Our goal is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. Central to our mission is the AMD culture, where we continuously strive for innovation to address the world's most pressing challenges. We are committed to achieving excellence in execution while upholding values of directness, humility, collaboration, and inclusivity of diverse perspectives. As a SOC Physical Design Director at AMD, you will play a ...

Become a key member of a growing Analog design and development team specializing in High Speed Serdes Interfaces. Your responsibilities will include leading the development of Analog Full custom circuit macros such as CTLE, Analog Front End, DFE, high-speed clock paths, low-power biasing, PLL, Regulators, equalizers, necessary for High Speed PHY IP in planer and fin-fet CMOS technology. You will collaborate with experienced teams locally as well as individuals from various global sites. An essential aspect of this role involves analyzing mixed signal techniques for dynamic and static power reduction, performance enhancement, and area reduction. Leveraging your expertise in circuit simulation...

As a Senior Analog Layout Design Engineer at Genisup India Private Limited, a leading semiconductor and system design company based in Bangalore, you will play a crucial role in designing, developing, and modifying full custom layouts for standard cells across advanced process nodes. With a client portfolio that includes top-tier companies such as NXP, Qualcomm, and Analog Devices, we are committed to delivering innovative solutions and technical excellence in the semiconductor industry. Your responsibilities will include executing floor-planning from sub-block to chip top level, implementing hierarchical layout assembly and standard cell planning, and collaborating with design engineers to ...

Who We Are Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips - the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world - like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world. What We Offer Location: Bangalore,IND You'll benefit from...

As an Analog Layout Engineer with 3-5 years of experience in advanced semiconductor technologies (5nm and below), you will be responsible for executing full custom layout designs for high-speed analog and mixed-signal blocks. Your expertise in custom layout design, FinFET technology nodes, and EDA tools like Cadence Virtuoso and Calibre will be crucial in collaborating closely with circuit design teams to interpret and implement layout specifications. Your key responsibilities will include performing layout verification, ensuring compliance with foundry design rules and layout best practices, addressing issues related to electromigration, IR drop (EMIR), and layout-dependent effects, as well...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and meticulous engineer with a deep commitment to excellence in analog and high-speed mixed signal layout design. With a minimum of 2 years of hands-on experience in advanced technology nodes (5nm and below), you thrive in dynamic, collaborative environments w...

As part of Synopsys, you will be at the forefront of innovations that are reshaping the way we live and work. From self-driving cars to Artificial Intelligence, 5G to the Internet of Things, we are driving the Era of Smart Everything with cutting-edge technologies in chip design and software security. If you are driven by a passion for innovation, we invite you to join our team. The Silicon Design & Verification business focuses on accelerating the development of high-performance silicon chips. As the world's leading provider of solutions for designing and verifying advanced silicon chips, we are committed to designing the next-generation processes and models essential for chip manufacturing...

We are looking for highly skilled Physical Verification Engineers to join our team. The ideal candidates will have extensive experience in physical verification tasks such as DRC, LVS, and parasitic extraction using tools like Mentor Graphics Calibre. You will be working on cutting-edge technologies and collaborating with cross-functional teams to ensure seamless tapeouts and compliance with foundry design rules. Your main responsibilities will include implementing Physical Verification with a focus on hard macro/core finishing activities. You must have led and been primarily responsible for physical verification checks, fixing, and sign-off. It is essential to have an excellent understandin...

You will be responsible for executing block level P&R and Timing closure activities, including owning up block level P&R and performing Netlist2GDS on blocks. You will work on the implementation of multimillion gate SoC designs in cutting edge process technologies such as 28nm, 16nm, 14nm, and below. Your role will require strong hands-on expertise in physical design aspects like Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning, Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS), DFM, and ...

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and integrating them into full-chip designs. Your expertise in lower technology nodes, physical layout techniques, and verification processes will be crucial for success in this role. You will collaborate with circuit design teams to optimize layout quality and performance, ensuring that layouts meet design matching and parasitic constraints. Working with advanced nodes like 7nm, 16nm, and 28nm, you will play a key role in advancing the company's cutting-edge projects. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Pe...

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate ...

If you are excited about joining a dynamic, ambitious team that consistently introduces innovative technologies in the realm of custom mobile electronics, this opportunity is for you! The Custom product business specializes in providing cutting-edge custom IC system solutions, such as display and touch power products, charger power products, camera PMICs, power switches/muxes, Laser drivers, and High-speed communication interfaces. By integrating signal chain and power components, our solutions empower TI customers to set their next-gen products apart in the personal electronics sector. Join the world's leading custom semiconductor team and be part of a remarkable journey. The ideal candidat...