Analog Layout Engineer

Role Overview: As an Analog Layout Engineer at Radiant Semiconductors, you will be responsible for designing and implementing analog layouts for high-performance circuits such as amplifiers, ADCs, DACs, and voltage regulators using TSMC/Samsung 7nm and below nodes. Your role will involve ensuring design compliance by performing design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC). Key Responsibilities: - Design and implement analog layouts for high-performance circuits using TSMC/Samsung 7nm and below nodes - Perform design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) Qualifications Required: - 3 to 8 years of experience in analog layout design at advanced nodes (TSMC/Samsung 7nm and below) - Proficiency in layout tools like Cadence Virtuoso, Synopsys IC Compiler, or similar - Understanding of layout-dependent effects (LDE) and its impact on performance - Knowledge of parasitic extraction, simulation, and optimization - Familiarity with design for manufacturability (DFM) techniques - Knowledge of Basic SKILL/PERL (Note: The company details were not provided in the JD.),