3.0 - 7.0 years

0 Lacs

karnataka

On-site

As a member of the TECH RADICLE Family, you will be part of our team as a Layout Design Engineer. With a minimum experience of 3 years, you will work on technology nodes such as 7nm and 5nm, primarily focusing on Lower Nodes. Our preferred foundry is TSMC. If you are an Engineer with a keen interest in this opportunity, we encourage you to share your updated resume with us at career@techradicle.in. Join us in shaping the future of technology with TECH RADICLE.,

Posted 3 days ago

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Layout/Mask Designer Acesoft Labs

5.0 - 8.0 years

8 - 15 Lacs

Hyderabad

Work from Office

Description: Description: Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Excellent problem-solving skills in physical verification of custom layout. • Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. • Ability to guide junior team-members in their execution of Sub block-level layouts & review critical items. • Contribute to effective project-management. • Effectively communicating with Local engineering teams to assure the success of layout project. Educational Background • BE or MTech in Electronic/VLSI Engineering • 5 + year experience in analog/custom layout design in advanced CMOS process. NOTE: **custom layout or analog layout with TSMC 3nm/5nm7nm & 5+ exp **** TSMC Certification?Additional Details Target Rate : 0.00TSMC Certification? : YesShift : IND|1DAYH : Mon to Fri - 8 Hours - 9am to 6pmAccess Type : Account with Email

Posted 1 month ago

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Manager : Analog Layout : Noida Incise Infotech

8.0 - 13.0 years

20 - 35 Lacs

Noida

Work from Office

About the Role: We are seeking a highly skilled and experienced Analog Layout Manager to lead our layout engineering team in the development of cutting-edge analog and mixed-signal ICs. This role requires deep technical expertise in analog layout, strong leadership capabilities, and the ability to deliver high-quality silicon in aggressive timelines. Key Responsibilities: Lead and manage a team of analog layout engineers to deliver high-quality layouts for analog and mixed-signal IPs (e.g., ADCs, DACs, PLLs, LDOs, PMICs, etc.) Own the floor planning, partitioning, and layout strategy for complex blocks and full chip integration. Collaborate closely with circuit design, verification, and physical design teams to optimize layout for performance, area, and reliability. Ensure adherence to foundry DRC/LVS/ANT/ERC/ESD guidelines and support closure of physical verification issues. Drive layout automation and CAD tool flows to improve efficiency and quality. Conduct design reviews and provide mentorship to junior layout engineers. Manage project schedules, resource planning, and risk mitigation strategies. Interface with external stakeholders including foundry, EDA vendors, and cross-functional teams. Required Qualifications: Bachelors or Masters degree in Electronics, Electrical Engineering, or related field. 8+ years of hands-on experience in analog layout and team management. Proven track record of delivering production-quality analog/mixed-signal layouts in advanced nodes (e.g., 28nm, 16nm, 7nm, or FinFET technologies). Strong knowledge of parasitic extraction, EM/IR analysis, and layout-dependent effects (LDE). Proficient in layout tools such as Cadence Virtuoso, Calibre, Assura, and Mentor Graphics. Experience in team leadership, mentoring, and performance management. Excellent communication, documentation, and project management skills. Preferred Skills: Prior experience working in a fabless semiconductor environment. Knowledge of ESD protection, latch-up rules, and analog reliability concerns. Exposure to automotive, medical, or other high-reliability standards is a plus. What We Offer: Competitive compensation and benefits. Opportunity to work on leading-edge semiconductor technology. Collaborative and inclusive work environment. Professional development and career growth. Interested candidates can share their resumes to shubhanshi@incise.in

Posted 2 months ago

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Analog Layout Engineer Incise Infotech

4 - 8 years

20 - 35 Lacs

Bengaluru

Work from Office

Layout concepts: Good knowledge in layout matching techniques and it usage Able to do floorplan, placement , routing and lvs-drc clean at block level Hands on experience in OPAMP , LDO, BGA and reference generate blocks Handle the block independently and able to communicate with design team Expertise in EM and IR fixes Good knowledge in floor planning of IPs like RX, TX and Synth IPs Understanding of DRC errors and fixing it including density errors . Good knowledge in Tsmc 6nm technology node Interested candidates can share their resumes to shubhanshi@incise.in

Posted 2 months ago

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