Physical Verification - SVRF Expert Engineers

Mirafra Technologies Hiring Physical Verification _ SVRF Expert Engineers:

Experience - 5 to 15 years

Notice Period - 0 to 60 days

Location - Bangalore

Knowledge, Skills and Experience:

• 5+ years of DRC/LVS development

  and support experience required. Exceptions made for the right candidates.
• Good knowledge of

  CMOS fundamentals

  with background in electrical engineering or semiconductor physics
• Good basic understanding of DRC, LVS and Parasitic Extraction ,
• Knowledge of

  Calibre SVRF

  required.

  PVS/Pegasus experience

  is a plus
• Knowledge of Tcl required.

  Perl, Python experience

  desired.
• Strong debugging capability, not limited only by Physical verification flows.
• Knowledge/Understanding FILL methodology
• Knowledge/Understanding Parasitic effects in ICs (Integrated Circuits)
• Experience in

  Calibre PERC applications, e.g., P2P/CD is a plus

• Experience in any commercial flow for RDSON, EMIR is beneficial
• Familiarity on Cadence custom IC Virtuoso platform, Virtuoso-L and Virtuoso-XL, schematic capture, and layout concepts.
• Willingness to gain knowledge and familiarity with several CAD tools
• Comfortable, confident working in a fast-paced environment.
• Ability to prioritize work and meet deadlines
• Good interpersonal and communication skills

Interested Candidates share your updated resume.