Analog Layout Engineer

As an Analog Layout Engineer at Radiant Semiconductors, your role will involve designing and implementing analog layouts for high-performance circuits such as amplifiers, ADCs, DACs, and voltage regulators using TSMC/Samsung 7nm and below nodes. You will be responsible for performing design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) to ensure design compliance. Key Responsibilities: - Design and implement analog layouts for high-performance circuits using TSMC/Samsung 7nm and below nodes - Perform design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) Qualifications Required: - 3 to 8 years of experience in analog layout design at advanced nodes (TSMC/Samsung 7nm and below) - Proficiency in layout tools like Cadence Virtuoso, Synopsys IC Compiler, or similar - Understanding of layout-dependent effects (LDE) and its impact on performance - Knowledge of parasitic extraction, simulation, and optimization - Familiarity with design for manufacturability (DFM) techniques - Knowledge of Basic SKILL/PERL Radiant Semiconductors is a global player in the Semiconductor Industry, founded in 2018. We offer tailored semiconductor solutions and have headquarters in Bengaluru, Hyderabad, and the USA. Our dedicated and experienced team of engineers ensures the delivery of high-quality results to accelerate clients' success. Trust in Radiant to illuminate your path to success. As an Analog Layout Engineer at Radiant Semiconductors, your role will involve designing and implementing analog layouts for high-performance circuits such as amplifiers, ADCs, DACs, and voltage regulators using TSMC/Samsung 7nm and below nodes. You will be responsible for performing design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) to ensure design compliance. Key Responsibilities: - Design and implement analog layouts for high-performance circuits using TSMC/Samsung 7nm and below nodes - Perform design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) Qualifications Required: - 3 to 8 years of experience in analog layout design at advanced nodes (TSMC/Samsung 7nm and below) - Proficiency in layout tools like Cadence Virtuoso, Synopsys IC Compiler, or similar - Understanding of layout-dependent effects (LDE) and its impact on performance - Knowledge of parasitic extraction, simulation, and optimization - Familiarity with design for manufacturability (DFM) techniques - Knowledge of Basic SKILL/PERL Radiant Semiconductors is a global player in the Semiconductor Industry, founded in 2018. We offer tailored semiconductor solutions and have headquarters in Bengaluru, Hyderabad, and the USA. Our dedicated and experienced team of engineers ensures the delivery of high-quality results to accelerate clients' success. Trust in Radiant to illuminate your path to success.