MATLAB Engineer

JMV LPS Limited

2 years

0 Lacs

noida uttar pradesh india

Posted:2 days ago| Platform:

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Skills Required

matlab simulink stateflow electrical communication instrumentation algorithms logic model design development simulation auto code software testing deployment resolve documentation compliance architecture test logical uart constraints timing scheduling git svn

Work Mode

On-site

Job Type

Full Time

Job Description

Job title :

MATLAB/ Simulink / Stateflow Engineer

Location :

Noida Sector - 11

Terms :

Permanent / In-Office

Experience :

2- 7 years

Qualification :

B.Tech / M.Tech (Electronics / Electrical / Electronics & Communication/Instrumentation /Computer Science/ Mechatronics)

Roles And Responsibilities

Develop control algorithms and system behavior models using MATLAB, Simulink, and Stateflow.
Create deterministic state machines, event-driven logic, and temporal logic for complex embedded control functions.
Perform Model-Based Design (MBD) including model development, simulation, validation, and auto-code generation.
Translate functional and system requirements into executable models with traceability.
Conduct MIL (Model-in-the-Loop), SIL (Software-in-the-Loop), and HIL (Hardware-in-the-Loop) testing with coverage analysis.
Optimize models for real-time embedded deployment ensuring compatibility with C/C++ firmware.
Collaborate with embedded engineers to integrate auto-generated code into target hardware and resolve model-code mismatches.
Maintain modeling standards, documentation, version control, and ensure compliance with safety guidelines (ISO 26262, EN 50128, DO-178C, etc., as applicable).

Key Skills & Competencies

Strong expertise in MATLAB, Simulink, Stateflow, and model architecture design.
Solid understanding of control systems, closed-loop behavior, and discrete/continuous system modeling.
Hands-on experience with MIL/SIL workflows and creation of model test harnesses.
Knowledge of Embedded Coder / Simulink Coder for auto-code generation.
Ability to design deterministic state machines and logical flows using Stateflow.
Understanding of communication protocol modeling (CAN, UART, SPI, etc.).
Familiarity with embedded constraints such as timing, scheduling, and memory limitations.
Experience with version control tools (Git/SVN) and model compliance checks.

(ref:hirist.tech)

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