Logic Design Engineer

As Logic deisgn engineer for Power Management, you will be responsible for design anddevelopment of power management and sustainability features for highperformance Processors chips.1. Lead the Development of features - propose enhancements to existingfeatures, new features, architecture in High level design discussions2. Develop micro-architecture, Design RTL, Collaborate with the Verification,DFT, Physical design, FW, SW, Research teams to develop the feature3. Guide junior engineers. Represent as Power engineer in variousforums.4. Signoff the Pre-silicon Design that meets all the functional, area and timinggoals5. Participate in silicon bring-up and validation of the hardwar6. Estimate the overall effort to develop the feature and close design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of work experience of one or more areas Power management Architecture/ microarchitecture/ Logic design – Deep technical understanding of dynamic power saving, power capping, droop mitigation techniques.1. Experience of working on Power Management designs handlingPower/Performance States, Stop states of Core and Cache, Chip and Systemthermal management and power supply current over-limit management2. Experience in working with research, architecture/ FW/ OS teams3. Experience in low power logic design4. Experience in working with verification, validation for design closure includingtest plan reviews, verification coverage5. Good understanding of Physical Design, and able to collaborate with physicaldesign team for floor-planning, placement of blocks for achieving high-performance design and timing closure of high frequency designs6. Experience in silicon bring-up