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IBM Processor Architecture and Logic design Engineer

IBM Processor Architecture and Logic design Engineer

Name: Jobpe
Address: T-Hub, Plot No 1/C, Sy No 83/1, Raidurgam panmaktha, Knowledge City Rd, Hyderabad, Telangana, 500081, IN
Telephone: +91-83339-09630
Price range: Free

IBM

12 - 17 years

6 - 10 Lacs

Bengaluru

Posted:22 hours ago| Platform:

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Skills Required

rtl design protocols cache rtl dft physical design c++ atpg digital design vhdl java fpga rtl coding perl system verilog xilinx ise asic sta asic verification c uvm verilog asic design fpga design vlsi logic design

Work Mode

Work from Office

Job Type

Full Time

Job Description

-Lead the Architecture, Design and development of processor L2 and LLC (Last LevelCache) for high-performance IBM Systems.- Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RASrequirements.- Develop the features, present the proposed architecture in the High level designdiscussions- Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physicaldesign, FW, SW teams to develop the feature- Signoff the Pre-silicon Design that meets all the functional, area and timing goals- Participate in silicon bring-up and validation of the hardware- Lead a team of engineers, guide and mentor team members, represent as Logic DesignLead in global forums.- Estimate the overall effort to develop the feature.- Estimate silicon area and wire usage for the feature Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise -12+ years of relevant experience- At least 1 generation of processor L2 cache or LLC design delivery leadership.- Expertise in cache coherence protocols for symmetric multiprocessors (SMP), coveringboth chip SMP and multi-socket SMP.- Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architecturesand implementations.- Working knowledge of memory consistency, store ordering, weakly and strongly orderedmemory.- Experience in logical and physical design of caches including directories (tags, setassociative memories), data SRAM, design for low latency, multiple parallel finite statemachine design, deadlock-free designs.

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350,000 Employees

6284 Jobs

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IBM Processor Architecture and Logic design Engineer