Design and Verification Engineer

Job Title: Design Verification Engineer (5+ Years Experience)

Location: Bengaluru & Hyderabad, India

Company: Services Company

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About the Role:

We are looking for a highly experienced Design Verification Engineer with strong expertise in PCIe or DDR protocols to join our dynamic hardware engineering team in Bengaluru. The ideal candidate will have a proven background in developing and executing verification plans for complex IPs and SoCs, along with a deep understanding of verification methodologies and tools.

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Key Responsibilities:

Develop and execute comprehensive verification plans for IP and SoC-level designs.

Create and maintain testbenches using SystemVerilog and UVM methodology.

Define and implement constrained random and directed test cases to ensure functional coverage.

Work closely with design, architecture, and validation teams to identify and resolve design and verification issues.

Perform coverage analysis, debug failures, and drive closure on coverage metrics.

Contribute to automation and regression infrastructure improvements.

Deliver high-quality verification results on schedule with minimal supervision.

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Mandatory Skills:

Hands-on experience in PCIe or DDR (any one is mandatory)

Expertise in SystemVerilog and UVM methodology

Strong understanding of digital design concepts, SoC/IP architecture, and bus protocols.

Experience with simulation, debugging, and coverage tools (VCS, QuestaSim, Verdi, etc.)

Solid experience in testbench development and functional coverage closure.

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Preferred Skills:

Exposure to AMBA (AXI/AHB/APB), Ethernet, or other high-speed interfaces.

Scripting knowledge (Python, Perl, or Shell).

Familiarity with formal verification and assertion-based verification (SVA).

Experience working with cross-functional global teams.

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Qualification:

B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering.

Minimum 5 years of relevant experience in design verification.