403 Ddr Jobs

Job Overview We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs. Job Description Lead and manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MI...

Parent company: TEKsystems Notice Period Preference- Immediate to 45 Days Client/ Project/Domain: Semiconductor Design /Manufacturing Work Location (client): Bengaluru Work timings: Normal Working hours Qualification: Bachelors degree Experience : 4+ Years of experience Interview Process : Virtual 1st Interview : Embedded C Programming and Problem solving 2nd Level interview : Domain/specialization Specific and Managerial Skills Embedded C Programming and firmware development Good understanding of DDR4, DDR5, NVDIMM Good understanding of different DIMM types (UDIMM/SODIMM/RDIMM/LRDIMM/LPDDR) Good understanding of UMC features like ECC, SME, SEV, RAS etc

Role Overview: As a Senior Analog Circuit Design Engineer at Eximietas Design, you will be responsible for designing analog and mixed-signal circuits. You should have a strong understanding of Analog & Mixed Signal Design fundamentals, including bandgap references and voltage monitors. Your role will involve implementing circuit designs for SERDES blocks like Transmitter, CTLE, SAL, DLL, Phase Interpolator, DFE, and FFE. Additionally, you will work on Die to Die interconnect high-speed IO designs, HBM, DDR, and UCIe protocols, with hands-on experience in lower FINFET technology nodes. Key Responsibilities: - Solid understanding of Analog & Mixed Signal Design fundamentals - Design implementa...

As a Senior FPGA Engineer at izmo Microsystems Ltd., you will play a crucial role in architecting and implementing FPGA-based systems for high-performance digital logic applications. With a minimum of 3 to 6+ years of hands-on experience in FPGA development, you will be responsible for various key tasks and collaborate with cross-functional teams to ensure the success of next-generation electronic systems. Key Responsibilities: - Architect and implement FPGA-based systems using VHDL or Verilog to meet high-performance requirements. - Develop RTL code, simulation testbenches, and synthesis scripts while considering timing, power, and area constraints. - Integrate FPGA designs with embedded pr...

Role Overview: As a DDR Subsystem Architect, you will be responsible for defining the hardware architecture of LPDDR, DDR, HBM, and GDDR subsystems for cutting-edge SoC platforms targeting various market segments such as mobile, automotive, datacenter, networking, and IoT. Your role will involve collaborating with Arm partners and contributing to the development of high-performance and power-efficient silicon solutions. Key Responsibilities: - Utilize JEDEC specs and DRAM vendor roadmaps to create product intercept roadmaps. - Collaborate with SoC architects, business units, and customers to establish and align DDR subsystem features and requirements. - Develop architectural specifications t...

Must have very good System Verilog/UVM knowledge with prior work experience on live projects. Expertise in AMBA bus protocols and ARM CPU Must have experience in Unix, Configuration Management, Bug tracking and verification dashboarding tools Experience in developing functional verification environments including the components like monitors, checkers, scoreboards and assertions Experience in verification methodologies using random stimulus along with functional coverag Scripting Language (PERL/Python/Shell/Makefile) Must have good debugging and problem-solving skills Experience in PCI Express and/or Ethernet bus protocols desirable Good communication skills and ability & desire to work as a...

As a Firmware Engineer at Alphawave Semi, you will play a crucial role in accelerating data communication for various digital technologies. Your responsibilities will include: - Gathering requirements, studying designs, and developing device interface functions to create higher-level firmware system designs - Collaborating with diverse teams to define detailed bring-up and validation requirements, working with Analog Design, ASIC/Digital Design, Digital Verification, and software engineers to achieve performance goals - Participating in design reviews, developing architecture documents, and translating requirements into efficient C/C++ firmware code - Overseeing the firmware lifecycle for UC...

Candidates with 1-3 Yrs expertise in SV, UVM, Verilog, DV, RTL design knowledge. Preferred VLSI Diploma course mandatory. VLSI products and services

DDR5/SerDes Verification Engineer We are seeking a skilled and motivated DDR5/SerDes Verification Engineer to join our organization. As a DDR5/SerDes Verification Engineer, you will be responsible for verifying and validating the functionality and performance of DDR5 memory subsystems and high-speed SerDes interfaces. In addition to strong DDR5 and SerDes verification expertise, knowledge and experience with sideband I2C and I3C protocols would be considered a plus. Candidate should have Design and implement advanced verification environments and test benches using SystemVerilog/UVM Experience4-10 Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

You will work with some of the brightest people you'll ever meet. Engineers, Analysts, and Product owners collaborate to identify, develop, and maintain top-notch financial solutions. - Create and source a wide variety of designs that can be implemented and validated on FPGA boards - Conduct system-level integration and testing - Ensure timing closure of FPGA Designs - Develop methodologies for HW validation for different types of designs Desired Skills: - Four-year degree in ECE/EEE, VLSI Design, or related field and/or equivalent training and/or experience - Knowledge in Logic design / RTL coding using Verilog, System Verilog, or VHDL - Hands-on expertise in Multi Clock designs, Asynchrono...

As a Semiconductor Design Engineer_3_4861 based in Hyderabad, your role involves providing verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Your key responsibilities will include: - Developing test cases/Stimulus to enhance functional coverage for all DRAM and emerging memory architectures and features. - Creating and maintaining test benches and test vectors using simulation tools, and running regressions for coverage analysis and improvements. - Collaborating with international colleagues to develop new verification flows for addressing challenges in DRAM and emerging memory design. - Participating in the development of verifica...

As a Lead Analog Validation Engineer, you will be responsible for developing unique bench characterization test methodologies for ADC, DAC, PLL, USB, VREG, OSC, DDR, LOW POWER, and IO PADs to verify devices" functional and electrical performance across various parameters. Your primary responsibilities will include: - Developing and writing automated code to control test equipment for data collection and processing - Performing Design Evaluation and Bench Characterization for Analog IPs in Automotive, Industrial, and Consumer Electronics industries - Providing requirements, reviewing schematics, and PCB layout for maintaining Signal Integrity - Providing customer application note support by g...

General Summary: Exp:- 9-13 years ( from ECE EEEE&I/ CSE IT Background and relevant experience in Embedded system and DDR domain) Note :- We are looking for candidates who has relevant work experience in DDR technology( memory controllers, PHY and DRAMs), Firmware and SW driver development/ Platform driver development Board Bring up OR If candidate has very strong debugging expertise in system level issues like Bit flip , memory corruption , cache corruption , CPU Hang etc. Desirable: DDR technology (Relevant work exp in DDR SW driver required ) or Platform driver development Board Bring up Opportunity: Debug and Development of DDR init & run time driver sequences. Will be working on state-o...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

Understand the design specification, Power On Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Running regression checks and coverage analysis Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Experience in Design Verification - demonstrated execution experience of verification of logi...

Your Role As a SoC Integration Engineer , you will play a key role in the design and integration of System-on-Chip (SoC) components, contributing to the development of high-performance semiconductor solutions. Youll work on RTL coding, verification flows, and integration of IP blocks, ensuring robust and efficient designs that meet industry standards. In this role, you will: Integrate SoC components and contribute to RTL coding and micro-architecture design. Work with tools and flows such as Spyglass-Lint, CDC, DC-Synthesis, and VCLSP. Develop and maintain scripts using Perl, Python, Shell, and Tcl to automate design tasks. Collaborate with cross-functional teams to ensure seamless SoC integ...

Candidates with 1-3 Yrs expertise in SV, UVM, Verilog, DV, RTL design knowledge. Preferred VLSI Diploma course mandatory. VLSI products and services

Role Overview: As a Lead Verification Engineer, you will be responsible for working on IP and SOC level verification. You must have 7-12 years of experience and good expertise in Verilog, System Verilog, and UVM. Your role will involve SOC Verification for a minimum of 7 years and experience with protocols such as AXI, AHB, DDR, PCIe, Ethernet, MIPI, and USB. Additionally, you should have experience in the verification of automotive protocols. Being an excellent team player and leader is essential for this role. Key Responsibilities: - Work on IP and SOC level verification - Utilize Verilog, System Verilog, and UVM effectively - Perform SOC Verification for a minimum of 7 years - Have experi...

We are seeking a highly skilled Senior PCB Design Engineer with extensive experience in the end-to-end design of high-speed, RF, mixed-signal, and power boards. The ideal candidate will have a proven track record of designing complex multilayer PCBs (16+ layers), working closely with FPGA, DDR, microcontroller, and power systems, while ensuring optimal signal and power integrity across designs. --- Key Responsibilities: Lead the design, layout, and validation of high-speed, mixed-signal, and RF PCB assemblies with 16 layers. Collaborate with hardware, FPGA, and mechanical teams to translate schematics into optimized PCB layouts. Perform Signal Integrity (SI) and Power Integrity (PI) simulati...

Develop and productize next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, AI and communications markets Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for IPs Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans Pre-Silicon and Post Silicon validation for new PCIe enabled blocks Responsible for IP design, Silicon bring up, Val...

Job details: Job Title: Digital RTL Design Engineer Location: On-Site Experience Level: Mid-Senior (3-7 years) Job Description: Responsibilities: Design and implement digital RTL for complex systems. Collaborate with verification engineers to ensure design meets all functional and performance requirements. Perform synthesis, timing analysis, and optimization to meet design specifications. Debug and resolve design issues, ensuring high-quality and reliable designs. Participate in design reviews and provide constructive feedback. Document design processes, specifications, and methodologies. Work closely with cross-functional teams (DFT, PD, DV) for integration and sign-off. Requirements: Bache...

Role Overview: You will be a part of Micron Technology, a global leader in innovating memory and storage solutions. As a Senior Engineer in Analog Design (JR56580), your primary responsibility will involve designing, implementing, and enhancing complex analog circuits for advanced DRAM products using cutting-edge semiconductor process nodes. Your role will also include integrating modules with power delivery networks, validating and optimizing designs for reliability, and driving innovation for future memory generations within a dynamic work environment. Key Responsibilities: - Design, implement, and improve complex analog circuits such as CMOS Amplifiers, Comparators, IO circuits (DDR/LPDDR...

Role & responsibilities 6-8 years of experience in high-speed SI/PI simulations and testing •Should have hands on experience on interfaces such as PCIe gen 3/4/5, DDR 4/5, LPDDR 4/5, 10G Ethernet, USB 3.2 gen 1&2.Should be able to perform pre and post layout analysis (die/pkg/board) •Should have knowledge about stack-up selection which includes dielectric materials, copper thickness & impedance control •Should be able to analyze S-Parameters which includes insertion loss, return loss, crosstalk & TDR •Should have hands on experience in simulation using IBIS/IBIS-AMI models.Good to have hands on experience with Oscilloscope & VNA.Ability to identify technical issues and analyze their root cau...

Role Overview: As a Senior RTL Design Lead at Synopsys, you will play a crucial role in leading complex ASIC digital subsystems from concept to silicon. You will be responsible for crafting subsystem architectures, developing functional specifications, implementing micro-architectures, and ensuring compliance with best RTL coding practices. Your expertise in industry-standard protocols such as PCIe, DDR, UFS, USB, and AMBA will be essential in integrating them within subsystem designs. Additionally, you will mentor junior engineers, participate in technical reviews, and drive innovation within the team. Key Responsibilities: - Lead the complete subsystem lifecycle, from requirements gatherin...

Role Overview: You will be a Hardware-Assisted Verification Expert with deep knowledge of IP interfaces such as PCIe and DDR, and experience with Zebu, HAPS, and EP platforms. Your role will involve bridging and closing gaps between available or required Emulation hyper scaler Designs, IP, and product validations. You will be responsible for reporting metrics, driving improvements in Emulation PE and RND, and driving requirements for the Emulation to ensure its correct usage and deployment in verification strategies for customers. Additionally, you will stay ahead of evolving standards, understand future changes, specification errata, and drive this understanding into both the Emulation IP a...