Design and Verification Engineer

1 - 5 years

1 - 5 Lacs

Posted:1 day ago| Platform: Naukri logo

Apply

Work Mode

Work from Office

Job Type

Full Time

Job Description

  • M. Tech candidates with 1+ years of experience in designverification systemverilog C++ protocols ideally UCIe CXL MIPI PCIe CHI etc.

  • Role: Software Engineer II
    Location: Noida Notice Period: 15-30 days
  • • M. Tech with 1+ Year of relevant experience in functional verification, test environment creation using SV/UVM with strong debug skills. • Hands-on knowledge of C/C++/Scripting. • Working experience on layered Protocols - UCIe, PCIe, CXL, Ethernet. Prior VIP usage and development experience is a plus

Mock Interview

Practice Video Interview with JobPe AI

Start Job-Specific Interview
cta

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.

Job Application AI Bot

Job Application AI Bot

Apply to 20+ Portals in one click

Download Now

Download the Mobile App

Instantly access job listings, apply easily, and track applications.

coding practice

Enhance Your Skills

Practice coding challenges to boost your skills

Start Practicing Now

RecommendedJobs for You