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ASIC/RTL Design Engineer - Senior Staff

ASIC/RTL Design Engineer - Senior Staff

Qualcomm

6 - 11 years

15 - 20 Lacs

bengaluru

Posted:14 hours ago| Platform:

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Skills Required

synthesis hardware engineering vhdl verilog synopsys sta physical design python static timing analysis hiring primetime cpu gps graphics timing analysis hw staffing floor planning java timing closure drc pnr computer architecture tcl

Work Mode

Work from Office

Job Type

Full Time

Job Description

General Summary:

You will be implementing the industry's leading edge graphics processor, specific areas include 2D and 3D graphics, streaming processor, high speed IO interface and bus protocols. In this position, the designer will be responsible for architecture and micro-architecture design of the ASIC, RTL design and synthesis, logic and timing verification. The successful candidate for this position will specify and design digital blocks in our Multimedia Graphics team that will be integrated into a broad range of devices. All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.

Minimum QualificationsBachelor's degree in Science, Engineering, or related field

Previous experience in designing GPU or CPU cores and ASICs for Multimedia and Graphics applications in deep sub-micron CMOS processes for volume productionExperience with Verilog/VHDL design, Synopsys synthesis, static timing analysis, formal verification, low power design, test plan development, coverage-based design verification, and/or design-for-test (DFT)Experience with Computer Architecture, Computer Arithmetic, C/C++ programming languages is desiredExposure to DX9~12 level graphics HW development is big plusGood communication skill and desire to work as a team player
Required: Bachelor's degree in Computer Science, Electrical Engineering, Information Systems, or related field.Preferred: Master's degree in Computer Science, Electrical Engineering, Information Systems, or related field.
ASIC, hardware, design, GPU, OpenGL, DirectX, RTL, Verilog, SystemVerilog

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

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ASIC/RTL Design Engineer - Senior Staff