ASIC/RTL Design Engineer

2 - 7 years

0 Lacs

Posted:1 week ago| Platform: Shine logo

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Work Mode

On-site

Job Type

Full Time

Job Description

As an experienced ASIC design engineer at Qualcomm India Private Limited, you will be responsible for micro-architecture development, RTL design, and front-end flows. Your key responsibilities will include: - Mirco architecture & RTL development and its validation for linting, clock-domain crossing, and DFT rules. - Working with the functional verification team on test-plan development and waveform debugs at core, sub-system, SoCs levels. - Hands-on experience in constraint development and timing closure. - UPF writing, power-aware equivalence checks, and low power checks. - Supporting performance debugs and addressing performance bottlenecks. - Providing support to sub-system, SoC integration, and chip-level debug. Qualifications required for this role include: - MTech/BTech in EE/CS with 7+ years of ASIC design experience. - Good understanding of DDR families and generations, protocols like AHB/AXI/ACE/CHI, and experience with post-silicon bring-up and debug. - Hands-on experience in Multi Clock designs, Asynchronous interface, and Low power SoC design. - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 4+ years of Hardware Engineering experience, OR Master's degree with 3+ years of experience, OR PhD with 2+ years of experience. At Qualcomm, we are committed to providing equal opportunities and accessible processes for individuals with disabilities. Our employees are expected to adhere to all applicable policies and procedures, including security and confidentiality requirements. Please note that our Careers Site is for individuals seeking jobs at Qualcomm, and we do not accept unsolicited resumes or applications from agencies. For more information about this role, please contact Qualcomm Careers.,

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Qualcomm

Technology

San Diego

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