15 Zebu Jobs

As a Hardware-Assisted Verification Expert at Synopsys, you will play a crucial role in bridging and closing gaps between Emulation IP features and Design IP verification for both Controller and PHY functions. Your deep knowledge of IP interfaces like PCIe and DDR, coupled with experience in platforms such as Zebu, HAPS, and EP, will be essential in driving requirements for Emulation IP and ensuring its correct deployment in verification strategies. Your hands-on approach and collaborative mindset will drive innovation in defining requirements for IP product development in the context of emulation. Your responsibilities will include reporting metrics, driving improvements in Emulation IP, ensuring test plans deliver required function and quality, and staying ahead of evolving standards. You will enhance cross-functional collaboration, change the validation mindset in using Emulation IP for digital designs, and evolve best-in-class methodologies within the organization. Your impact will be felt in improving product quality, driving innovation, and standardizing workflows to increase efficiency and compliance. To excel in this role, you should have 10+ years of relevant experience, a results-driven mindset, exposure to advanced protocols like PCIe and DDR interfaces, and a proven track record in IP product development, particularly in emulation. Your excellent communication skills, adaptability, and comfort in a matrixed, international environment will be key in driving success in this position. Join us at Synopsys to transform the future through continuous technological innovation.,

We are looking for experienced Pre-Silicon Emulation Engineers to join our client's growing team. The ideal candidate will have hands-on experience in emulation tools, design verification methodologies, and a deep understanding of SoC or ASIC-based system modeling. You will work closely with cross-functional teams to accelerate hardware-software co-verification and system validation in the pre-silicon phase. Key Responsibilities: Develop and execute emulation-based verification strategies for complex systems and SoCs. Work with emulation platforms such as Palladium, Zebu, and Veloce. Model and simulate systems using SystemC, C/C++, and TLM 2.0. Collaborate with design and verification teams to identify issues early in the development cycle. Support integration of hardware and software components for system-level validation. Contribute to test plan development, debug failures, and drive closure. Requirements: Bachelors or Masters degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field. 48 years of experience in Emulation and Design Verification. Proficiency with emulation tools like Cadence Palladium, Synopsys Zebu, or Mentor Veloce. Hands-on experience with SystemC, C/C++, and UVM-SystemC. Strong understanding of SoC/ASIC design, hardware/software co-verification, and industry standards. Experience in modeling, simulation, and verification of embedded systems or complex hardware architectures. Excellent problem-solving, communication, and collaboration skills. Detail-oriented with a quality-first approach. Preferred Qualifications: Experience in pre-silicon validation of multi-core systems or hardware accelerators. Exposure to RTL design and FPGA prototyping is a plus.

You are a skilled professional with expertise in design and validation, ready to join a dynamic and innovative team. Your background includes developing and validating FPGA-based solutions, with solid knowledge of PCIe, CXL, USB, and other protocols. You are enthusiastic about tackling daily technical challenges and possess qualities such as self-motivation, proactivity, responsiveness, persistence, and outstanding problem-solving skills. Your key responsibilities will involve developing and implementing comprehensive validation plans for various interface solutions, ensuring compliance with industry standards. You will design FPGA-based solutions to support Hardware Assisted Verification (HAV) and conduct thorough testing and validation to identify and resolve issues. Collaboration with design teams, documentation of validation processes, and clear reporting to stakeholders will be essential. Additionally, you will work closely with cross-functional teams to ensure seamless project execution and stay updated on industry trends and advancements in validation methodologies and tools. To qualify for this role, you should hold a Bachelors or Masters degree in Electronics, Electrical, or Computer Engineering (or a related field) with a minimum of 8 years of design and validation experience. Your expertise should include extensive knowledge of FPGA-based design and validation methodologies, a strong understanding of high-speed protocols like PCIe, CXL, and USB, and proficiency in programming languages such as C/C++, SystemVerilog, Verilog, Perl, Python, and TCL. Experience with emulation or prototyping platforms like ZeBu or HAPS would be advantageous. Your problem-solving skills, attention to detail, communication, and collaboration abilities are crucial for effective teamwork and project success.,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A Hardware-Assisted Verification Expert with deep knowledge of IP interfaces such as PCIe and DDR, and experience with Zebu, HAPS, and EP platforms. You have a proven track record in IP verification and methodology ownership focused on emulation and verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Your hands-on approach, collaborative mindset, and proactive attitude drive results. You are passionate about developing optimal solutions covering the entire ecosystem of Controller and PHY, with a focus on emulation and acceleration. What Youll Be Doing: * Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification of all its functions, covering both the Controller and PHY. * Reporting metrics and driving improvements in Emulation IP. * Using your expertise to drive requirements for the Emulation IP and ensure its correct usage and deployment in verification strategies for both Controller and PHY. * Staying ahead of evolving standards, understanding future changes, specification errata, and driving this understanding into both the Emulation IP and Design IP teams. * Reviewing test plans in both Emulation IP and Design IP to ensure they deliver the required function, feature, and quality to be best in class. The Impact You Will Have: * Enhancing cross-functional collaboration to improve product quality and end customer satisfaction. * Changing the mindset in the way we use Emulation IP in validating digital designs and architectures. * Driving innovation in defining requirements for IP product development, in the context of Emulation. * Evolving and integrating best-in-class methodologies within the organization. * Standardizing and optimizing workflows to increase efficiency and compliance. What You’ll Need: * 10+ years of relevant experience. * Results-driven mindset. * Exposure on advanced protocols like PCIe and DDR interfaces. * Experience with Zebu in the context of technology and IP verification. * Proven track record in IP product development, specifically emulation. * Experience in cross-functional collaborations. * Excellent communication skills and a beacon for change. * Adaptability and comfort in a matrixed, international environment.

Emulation Engineer About the Role Key member of design Emulation team responsible for SOC or subsystem design pre silicon verification. The candidate will be responsible for creating/ modifying BFMs, tests in the Palladium and Protium environment to meet the left shift. Job Responsibilities: Develop and deploy Accelerated Verification IPs, Synthesizable BFMs and help in integration of memory models of various interfaces. Engaging with EDA vendors and ADI internal teams. Understand the SW left shift requirements and implement the Palladium/ Protium env. Understand the critical paths in Palladium/ protium for speed improvements Maintaining the builds Position Requirements: Bachelors/masters degree in electrical/Electronics/VLSI with 4+ years of experience on emulation (Protium mainly). Exposure to emulation platforms like Palladium/Zebu/Veloce and prototyping platforms like Protium/HAPS is highly preferred. Exposure to JTAG, UART and Speed Bridges (Ethernet/USB) validation is highly preferred Expertise in one or more of scripting languages (shell, python, Perl) is highly preferred Proficient in SV, UVM, integration of third party VIPS, Accelerated VIPS is required Experience in common communication protocols such as AMBA, I2C, SPI, UART and Ethernet is an added advantage Should be able to communicate technical details very effectively Good debugging and analytical skills

Responsibilities: Hands-on experience with ZeBu or Palladium emulators Strong RTL understanding (SV/UVM) and SoC knowledge Experience in pre-silicon validation and hardware/software co-emulation Familiarity with waveform, simulator, and debug tools

Bridge and close gaps between Emulation hyper scaler designs, IP, and product validation Drive requirements for Emulation deployment and integration into customer verification strategies Report on key metrics and implement continuous improvements in Emulation PE and R&D Stay current with evolving interface standards and specification errata (e.g., PCIe, DDR) Guide the correct usage and enhancement of Emulation IP for digital design validation Foster deep collaboration between Emulation IP and Design IP teams for alignment and quality The Impact You Will Have: Strengthen cross-functional collaboration, improving overall product quality and customer satisfaction Shift industry perspectives and internal strategies for using Emulation in design and verification Define innovative requirements that shape future product development in Emulation Integrate best-in-class methodologies and standardize workflows across teams Influence the direction of digital design architecture validation using Emulation technologies What You'll Need: 8+ years of experience in Emulation, hardware verification, or related domains Strong exposure to large design emulation compiles and advanced protocols like PCIe and DDR Hands-on experience with Zebu or similar emulation platforms Proven track record in emulation-driven product deployment Excellent collaboration and communication skills to drive alignment across global teams Comfortable navigating matrixed, international environments and leading change initiatives

Emulation experience on any/all available platforms (Palladium, Protium, Veloce, or Zebu, EP) including design bringup, build flow, debug, performance and throughput tuning. Experience with Verilog, VHDL design Knowledge

Experience in emulation using palladium, HAPS, Zebu or HAPS for SOC involving ARM/RISCV architecture.Extensive experience is functional emulation , bringup and debug.Must:Emulation experience in synopsys or cadence or siemens flow. Exp: 12 to 18 yrs

Permanent Job Opportunity Pre & Post Silicon Validation Engineer | Bangalore:: Univision Technology Consulting Pvt. Ltd Position Details: Role: Permanent Position Company Name: Univision Technology Consulting Pvt. Ltd., Bangalore Website: https://univisiontechnocon.com Job Location: Bangalore About Us: UNIVISION enables technology through R&D, innovation, passion, and disruption in areas such as System Engineering, IoT, Automation, Cloud Computing, and Artificial Intelligence. We offer customer-centric and customized solutions across industry verticals including Semiconductors, Automotive, Cloud Computing, Consumer Electronics, and Automation Control Systems. Role: Pre & Post Silicon Validation Engineer Areas of Responsibility: Hands-on experience in complex silicon validation on emulation and pre & post-silicon platforms. In-depth knowledge of one or more peripheral protocols and specifications. Bare-metal/Linux driver and firmware development experience, with excellent C programming skills. Knowledge of any CPU architecture (ARM preferred). Platform/board-level debugging experience is an added advantage. Familiarity with lab equipment such as oscilloscopes, signal generators, protocol analyzers, and logic analyzers. Key Skills: Zebu, Palladium, FPGA, Ethernet, Flash IPs, PCIe SerDes, ARM Experience Required: 5 to 10 years Additional Skills and Experience: Testing and validating embedded systems functionality using virtual prototypes. Strong communication skills for effective collaboration with design teams and sharing validation insights. Basic test case development and execution for hardware/software integration in pre- and post-silicon phases. Debugging and troubleshooting hardware systems in a virtualized environment. Strong understanding of embedded systems, firmware development, and system-on-chip (SoC) architecture. Proficiency in programming languages such as C for testing and automation. Collaborating with cross-functional teams for co-validation and early firmware support. Troubleshooting using logs, simulations, and virtualization tools.

Role & responsibilities We are actively looking for highly experienced Emulation Engineers to join our team in Bangalore. If you have over 6+ years of experience in FPGA(HAPS) / Synopsys(ZEBU) with expertise in: Emulation and Prototyping technologies such as Palladium, Veloce, Zebu, HAPS, (these names are registered trade marks of their respective owners)Developing emulation testbenches to support necessary Design Verification scenarios and firmware/software/hardware bring up Build emulation models from RTL and release/support those models Develop emulation tools such as debugger and monitor features Work closely with verification and software development teams Develop emulation and verification strategy Develop test framework and test cases Write documents such as verification specification and reports Preferred candidate profile Bachelors/Master’s degree or higher in EEE/ECE 6 to 12 years or more of practical semiconductor Emulation and Prototyping technologies such as Palladium, Veloce, Zebu, HAPS, (these names are registered trade marks of their respective owners) Experience with one or more of the emulation platforms like HAPS, Zebu, Palladium, or Veloce Experience in FPGA prototyping, with programming experience in C/C++, Verilog, Python, shell scripting. Prototyping / ProtoCompiler and Vivado expert added advantage. Experience with emulation model development and bring up Experience with developing new transactors and hybrid emulation model development Computer architecture knowledge, especially in CPU and standard bus protocols Excellent verbal and written communication skills

A Hardware-Assisted Verification Expert with deep knowledge of IP interfaces such as PCIe and DDR, and experience with Zebu, HAPS, and EP platforms. You have a proven track record in IP verification and methodology ownership focused on emulation and verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Your hands-on approach, collaborative mindset, and proactive attitude drive results. You are passionate about working closely with customer, RND, PV and Product Engineering to work on latest emulation technologies to deploy and enhance optimal solutions covering the entire ecosystem of Large SOCs, Controller and PHY, with a focus on emulation and acceleration. What You ll Be Doing: Bridging and closing gaps between the available or required Emulation hyper scaler Designs, IP and product validations of all its functions. Reporting metrics and driving improvements in Emulation PE and RND Using your expertise to drive requirements for the Emulation and ensure its correct usage and deployment in verification strategies for customers. Staying ahead of evolving standards, understanding future changes, specification errata, and driving this understanding into both the Emulation IP and Design IP teams. The Impact You Will Have: Enhancing cross-functional collaboration to improve product quality and end customer satisfaction. Changing the mindset in the way we use Emulation IP in validating digital designs and architectures. Driving innovation in defining requirements for product development, in the context of Emulation. Evolving and integrating best-in-class methodologies within the organization. Standardizing and optimizing workflows to increase efficiency and compliance. What You'll Need: 8+ years of relevant experience. Results-driven mindset. Exposure to large design emulation compiles along with advanced protocols like PCIe and DDR interfaces. Experience with Zebu in the context of technology and SW validation. Proven track record in product deployment, specifically emulation. Experience in cross-functional collaborations. Excellent communication skills and a beacon for change. Adaptability and comfort in a matrixed, international environment.

Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification of all its functions, covering both the Controller and PHY. Reporting metrics and driving improvements in Emulation IP. Using your expertise to drive requirements for the Emulation IP and ensure its correct usage and deployment in verification strategies for both Controller and PHY. Staying ahead of evolving standards, understanding future changes, specification errata, and driving this understanding into both the Emulation IP and Design IP teams. Reviewing test plans in both Emulation IP and Design IP to ensure they deliver the required function, feature, and quality to be best in class. The Impact You Will Have: Enhancing cross-functional collaboration to improve product quality and end customer satisfaction. Changing the mindset in the way we use Emulation IP in validating digital designs and architectures. Driving innovation in defining requirements for IP product development, in the context of Emulation. Evolving and integrating best-in-class methodologies within the organization. Standardizing and optimizing workflows to increase efficiency and compliance. What You'll Need: 10+ years of relevant experience. Results-driven mindset. Exposure on advanced protocols like PCIe and DDR interfaces. Experience with Zebu in the context of technology and IP verification. Proven track record in IP product development, specifically emulation. Experience in cross-functional collaborations. Excellent communication skills and a beacon for change. Adaptability and comfort in a matrixed, international environment.

In this role you will work on SoC/Sub-system level Emulation model development and design bring up on Zebu/Veloce HW platforms. Additionally, you will work closely with design, verification, validation, and SW teams to implement emulation testbench (XTORs, Speed Adaptors) and features required to develop content on emulation models. You would develop tests to qualify models. Key Skills 815 years of experience on SoC/Sub-system Emulation of multi-million gate and complex design with multiple clocks and power domains Experience in microcontroller architecture, Cores ARM A/M series, Interconnect (NIC, FlexNoC), Protocols like AHB, AXI, Memory (Flash, SRAM, DDR4/5), and memory controllers Experience in automotive protocols like LIN, CAN, high-speed protocols like PCIe, Ethernet, USB etc. would be an advantage Emulation model creation from RTL/Netlist Experienced in Zebu/Veloce emulation platforms Create and execute test plans targeting emulation model qualification Experience with Speed Bridge Integration and perform real-time testing would be a plus Experience in integrating Acceleration VIPs/XTORs and perform co-emulation Scripting and Automation to continuously improve operational efficiency

In this role you will work on SoC/Sub-system level Emulation model development and design bring up on Zebu/Veloce HW platforms. Additionally, you will work closely with design, verification, validation, and SW teams to implement emulation testbench (XTORs, Speed Adaptors) and features required to develop content on emulation models. You would develop tests to qualify models. Key Skills 8-15 years of experience on SoC/Sub-system Emulation of multi-million gate and complex design with multiple clocks and power domains Experience in microcontroller architecture, Cores ARM A/M series, Interconnect (NIC, FlexNoC), Protocols like AHB, AXI, Memory (Flash, SRAM, DDR4/5), and memory controllers Experience in automotive protocols like LIN, CAN, high-speed protocols like PCIe, Ethernet, USB etc. would be an advantage Emulation model creation from RTL/Netlist Experienced in Zebu/Veloce emulation platforms Create and execute test plans targeting emulation model qualification Experience with Speed Bridge Integration and perform real-time testing would be a plus Experience in integrating Acceleration VIPs/XTORs and perform co-emulation Scripting and Automation to continuously improve operational efficiency.