Power Management Engineer in Pune, MH, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: Ampere Computing is looking for a qualified design engineer on power analysis, optimization, and validation, to contribute in designing our high-performance power-efficient microprocessor chipset. This person will be a part of the Silicon Engineering team and work across multiple groups to drive the power requirements, and power optimization from micro-architecture to final silicon. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Power analysis engineer is expected have strong CMOS design fundamentals and deep knowledge of power reduction techniques at various levels of abstraction. Expertise in analyzing the results given by various power estimation tools and create actionable items for power reduction. Experience in developing flows and post processing scripts to help in analysis and rollup. Setup power analysis environment for at the RTL-level, and gate-level for power analysis of all design blocks at the pre-silicon stage. Determine tests and benchmarks to run on all blocks for pre-silicon power analysis Develop tests in DV test environment to certain use cases interesting for power analysis and reduction Run and review power analysis reports at the RTL-level and gate-level on all design blocks. Identify areas of improvements at the architecture-level, RTL-level, and synthesis. Analyze power from activities from workloads run on emulation environment Determine power optimization budgets for all blocks, and setup runs to validate them as the design progresses. Understand the different CPU use cases, Memory and Pcie workloads. Work with industry standard power analysis tools like Spyglass/Power Artist/Joules/PrimePower etc. Maintain and improve existing power modeling and analysis flows. Experience with power analysis using gate-level and RTL-power analysis tools Good understanding of power analysis and optimization on CMOS designs Good understanding of clock-gating, power-gating, DVFS, etc. used for power optimization Good understanding of processor designs, processor work-loads. Solid programming and scripting skills using Perl/Python/Tcl Experience running power analysis on activity from emulation environment Owned CPU or SOC design blocks and familiar with design flows (synthesis, place & route, power, timing, EM/IR) Owned power analysis methodology and/or automation in previous role Hands-on working experience with Power analysis tools and flows (one or more of the following industry-standard tools: Primepower, PTPX, Power Artist, Joules, Voltus) Advanced knowledge of Python, TCL and shell scripting M.Tech in Electronics Engineering or Computer Engineering with 1+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

We are looking for a seasoned HPC Systems Engineer (Storage/DevOps) to join our team. The ideal candidate will bring more than five years of practical experience in designing, deploying, and managing scalable storage infrastructures, along with expertise in DevOps methodologies. This role is essential in supporting our expanding HPC infrastructure while driving automation initiatives. What you ll achieve: Design, configure, implement, test, document, and support Storage, Backup, Disaster Recovery (DR), and related infrastructure. Understand application requirements to define appropriate storage and backup environments. Collaborate with technical experts to support storage and backup processes and associated tools. Perform enterprise storage solutions performance analysis, tuning, and recommend industry best practices to customers. Generate storage and backup reports as needed. Design and implement Business Continuity (BC) and Disaster Recovery (DR) plans for critical business data. Ensure healthy backup, replication, Recovery Point Objective (RPO), and Recovery Time Objective (RTO). Expertise in monitoring and alerting tools such as Prometheus, SolarWinds, Grafana, and building dashboards. Create and maintain documentation for storage and backup technologies, ensuring a stable environment with 99.999% uptime. About you: Bachelor s or Master s degree in Computer Science or a related technical field. Experienced Senior Storage and DevOps Engineer with over five years of expertise in related field. Strong communication skills and a team player with a can do attitude. Extensive expertise in NAS storage systems such as NetApp, Vast, PowerScale, Isilon. Experience with backup technologies like Rubrik, Commvault, or equivalent. Advanced knowledge of storage and backup security best practices. Proficient in scripting languages such as Perl and Python. Good understanding of cloud technologies, Linux systems, and Windows environments. Ability to conduct performance analysis and communicate technical details clearly to teams and business partners. Participate in capacity planning related to storage infrastructure. Knowledgeable about disaster recovery (DR) and modern technologies including vaulting, airgap, ransomware protection, and anomaly detection.

Mesh / Coherency Design Verification Engineer in Pune, MH, India Mesh / Coherency Design Verification Engineer Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team we d love to have you apply. Come invent the future with us. About the role: You will work on the verification of a server-class microprocessor-based CPU/Coherent Mesh interconnect. Youll be involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of microprocessors. Youll also partner with other teams to accelerate post-silicon validation and debug of the product. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Define requirements for block level and subsystem level testing infrastructure Create test plans for unit-level and chip-level verification and post-silicon validation Architect, design and implement test benches and other components of design verification environment Create random test generators to find bugs in design Debug failures and drive speedy resolution of bugs Create coverage monitors and drive coverage to required quality targets Define post-silicon validation plans, and engage in post-silicon activities to accelerate product launch Lead verification activities within a team and guide other engineers to achieve project goals M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Solid understanding of high-performance microprocessor architecture concepts Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM Programming experience in languages common to the industry (e.g., C, C++, Perl, Python) Experience in automating design, verification, and validation tasks Hands on experience in post-silicon validation Knowledge of ARM or x86 architecture and assembly language programming Previous experience in CPU/core design verification is preferred Previous experience in Network-on-chip (NoC) design verification is preferred Previous experience with Arm AMBA (APB/AHB/AXI/ACE/CHI) protocols is preferred Previous experience with formal verification is preferred What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Mesh / Coherency Design Verification Engineer in Bangalore, KA, India Mesh / Coherency Design Verification Engineer Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team we d love to have you apply. Come invent the future with us. About the role: You will work on the verification of a server-class microprocessor-based CPU/Coherent Mesh interconnect. Youll be involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of microprocessors. Youll also partner with other teams to accelerate post-silicon validation and debug of the product. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Define requirements for block level and subsystem level testing infrastructure Create test plans for unit-level and chip-level verification and post-silicon validation Architect, design and implement test benches and other components of design verification environment Create random test generators to find bugs in design Debug failures and drive speedy resolution of bugs Create coverage monitors and drive coverage to required quality targets Define post-silicon validation plans, and engage in post-silicon activities to accelerate product launch Lead verification activities within a team and guide other engineers to achieve project goals M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Solid understanding of high-performance microprocessor architecture concepts Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM Programming experience in languages common to the industry (e.g., C, C++, Perl, Python) Experience in automating design, verification, and validation tasks Hands on experience in post-silicon validation Knowledge of ARM or x86 architecture and assembly language programming Previous experience in CPU/core design verification is preferred Previous experience in Network-on-chip (NoC) design verification is preferred Previous experience with Arm AMBA (APB/AHB/AXI/ACE/CHI) protocols is preferred Previous experience with formal verification is preferred What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Mesh / Coherency Design Verification Engineer in Pune, MH, India Mesh / Coherency Design Verification Engineer Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: You will work on the verification of a server-class microprocessor-based CPU/Coherent Mesh interconnect. Youll be involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of microprocessors. Youll also partner with other teams to accelerate post-silicon validation and debug of the product. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Define requirements for block level and subsystem level testing infrastructure Create test plans for unit-level and chip-level verification and post-silicon validation Architect, design and implement test benches and other components of design verification environment Create random test generators to find bugs in design Debug failures and drive speedy resolution of bugs Create coverage monitors and drive coverage to required quality targets Define post-silicon validation plans, and engage in post-silicon activities to accelerate product launch Lead verification activities within a team and guide other engineers to achieve project goals M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Solid understanding of high-performance microprocessor architecture concepts Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM Programming experience in languages common to the industry (e.g., C, C++, Perl, Python) Experience in automating design, verification, and validation tasks Hands on experience in post-silicon validation Knowledge of ARM or x86 architecture and assembly language programming Previous experience in CPU/core design verification is preferred Previous experience in Network-on-chip (NoC) design verification is preferred Previous experience with Arm AMBA (APB/AHB/AXI/ACE/CHI) protocols is preferred Previous experience with formal verification is preferred What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Mesh / Coherency Design Verification Engineer in Bangalore, KA, India Mesh / Coherency Design Verification Engineer Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: You will work on the verification of a server-class microprocessor-based CPU/Coherent Mesh interconnect. Youll be involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of microprocessors. Youll also partner with other teams to accelerate post-silicon validation and debug of the product. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Define requirements for block level and subsystem level testing infrastructure Create test plans for unit-level and chip-level verification and post-silicon validation Architect, design and implement test benches and other components of design verification environment Create random test generators to find bugs in design Debug failures and drive speedy resolution of bugs Create coverage monitors and drive coverage to required quality targets Define post-silicon validation plans, and engage in post-silicon activities to accelerate product launch Lead verification activities within a team and guide other engineers to achieve project goals M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Solid understanding of high-performance microprocessor architecture concepts Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM Programming experience in languages common to the industry (e.g., C, C++, Perl, Python) Experience in automating design, verification, and validation tasks Hands on experience in post-silicon validation Knowledge of ARM or x86 architecture and assembly language programming Previous experience in CPU/core design verification is preferred Previous experience in Network-on-chip (NoC) design verification is preferred Previous experience with Arm AMBA (APB/AHB/AXI/ACE/CHI) protocols is preferred Previous experience with formal verification is preferred What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Description Invent the future with us. Recognized by Fast Company’s 2023 100 Best Workplaces for Innovators List, Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team — we’d love to have you apply. Come invent the future with us. About the role: You will work on the verification of a server-class microprocessor-based CPU/Coherent Mesh interconnect. You'll be involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of microprocessors. You'll also partner with other teams to accelerate post-silicon validation and debug of the product. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. What you’ll achieve: Define requirements for block level and subsystem level testing infrastructure Create test plans for unit-level and chip-level verification and post-silicon validation Architect, design and implement test benches and other components of design verification environment Create random test generators to find bugs in design Debug failures and drive speedy resolution of bugs Create coverage monitors and drive coverage to required quality targets Define post-silicon validation plans, and engage in post-silicon activities to accelerate product launch Lead verification activities within a team and guide other engineers to achieve project goals About you: M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Solid understanding of high-performance microprocessor architecture concepts Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM Programming experience in languages common to the industry (e.g., C, C++, Perl, Python) Experience in automating design, verification, and validation tasks Hands on experience in post-silicon validation Knowledge of ARM or x86 architecture and assembly language programming Previous experience in CPU/core design verification is preferred Previous experience in Network-on-chip (NoC) design verification is preferred Previous experience with Arm AMBA (APB/AHB/AXI/ACE/CHI) protocols is preferred Previous experience with formal verification is preferred What we’ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process. #LI-SF1 Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.

Principal DFT Engineer (MBIST) in Pune, MH, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: The ideal candidate will work with multi-functional global teams to design, implement and verify Boundary Scan, ATPG (Stuck-AT/AT-Speed) SCAN, MBIST, IO BIST and JTAG/IJTAG DFT features on our next generation highly complex server class processor products. Will work in close collaboration with test engineering team to deliver ATE patterns and post silicon bring-up and debug. What youll achieve: DFT features like EDT, SSN, shared bus based MBIST insertion, ijtag, simulation and debug on RTL and gates netlist Boundary Scan insertion, simulation and verification Scan insertion, Scan compression, Stuck-At, At-Speed test and coverage analysis Scan ATPG pattern generation, simulation and debug on RTL and gates netlist Hands on knowledge in state-of-the-art EDA tools for DFT, design and verification (Mentor, Cadence, Synopsys) STA DFT Test mode timing constraint development and analysis In-depth knowledge of Verilog HDL and experience with simulators and waveform debugging tools ATE silicon debug and utilize scripting with perl/Tcl for efficient handling of ATE data Bachelors degree & 8 years of related experience or Masters degree & 6 years of related experience Expert with methods and techniques to design, implement and verify regular and shared bus based Memory BIST on repairable and non-repairable memories using Electrical fuses. Expert knowledge and practical work experience partnering with designers to implement highly customized and tools-driven MBIST solutions. Solid understanding of MBIST algorithms needed for 5nm and lower technology nodes and ability to code new algorithms, operation sets supporting tool driven solutions. Experience in implementing EDT, SSN, boundary scan, jtag/ijtag features. Work independently to generate test plans, run simulations and debug failures on RTL and Gate Level Hands on experience in the usage of industry standard tools, like Siemens Tessent Shell flow, or Synopsys SMS/SHS flow Expert understanding tradeoffs to optimize coverage and test time reduction with the ability to foresee physical implementation and timing challenges during early development. Experience in working with physical design teams to support STA constraints, reviewing timing reports. Expert in using silicon debug/diagnosis tools to root cause silicon bringup and production test issue. Experience in setting up and running Scan DRC flows in RTL. Experience with industry standard simulation tools, including Verilog, and scripting languages like Perl, Python, Shell or Tcl. Experience in revision control systems like GIT, perforce etc.. Needs in depth experience in stuck at, transition delay, path delay, etc. coverage loss analysis and identifying solutions to improve test coverage Experience in leading the effort to derive cell aware fault models and develop necessary flows to generate ATPG and to support silicon debug. Good knowledge of functional safety, clock domain crossing analysis, logic synthesis and scan insertion At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Principal DFT Engineer (MBIST) in Bangalore, KA, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: The ideal candidate will work with multi-functional global teams to design, implement and verify Boundary Scan, ATPG (Stuck-AT/AT-Speed) SCAN, MBIST, IO BIST and JTAG/IJTAG DFT features on our next generation highly complex server class processor products. Will work in close collaboration with test engineering team to deliver ATE patterns and post silicon bring-up and debug. What youll achieve: DFT features like EDT, SSN, shared bus based MBIST insertion, ijtag, simulation and debug on RTL and gates netlist Boundary Scan insertion, simulation and verification Scan insertion, Scan compression, Stuck-At, At-Speed test and coverage analysis Scan ATPG pattern generation, simulation and debug on RTL and gates netlist Hands on knowledge in state-of-the-art EDA tools for DFT, design and verification (Mentor, Cadence, Synopsys) STA DFT Test mode timing constraint development and analysis In-depth knowledge of Verilog HDL and experience with simulators and waveform debugging tools ATE silicon debug and utilize scripting with perl/Tcl for efficient handling of ATE data Bachelors degree & 8 years of related experience or Masters degree & 6 years of related experience Expert with methods and techniques to design, implement and verify regular and shared bus based Memory BIST on repairable and non-repairable memories using Electrical fuses. Expert knowledge and practical work experience partnering with designers to implement highly customized and tools-driven MBIST solutions. Solid understanding of MBIST algorithms needed for 5nm and lower technology nodes and ability to code new algorithms, operation sets supporting tool driven solutions. Experience in implementing EDT, SSN, boundary scan, jtag/ijtag features. Work independently to generate test plans, run simulations and debug failures on RTL and Gate Level Hands on experience in the usage of industry standard tools, like Siemens Tessent Shell flow, or Synopsys SMS/SHS flow Expert understanding tradeoffs to optimize coverage and test time reduction with the ability to foresee physical implementation and timing challenges during early development. Experience in working with physical design teams to support STA constraints, reviewing timing reports. Expert in using silicon debug/diagnosis tools to root cause silicon bringup and production test issue. Experience in setting up and running Scan DRC flows in RTL. Experience with industry standard simulation tools, including Verilog, and scripting languages like Perl, Python, Shell or Tcl. Experience in revision control systems like GIT, perforce etc.. Needs in depth experience in stuck at, transition delay, path delay, etc. coverage loss analysis and identifying solutions to improve test coverage Experience in leading the effort to derive cell aware fault models and develop necessary flows to generate ATPG and to support silicon debug. Good knowledge of functional safety, clock domain crossing analysis, logic synthesis and scan insertion At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

You will work on the verification of a server-class microprocessor-based SOC. you'll be involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of microprocessors. you'll also partner with other teams to accelerate post-silicon validation and debug of the product. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The DV Team at Ampere comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tightly-knit, fast-paced team who work extremely closely with our design and architecture partners to ensure no bug is left behind. Define requirements for sub-system level and full-chip level testing infrastructure Create test plans for sub-system and chip-level verification and post-silicon validation Architect, design and implement test benches and other components of design verification environment Create random test generators to find bugs in design Debug failures and drive speedy resolution of bugs Create coverage monitors and drive coverage to required quality targets Define post-silicon validation plans, and engage in post-silicon activities to accelerate product launch Lead verification activities within a team and guide other engineers to achieve project goals M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Hardware verification experience in IPs or SoC on at least 1 product life cycle Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM Programming experience in languages common to the industry (eg, C, C++, Perl, Python) Experience in automating design, verification, and validation tasks Understanding of ARM, RISCV or x86 assembly language programming is a plus Understanding of CPU architecture, coherent fabrics spanning processor cores, memory, caches and die to die interconnects, coherent protocols like ARM s ACE/CHI is a plus Good written and verbal communication skills, excellent attention to detail, strong analytical/problem solving skills. What we'll offer: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as we'll as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day.

JOB DESCRIPTION : Experience in verification of coherent protocols like ARMs ACE/CHI and Network-on-chip (NoC) Experience in ARM or x86 assembly language programming Prior experience in CPU or other IP verification Food allowance Health insurance Annual bonus

floor planning, bump planning, routing, power grid design, clock design, optimization for high-speed digital circuits high-speed digital layouts, DDR and other high-speed interfaces EDA tools for chip-level physical verification (DRC, LVS, ERC) Accessible workspace Food allowance Health insurance Annual bonus Provident fund

CPU Verification Engineer in Bangalore, KA, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: As a CPU Verification Engineer, you will be a key member of the design verification team at Ampere to deliver our high-quality next generation AI integrated, cloud-native server class SoCs. You will be responsible for defining verification strategies and architecting solutions for complex verification problems. You will partner with stakeholders in adjacent domains and enable verification team to left shift bug hunting and meet verification goals on schedule. Youll be involved with all aspects of product development starting with specifications through tape-out and product launch Define strategy and requirements for block level and chip level testing infrastructure Create test plans for unit-level and chip-level verification Design and implement test benches and verification environment Develop random test generators to generate tests and debug failures Code and analyze coverage to meet product quality requirements Define post-si validation plans and debug post-silicon system level failures B.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience, or M.Tech with 2+ years of experience. Understanding of high-performance multi-core processor architecture and microarchitecture Knowledge of ARM or x86 memory architecture and assembly language is advantageous 2+ years of IP design verification experience, especially in CPU or Graphics cores, with previous experience in IP verification, particularly microprocessor core or interconnect/fabric Experience with verification environments using SVTB, UVM, or OVM Proficiency in HDL languages (System Verilog, Verilog, VHDL) and simulation tools Programming skills in C or C++ Ability to automate tasks using Perl, Python, or other scripting languages Experience with Uncore CPU features like Trace / Debug / Interrupts / Performance Monitoring is a plus Strong communication, problem-solving skills, and a verification-focused mindset. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Principal Physical Design Engineer in Pune, MH, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: Ampere Computing is seeking a highly skilled engineer to join our physical design team with a focus on both CPU/GPU physical design and interconnect integration/implementation for CPU and GPU products. This role requires deep expertise in high-speed and power efficient physical design and methodologies with hands-on experience implementing CPU/GPU & interconnect networks to deliver robust, high-performance silicon solutions. You will collaborate closely with Architects, RTL designers, packaging team, and timing, power & DFT teams to ensure robust, high-performance designs that meet stringent timing, power, and area requirements. Interconnect floor planning iterations, partitioning, pin-placement, wire planning, clock distribution network. Working with Architecture, RTL and timing teams for optimal floorplan from system performance point of view. Implement power and clock domain crossing with UPF and timing methodologies. Converge timing on high speed interface with appropriate methods of clock balancing and skewing. Lead and execute physical design tasks for CPU/GPU blocks including floor planning, placement, clock tree synthesis, routing, and optimization. Collaborate with RTL designers and timing engineers to achieve timing closure, power targets, and area goals. Perform physical verification and signoff checks ensuring design compliance with foundry rules and design specifications. Analyze and resolve physical design issues such as congestion, timing violations, and signal integrity challenges. Develop scripts and automation flows to improve design efficiency and quality. Address interconnect-related challenges such as crosstalk, IR drop, electromigration, and noise. Document design methodologies, best practices, and integration guidelines specific to Ampere s CPU/GPU physical design flows. Collaborate and work with cross geo teams in India & Vietnam About you: M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience Experience in high performance/low power physical design, preferably with a focus on CPU and/or GPU architectures. Proven expertise in both CPU / High performance physical design and interconnect integration/implementation. Solid understanding of timing analysis, signal integrity, power integrity, electromigration, and advanced process technologies (7nm, 5nm, or below). Deep understanding of semiconductor device physics, interconnect materials, and advanced process technologies (7nm, 5nm, or below). Strong proficiency with EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Calibre, and parasitic extraction tools (StarRC, Quantus). Experience with scripting languages (Tcl, Python) for automation and tool customization. Excellent problem-solving skills and ability to work effectively in cross-functional teams. Effective communication skills to collaborate with design, verification, and manufacturing teams. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Principal Physical Design Engineer in Bangalore, KA, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: Ampere Computing is seeking a highly skilled engineer to join our physical design team with a focus on both CPU/GPU physical design and interconnect integration/implementation for CPU and GPU products. This role requires deep expertise in high-speed and power efficient physical design and methodologies with hands-on experience implementing CPU/GPU & interconnect networks to deliver robust, high-performance silicon solutions. You will collaborate closely with Architects, RTL designers, packaging team, and timing, power & DFT teams to ensure robust, high-performance designs that meet stringent timing, power, and area requirements. Interconnect floor planning iterations, partitioning, pin-placement, wire planning, clock distribution network. Working with Architecture, RTL and timing teams for optimal floorplan from system performance point of view. Implement power and clock domain crossing with UPF and timing methodologies. Converge timing on high speed interface with appropriate methods of clock balancing and skewing. Lead and execute physical design tasks for CPU/GPU blocks including floor planning, placement, clock tree synthesis, routing, and optimization. Collaborate with RTL designers and timing engineers to achieve timing closure, power targets, and area goals. Perform physical verification and signoff checks ensuring design compliance with foundry rules and design specifications. Analyze and resolve physical design issues such as congestion, timing violations, and signal integrity challenges. Develop scripts and automation flows to improve design efficiency and quality. Address interconnect-related challenges such as crosstalk, IR drop, electromigration, and noise. Document design methodologies, best practices, and integration guidelines specific to Ampere s CPU/GPU physical design flows. Collaborate and work with cross geo teams in India & Vietnam About you: M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience Experience in high performance/low power physical design, preferably with a focus on CPU and/or GPU architectures. Proven expertise in both CPU / High performance physical design and interconnect integration/implementation. Solid understanding of timing analysis, signal integrity, power integrity, electromigration, and advanced process technologies (7nm, 5nm, or below). Deep understanding of semiconductor device physics, interconnect materials, and advanced process technologies (7nm, 5nm, or below). Strong proficiency with EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Calibre, and parasitic extraction tools (StarRC, Quantus). Experience with scripting languages (Tcl, Python) for automation and tool customization. Excellent problem-solving skills and ability to work effectively in cross-functional teams. Effective communication skills to collaborate with design, verification, and manufacturing teams. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Description Invent the future with us. Recognized by Fast Company’s 2023 100 Best Workplaces for Innovators List, Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team — we’d love to have you apply. Come invent the future with us. About the role: As a part of the Emulation Team at Ampere, you will be part of verification of the next generation of microprocessor cores on hardware emulation platform by developing and deploying new capabilities and test content to accelerate bug finding in pre-silicon. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The Emulation Team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tight knit, fast-paced team who work extremely closely with our design and architecture partners to ensure no bug is left behind. What you'll achieve: Your responsibilities may include, but are not limited to, the following: Be part of the emulation verification execution team and be responsible for planning, development, and execution of test content in varied domains including system stress. Work in collaboration with design and architecture teams to root-cause failures using advanced debugging techniques. Develop high quality emulation test plans comprising of BareMetal content and OS based content for flushing even the most corner-case bugs. Create emulation models from RTL to run test content, using industry standard emulation platform technology. Review architecture and microarchitecture specs and influence design/microarchitecture decisions Partner with emulation vendor to debug and quickly resolve blocking issues in the emulation technology as required Verify performance and functionality of GPU/AI hardware , drivers, features ,application and tools. About you: M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Knowledge about AI processor/GPU architecture , Linux systems development and memory consistency models in AArch64 and/or x86 and concurrency. Knowledge about GPU Stress and functional test development. Experience in GPU compute programming or parallel programming. Demonstrated ability to rapidly learn new technologies and apply them effectively. Experience developing bare-metal content using C/C++ and assembly language for verification. ARM assembly expertise preferred. Experience with Linux kernel development, device drivers and user space programming, FW development and debugging Experience in one of the protocols in preferred - Ethernet/USB/SATA/LPDDR/HBM. Experience debugging failures using innovative debug practices and familiarity with tools such as Verdi to debug RTL issues. Working experience with emulation technology of Zebu, Palladium or Mentor Veloce is strongly recommended. What we’ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus, equity, and comprehensive benefits. We offer an annual bonus program tied to internal company goals and annual meritocratic equity awards that enable our employees to participate in the success of the company. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process. Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.

Emulation Verification Engineer in Pune, MH, India Description By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team we d love to have you apply. Come invent the future with us. About the role: As a part of the Emulation Team at Ampere, you will be part of verification of the next generation of microprocessor cores on hardware emulation platform by developing and deploying new capabilities and test content to accelerate bug finding in pre-silicon. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The Emulation Team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tight knit, fast-paced team who work extremely closely with our design and architecture partners to ensure no bug is left behind. What youll achieve: Your responsibilities may include, but are not limited to, the following: Be part of the emulation verification execution team and be responsible for planning, development, and execution of test content in varied domains including system stress. Work in collaboration with design and architecture teams to root-cause failures using advanced debugging techniques. Develop high quality emulation test plans comprising of BareMetal content and OS based content for flushing even the most corner-case bugs. Create emulation models from RTL to run test content, using industry standard emulation platform technology. Review architecture and microarchitecture specs and influence design/microarchitecture decisions Partner with emulation vendor to debug and quickly resolve blocking issues in the emulation technology as required Verify performance and functionality of GPU/AI hardware , drivers, features ,application and tools. About you: M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Knowledge about AI processor/GPU architecture , Linux systems development and memory consistency models in AArch64 and/or x86 and concurrency. Knowledge about GPU Stress and functional test development. Experience in GPU compute programming or parallel programming. Demonstrated ability to rapidly learn new technologies and apply them effectively. Experience developing bare-metal content using C/C++ and assembly language for verification. ARM assembly expertise preferred. Experience with Linux kernel development, device drivers and user space programming, FW development and debugging Experience in one of the protocols in preferred - Ethernet/USB/SATA/LPDDR/HBM. Experience debugging failures using innovative debug practices and familiarity with tools such as Verdi to debug RTL issues. Working experience with emulation technology of Zebu, Palladium or Mentor Veloce is strongly recommended. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Emulation Verification Engineer in Bangalore, KA, India Description By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team we d love to have you apply. Come invent the future with us. About the role: As a part of the Emulation Team at Ampere, you will be part of verification of the next generation of microprocessor cores on hardware emulation platform by developing and deploying new capabilities and test content to accelerate bug finding in pre-silicon. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The Emulation Team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tight knit, fast-paced team who work extremely closely with our design and architecture partners to ensure no bug is left behind. What youll achieve: Your responsibilities may include, but are not limited to, the following: Be part of the emulation verification execution team and be responsible for planning, development, and execution of test content in varied domains including system stress. Work in collaboration with design and architecture teams to root-cause failures using advanced debugging techniques. Develop high quality emulation test plans comprising of BareMetal content and OS based content for flushing even the most corner-case bugs. Create emulation models from RTL to run test content, using industry standard emulation platform technology. Review architecture and microarchitecture specs and influence design/microarchitecture decisions Partner with emulation vendor to debug and quickly resolve blocking issues in the emulation technology as required Verify performance and functionality of GPU/AI hardware , drivers, features ,application and tools. About you: M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Knowledge about AI processor/GPU architecture , Linux systems development and memory consistency models in AArch64 and/or x86 and concurrency. Knowledge about GPU Stress and functional test development. Experience in GPU compute programming or parallel programming. Demonstrated ability to rapidly learn new technologies and apply them effectively. Experience developing bare-metal content using C/C++ and assembly language for verification. ARM assembly expertise preferred. Experience with Linux kernel development, device drivers and user space programming, FW development and debugging Experience in one of the protocols in preferred - Ethernet/USB/SATA/LPDDR/HBM. Experience debugging failures using innovative debug practices and familiarity with tools such as Verdi to debug RTL issues. Working experience with emulation technology of Zebu, Palladium or Mentor Veloce is strongly recommended. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

As a PHY Hardening Engineer at Ampere, you will play a pivotal role in the development of cutting-edge expertise in high-speed digital design. You will collaborate with various teams including architects, RTL designers, packaging and PCB design teams, and post-silicon validation groups to optimize layouts, ensure signal and power integrity, and perform chip-level physical design tasks. Your expertise in managing high-speed signals and advanced packaging techniques will be crucial in delivering reliable designs that meet timing, power, and manufacturability requirements. The ideal candidate for this role is a self-motivated individual with a Bachelor's degree and 8 years of related experience or a Master's degree and 6 years of related experience. You should have a strong background in floor planning, bump planning, routing, power grid design, clock design/distribution, and optimization for high-speed digital circuits. Experience in developing high-speed digital layouts, handling chip assembly, and using EDA tools for chip-level physical verification is essential. Additionally, familiarity with signal and power integrity concepts, advanced packaging technologies, and DFT structures will be advantageous. In return, Ampere offers a comprehensive benefits package including premium medical, dental, and vision insurance, parental benefits, retirement plans, and generous paid time off. You will also enjoy fully catered lunches, healthy snacks, and energizing beverages in the office. At Ampere, we nurture an inclusive culture that encourages personal and professional growth, empowering employees to innovate and contribute to a more sustainable future through industry-leading cloud-native designs. Join us at Ampere and be part of our journey to invent the future of computing.,

As a Principal Physical Design Engineer (CAD) at Ampere, you will be part of a dynamic Processor Design group pioneering the realm of high-performance implementation and physical design. Your role will involve developing and maintaining physical design flows for cutting-edge designs that push the boundaries of technology. Your responsibilities will include collaborating closely with the implementation and physical design team, addressing flow issues through debugging, evaluating the impact of technology changes on area, power, and timing by running test designs, and automating new flow practices to enhance design efficiency. To excel in this role, you should hold an M.Tech in Electronics Engineering or Computer Engineering with a minimum of 6 years of semiconductor experience, or a B.Tech in the same field with at least 8 years of relevant experience. You should have a strong background in physical design CAD flow encompassing synthesis, place & route, and floor planning, and it would be advantageous to have experience in power distribution, static timing analysis, and physical design verification. Your expertise should extend to hierarchical P&R and flow development, with proficiency in floorplanning, power distribution, pad ring construction, placement, clock tree synthesis, and routing. Proficiency in scripting languages like TCL, Perl, and Makefile is crucial, along with a knack for developing intricate algorithms and managing P&R flows effectively. Furthermore, familiarity with chip-finishing aspects such as metal fill, spare cells, DFM rules, and boundary cells for the latest process technologies is desirable. Adept communication skills and problem-solving abilities will be key in your success in this role. At Ampere, we offer a competitive benefits package that includes premium medical, dental, and vision insurance, parental benefits, retirement plans, and generous paid time off to support your well-being and work-life balance. Our inclusive culture encourages employees to innovate, grow, and contribute to sustainable future designs. Join us at Ampere to be a part of a team that is shaping the future of computing and cloud technology. #LI-SF1,