Responsibilities: * Design, implement, and maintain Kubernetes clusters using best practices. * Collaborate with cross-functional teams on CI/CD pipelines and infrastructure provisioning.
Responsibilities: * Design analog mixed signal verification plans. * Develop behavioral models for analog circuits. * Implement testbenches using coding skills. * Execute verification scripts with scripting languages.
Ideal candidate will be 1st line of support for middleware platform,assist in incident monitoring,initial diagnostics,escalation of middleware related issue to L2/L3 team.Need understanding of middleware like - WebLogic,WebSphere,JBoss,Apache Tomcat.
Responsibilities: * Design RTL code using Verilog/System Verilog. * Collaborate with microarchitects on design concepts. * Ensure timing closure and area optimization. * Develop RTL designs for complex systems.
Responsibilities: * Design, implement, and maintain Kubernetes clusters using Docker and Helm. * Ensure platform reliability through CI/CD pipelines with Terraform and Ansible.
Responsibilities: * Collaborate with cross-functional teams on SOC verification * Develop testbenches using System Verilog and Verilog * Ensure compliance with industry standards and customer requirements
Responsibilities: * Design emulations using Zebu software * Collaborate with SOC team on verification * Develop transactor models for testing purposes * Ensure compliance with industry standards