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Capgemini
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Emulation Engineer

Emulation Engineer

Capgemini

5 - 8 years

14 - 20 Lacs

bengaluru

Posted:1 day ago| Platform:

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Skills Required

zebu asic design emulation engineer verilog rtl system verilog emulators rtl design

Work Mode

Hybrid

Job Type

Full Time

Job Description

You Are:

An experienced Emulation Engineer with Zebu experience.

The Work:

Port ASIC and IP RTL code to emulation platforms (Zebu).
Build model from released RTL.
Generate loadable image(s) for target emulation platform.
Run sanity tests to qualify release of the image(s).
Release the emulation models to various teams doing functional validation, firmware development and design verification.
Assist debug of failures with stakeholder by providing instrumented models and captured waveforms extracted from emulation model.
Coordinate with EDA and third-party tools team to validate implementation flows.

Heres what you need:

A minimum 2 years of experience in Emulation (Zebu) using System Verilog/Verilog/VHDL.
A minimum of 2 years of experience with porting ASIC/IP RTL to Emulation platforms: Zebu.
Unix/Linux development environments and scripting languages like TCL, Python, C++, C-shell.
Logic simulation: VCS.
Strong knowledge of Complete Design Cycle to understand the Different IP designs to integrate in the build.
Bachelor’s Degree or equivalent (12 years) work experience (If an, Associate’s Degree with 6 years of work experience).

Bonus points if:

Good knowledge of SoC design methodologies and technologies, with experience in the complete design validation cycle.
Knowledge of key protocol’s like PCIe, USB, Ethernet, AMBA, UART, JTAG, I3C, DDR, flash memories and their usage in SoC environments.
Experience with CPU integration is a big plus, especially ARM/RISC-V CPU.
Knowledge of CoreSight/UltraSoC debug infrastructure integration.
Familiarity with IO's such as MIPI CSI & DSI, USB, PCIE, LPDDR.
SoC experience with bare-metal code.

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Emulation Engineer