987 Vlsi Jobs - Page 26

Long Description 1. ASIC RTL Engineer : RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One scripting languages like Make flow, Perl ,shell, python - Any One LocationBangalore / Hyderabad / Kochi Experience - 7+ - Lead/Architect 2. Emulation Lead JD - Emulation Lead (Zebu/ HAPS /Veloce/Palladium and Module Build (End to End) Location - Bangalore / Hyderabad Experience - 7+ - Lead/Architect 3. Lead Design Verification Engineer : 7+ years of hands-on DV experience in SystemVerilog/UVM. Must be able to own and drive the verification of a block / s...

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify designs or repair eq...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role & responsibilities : Developing and maintaining relationships with companies and organizations to secure placement opportunities for students. Assisting students in identifying suitable placement options based on their academic background, career goals, and interests. Coordinating the placement process, including matching students with appropriate placements, arranging interviews, and facilitating the selection process. Providing guidance and support to students throughout their placement experience, including orientation, training, and ongoing communication. Monitoring students' progress during the placement period and addressing any issues or concerns that may arise. Collaborating wit...

Domain : Semiconductor | VLSI | Chip Design Must-Have Skills: Floor Planning Hands-on experience with Innovus Familiarity with Fusion Compiler Good to Have: Scripting knowledge in Tcl/Tk/Perl Understanding of Physical Design Methodologies Experience working with submicron nodes (28nm and below) Location : Bangalore | Hyderabad | Cochin | Pune

Qualification : Bachelors in Computer Science / Electronics / Electrical Engineering Key Responsibilities: Collaborate with ASIC design teams to ensure DFT rules and coverage are metGenerate high-quality ATPG patterns for SAF/TDF using on-chip test compression Work on MBIST verification and repair using tools like Mentor Run ATPG & MBIST verification using unit delay and min/max corner simulations Deliver manufacturing test patterns for ATE in collaboration with product/test teamsSupport post-silicon debug and issue resolution Develop diagnostic tools for ATPG, MBIST, and ATE bring-upEnhance and maintain scripting for DFT flows Preferred Experience & Skills:Hands-on experience with Full Chip...

Job Title: Principal Engineer, Quality Global Process Owner (GPO) for Technology Review Board (TRB) Summary of Role We are looking for a Global Process Owner (GPO) for TRB to join our team as part of the global QMS (Quality Management System). The successful candidate will be responsible to strategize, develop, implement, monitor, and improve Technology Development & Process Transfer related business process across the organization. This position is based at our GlobalFoundries office at Bengaluru, India. Responsibilities include: Own and manage TRB (Technology Review Board) business processes across the company Work with the technical leads, stakeholders and subject matter experts (SMEs) to...

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Company: Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, an...

Job Area: Engineering Services Group, Engineering Services Group > Layout Engineer General Summary: Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues. Minimum Qualificati...

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Are you ready to combine the fast-paced energy of an innovative startup with the resources and stability of a global tech leaderThis opportunity blends both worlds into one. Edge Impulse has joined forces with the Industrial Embedded IoT division of Qualcomm, and we are growing our team because Edge AI is an important part of Qualcomm’s diversification roadmap. Edge Impulse streamlines the creation of AI and machine learning models for edge hardware, allowing devices to make decisions and offer insight where data is gathered. Powerful automations make it easier to build valuable datasets and develop advanc...

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Minimum Qualifications: Bache...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking VLSI Digital Design Engineers to lead IP development for the latest WiFi standards. Our WLAN PHY team, comprised of highly passionate and seasoned domain experts, prides itself on years of experience in taking WLAN PHY designs from concept to silicon independently. WLAN PHY team is responsible for delivering the end-to-end Tx/Rx DSP chains – all the way from antenna samples post ADC to raw bits for upper layers and on the reverse path from raw bits to DAC. The team specializes in working with challenges of practical high-speed wireless communication ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Excellent Design verification domain expertise. Develop test strategy, TB architecture and test plan for new IP’s/new features Develop strategies for re-useable, scalable and enhance Sub system level verification environment Excellent C/System Verilog/Verilog skills to handle C based TB environment Strong skills in debug, post silicon debug-failure re-creation and root cause analysis Scripting proficiency - PERL, Python, for developing applicable automation AMBA, AXI bus protocols Power intent verification, GLS etc. Capable of communicating effectively with all stakeholders across the globe Capable of seed...

Job Title: Principal Engineer, Quality Global Process Owner (GPO) for Technology Review Board (TRB) Summary of Role We are looking for a Global Process Owner (GPO) for TRB to join our team as part of the global QMS (Quality Management System). The successful candidate will be responsible to strategize, develop, implement, monitor, and improve Technology Development & Process Transfer related business process across the organization. This position is based at our GlobalFoundries office at Bengaluru, India. Responsibilities include: Own and manage TRB (Technology Review Board) business processes across the company Work with the technical leads, stakeholders and subject matter experts (SMEs) to...

We Are Hiring: Principal Engineers Chip Design (Back End / Front End / Analog IP/IC) Preferred Skills and Experience: Minimum 1+ years of experience in Project Management (Waterfall and Agile Hybrid methodology) Exposure to continuous improvement and cross-functional collaboration Educational Qualifications: Master's degree in VLSI Design from reputed institutes (IITs/NITs preferred) Bachelor's in Electronics and Communication or a related field 1. Job Title: Principal Engineer – Chip Design Back End Required Skills & Experience: Minimum 8+ years of strong experience in backend flows for MCU or low-power SoC designs Leadership experience with DFT, Physical Design, and Formal Verification tea...

In your new role you will: Responsible for SoC DFT Architecture definition / implementation / verification / silicon debug of SoC/Full Chip. Need to implement Scan insertion, LPCT, LBIST, Hybrid-TK, Compression Logic and DRC analysis of implemented Testability logic structures. Responsible for ATPG, DRC analysis, Test coverage debug , Memory BIST implementation and verification. Owner ship of JTAG/BSCAN/iJTAG, P1500 implementation and verification, Stuck-at / TDF / Bridging / Cell-aware / iddq fault models. Good debug skills in ZERO delay and SDF based scan/MBIST/JTAG simulations. Hands on experience in analysis and debug of above-mentioned test domains. Hands of experience in post silicon d...

Experience Required: Minimum 20 Years Educational Background: Engineering (Not pure sciences); One degree from an international university preferred Role Summary: We are seeking a visionary and experienced academic leader to serve as Dean School of Engineering & Sciences (SES). The ideal candidate will have extensive academic and administrative experience within a university ecosystem and a strong specialization in cutting-edge domains such as Robotics or VLSI (Very Large-Scale Integration). The Dean will be responsible for shaping academic policy, leading the faculty, enhancing research outputs, and elevating the schools national and global reputation. Key Responsibilities: Academic Leaders...

Job Title: Embedded & VLSI Recruiter Location: Marathahalli, Bangalore (Work From Office 5 Days a Week) Experience: Minimum 3 Years Job Type: Full-Time | On-Site | Immediate Joiners Interview Mode: Face-to-Face (F2F) Job Description: We are looking for a passionate and experienced Embedded & VLSI Recruiter to join our dynamic talent acquisition team. The ideal candidate will have a strong background in hiring for niche technologies in Embedded Systems and VLSI domains, especially through Contract-to-Hire (C2H) models for product-based clients. Roles and Responsibilities: Handle end-to-end recruitment for Embedded Systems and VLSI requirements Manage Contract-to-Hire (C2H) hiring with precisi...

Physical Deisgn Lea LocationBangalore / Hyderabad / Pune Experience - 8+ YoE In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Should have experienceon Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. Should have experience on programming in Tcl/Tk/Perl. Must have hands-on experience on Synopsys/Cadence tools. (Innovus, ICC2, Primetime, PT-PX, Calibre). Well versed with timing constraints, STA and timing closure. Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes....

Responsibilities: * Collaborate with cross-functional teams on ARM processor integration. * Design, verify & debug VLSI systems using SV, UVM & GLS. * Implement IP/Sub-System/SOC architecture with APB, AXI & AHB protocols. Health insurance Provident fund

Summary / Role Purpose As a Product Specialist II , you will be part of the team responsible for overall development and validation of Ansys EDA Products. This involves working with Software developers, Architects, Application Engineers, and Semiconductor Customers, from ideation all the way to final product release and deployment. Key focus areas will include all areas related to IP/SoC/3DIC Power Integrity, Signal Integrity, Reliability aspects like EM/ESD/Thermal, Advanced timing/jitter, Packaging - the top challenges for any chip design on advanced nodes like 7/5/3 nm. Key Duties and Responsibilities Be part of Product Engineering Team that Works with Global-Customers / IP-providers / Fo...

Job Description. Arm’s CE-Systems DFT team implements DFT for test chips and hard macros to prove out Arm soft IP power, performance, area, and functionality within the context of an SoC using the latest DFT and process technologies. The DFT team works closely with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE.. Responsibilities. Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate a...

Requisition #: 16978 Our Mission: Powering Innovation That Drives Human Advancement When visionary companies need to know how their world-changing ideas will perform, they close the gap between design and reality with Ansys simulation. For more than 50 years, Ansys software has enabled innovators across industries to push boundaries by using the predictive power of simulation. From sustainable transportation to advanced semiconductors, from satellite systems to life-saving medical devices, the next great leaps in human advancement will be powered by Ansys. Innovate With Ansys, Power Your Career. Summary / Role Purpose As a Product Specialist II , you will be part of the team responsible for ...

Minimum qualifications:. Bachelor’s degree in Electrical Engineering or Computer Engineering, or equivalent practical experience.. 15 years of experience in ASIC RTL design.. Experience with RTL design using Verilog/System Verilog and microarchitecture.. Experience with ARM-based SoCs, interconnects and ASIC methodology.. Preferred qualifications:. Master’s degree in Electrical Engineering or Computer Engineering.. Experience driving multi-generational roadmap for IP development.. Experience leading interconnect IP design team for low power SoCs.. About The Job. Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer ...