2444 Tcl Jobs - Page 8

About The Role Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications. 1. Applies scientific methods to analyse and solve software engineering problems. 2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance. 3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers. 4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer s...

About The Role : To work independently on block/IP levels analog layout design from schematic. Estimating the Area, Optimizing Floorplan, Routing and Verifications. Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 5,7,10, 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence Virtuoso Editor & Calibre RVE Good interpersonal skills and critical thinking abilities to resolve the issue technically, and professionally. Key Responsibilities: Independently execute block/IP-level analog layout from schematics, including area estimation, floorplan optimizat...

remote typeOn-site locationsHyderabad, TS time typeFull time posted onPosted 5 Days Ago job requisition idREQ414712 What this job involves: Redefining user support Our customerour priority will be your tagline. Leading the Facilitiesoperations team, you will lend your expertise in analysing data, crafting infographic reports that present trends, and identifying areas for improvement. Youll also keep an eye out for fresh, innovative ideas, enhance connection with client associates, and extend insights to the FM Operations team. That said, youll come up with new ways to work with technology upgrades in the applications, and share these with the tech team for implementation. Being a core part o...

About The Role Project Role : Software Development Lead Project Role Description : Develop and configure software systems either end-to-end or for a specific stage of product lifecycle. Apply knowledge of technologies, applications, methodologies, processes and tools to support a client, project or entity. Must have skills : Dassault Systemes ENOVIA V5 Good to have skills : Dassault Systemes 3DEXPERIENCE ENOVIA Customization Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Lead, you will engage in the development and configuration of software systems, either managing the entire process or focusing on speci...

Deliverable Role/Responsibilities Ensure that all the service deliveries are carried out as per the terms and conditions agreed upon with the client. Stay in close communication with the client for all issues regarding services, new initiatives and hygiene and prepare documents of the same. Ensure smooth operation across all cities. Follow up on client meetings and requirements with applicable correspondence, reports, and proposals as necessary. Understand and exceed the expectations of the client to ensure complete satisfaction. Timely addressal of all issues with pertaining to the client and the operations Apprise the management of any serious reversal or threat to the operations on time. ...

Reporting To Associate Director IFM Number of Subordinates Positions Goal To manage the F&B services at Pan India level. Deliverable Role/Responsibilities Ensure that all the service deliveries are carried out as per the terms and conditions agreed upon with the client. Stay in close communication with the client for all issues regarding services, new initiatives and hygiene and prepare documents of the same. Ensure smooth operation across all cities. Follow up on client meetings and requirements with applicable correspondence, reports, and proposals as necessary. Understand and exceed the expectations of the client to ensure complete satisfaction. Timely addressal of all issues with pertain...

Reporting To Associate Director IFM Number of Subordinates Positions Goal To manage the F&B services at Pan India level. Deliverable Role/Responsibilities Ensure that all the service deliveries are carried out as per the terms and conditions agreed upon with the client. Stay in close communication with the client for all issues regarding services, new initiatives and hygiene and prepare documents of the same. Ensure smooth operation across all cities. Follow up on client meetings and requirements with applicable correspondence, reports, and proposals as necessary. Understand and exceed the expectations of the client to ensure complete satisfaction. Timely addressal of all issues with pertain...

Candidate should be graduate B.E. / BCA / MCA or equivalent with good academic record of accomplishment. Experience – 2-6 Years Location – Gurgaon Role Description Understand & analyze design & development requirement Develop & customize to meet customer requirement Follow application development lifecycle Collaborate with team and customer representatives Support customer on need basis Skills Well-versed with 3DX Enovia platform architecture Good knowledge & hands on understanding on ENOVIA Customization & development Good understanding on ENOVIA and Centrals Solid foundation with Design Patterns, Java, OOPs Concepts, JavaScript, Ajax, Web Service Good understanding on MQL, TCL, Spinner Goo...

Who You'll Work With You will be in the Silicon One development organization as an ASIC DFT Engineer in Bangalore India with a primary focus on Design-for-Test. You will work with DFT Lead, Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do Responsible for implementing the Hardware Design-for...

ASIC Design Verification Engineer - ( SystemVerilog, UVM test bench, C/C++ , Perl/Python scripting, (VCS, DVE, Verdi), TCL/Shell scripting) | 10+ years Meet the Team Join our dynamic front-end design team at Cisco Silicon One, where innovation meets innovative technology! As part of the heart of silicon development at Cisco, you'll engage in every facet of chip design, from architecture to validation, using the latest silicon technologies to create groundbreaking devices. Cisco Silicon One is the only unified silicon architecture that empowers customers to deploy top-tier silicon across diverse applications, from top-of-rack switches to expansive data centres. Be a part of shaping Cisco's pr...

Job Requirements Job Title: Senior Engineer - DFT Job Type: Full-Time We are seeking a Senior Engineer with 2-4 years of experience in MBIST and SCAN, scripting for DFT in the VLSI industry. The ideal candidate will have a strong background in designing and implementing Design for Testability (DFT) solutions, including Memory Built-In Self-Test (MBIST) and Scan Insertion. Key Responsibilities: Develop and implement DFT methodologies for VLSI designs Create and execute scripts for DFT tasks Collaborate with cross-functional teams to ensure successful DFT implementation Analyze and debug DFT issues to ensure high-quality test coverage Stay current on industry trends and advancements in DFT tec...

Job Requirements Job Title: Lead Engineer - DFT We are seeking a highly skilled Lead Engineer with expertise in Design for Test (DFT) to join our team. The ideal candidate will have a strong background in MBIST, SCAN ATPG, and Boundary scan, with hands-on experience in insertion and verification. Proficiency in scripting languages such as Perl and TCL is essential for this role. Key Responsibilities: Develop and implement DFT strategies for complex integrated circuits Collaborate with design and verification teams to ensure DFT requirements are met Conduct MBIST, SCAN ATPG, and Boundary scan testing to ensure high-quality designs Utilize scripting skills to automate testing processes and imp...

Job Requirements We are seeking a highly motivated Trainee Engineer to join our esteemed VLSI Design for Test (DFT) team. The selected candidate will actively participate in design-for-test methodology, with a specific focus on MBIST and scripting for automation. Key Responsibilities: Provide support to the DFT team in the implementation and verification of test structures. Engage in MBIST (Memory Built-In Self Test) design, integration, and validation. Create and maintain automation scripts (TCL/Perl/Python) for design and test flows. Assist in the identification and resolution of DFT-related issues. Collaborate closely with design and verification teams to ensure the delivery of high-quali...

Job Requirements Job Title: Lead Engineer - Physical Design (PD) Job Type: Full-Time We are seeking a highly skilled and experienced Physical Design Lead in VLSI with a minimum of 9 years of experience to join our team. As the Lead Engineer in Physical Design, you will be responsible for overseeing the physical design process, ensuring the successful implementation of complex VLSI designs. esponsibilities: Lead the physical design (PD) team through complete ASIC/SoC implementation flow. Handle floorplanning, partitioning, placement, CTS (Clock Tree Synthesis), routing, and sign-off activities.Drive timing closure, power optimization, area optimization, and DRC/LVS clean designs.Collaborate w...

Agnisys is looking for freshers to join our team to work on high tech products for the Semiconductor industry. Agnisys is a leader in automating SoC development. It’s products are considered to be the most comprehensive and best in class. We offer a progressive, innovations-driven, learning environment. Don’t get pigeon-holed into one specific area when you can learn the intricacies of Design, Verification, Firmware and overall chip design all at one company! Not only that, you will be exposed to Product Validation, Customer Support and an Agile development environment. Agnisys focuses on research and development by participating in Accellera Systems Initiative, presenting in worldwide confe...

Job Requirements PD Trainee Engineer Role Summary: We are looking for enthusiastic entry-level engineers to join our VLSI Physical Design (PD) team. As a trainee, you will learn and contribute to various stages of the chip design flow under the guidance of Lead engineers. Key Responsibilities: Assist in physical design activities such as floor planning, placement, clock tree synthesis, routing, and timing closure. Work with senior engineers to run EDA tools for design implementation and verification. Support design checks for power, performance, and area (PPA). Learn industry-standard flows for DRC, LVS, and STA. Document processes and contribute to knowledge sharing within the team. Work Ex...

eInfochips (An Arrow Company) Hiring Physical Design Engineer Experience - 3+ Years Location- Ahmedabad <<✍Share resume at 📩medha.gaur@einfochips.com>> Job description is as below: * Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII, * Block level Physical Signoff, * Block level Timing Signoff and ECO generation. * Block level Power signoff. * Good skill on Automation (Perl/Tcl/Awk/Python) * Able to provide technical guidance to Junior Engineer and lead 4-6 engineers. * Must have led small project team. * Good in communication skill as he/she would be single point of contact for client. * NO WORK FROM HOME.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

PHYSICAL DESIGN ENGINEER / LEAD - AHMEDABAD (NO WORK FROM HOME OR REMOTE WORK) Job description: 4 to 12 Years of Hands on Experience Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII, Block level Physical Signoff, Block level Timing Signoff and ECO generation. Block level Power signoff. Good skill on Automation (Perl/Tcl/Awk/Python) Lead should be able to provide technical guidance to Junior Engineer and lead 4-6 engineers. Must have led small project team. Good in communication skill as he/she would be single point of contact for client. NO WORK FROM HOME.

Company Description Pronesis partners with leading technology companies globally to offer world-class solutions. The company specializes in a variety of engineering services including ASIC/VLSI design, embedded product development, and product engineering. Whether it’s SoC verification, hardware design and testing, or product support, Pronesis ensures top-tier service in every domain. What You’ll Be Doing: Lead block/chip level Physical Design (PD) activities , including floor planning, abstract view generation, RC extraction, PNR, STA, EM/IR drop, DRCs, and schematic-to-layout verification. Collaborate with RTL/design teams to solve complex design challenges and optimize PPA . Debug tool/de...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do th...

Job Information Job Opening ID ZR_174_JOB Industry Semiconductor Date Opened 09/10/2025 Job Type Full time Work Experience 8+ Years City Bangalore State/Province Karnataka Country India Zip/Postal Code 560078 Job Description Summary: Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up. Responsibilities: Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems. Own design bring-up, block/subsystem integration, and close on timing, power, and area with synthesis and PnR teams. Drive design reviews, close bugs, and support silicon validation and...

Job Information Job Opening ID ZR_175_JOB Industry Semiconductor Date Opened 09/10/2025 Job Type Full time Work Experience 8+ Years City Bangalore State/Province Karnataka Country India Zip/Postal Code 560078 Job Description Summary: Lead hands-on verification of complex SoC or large subsystems using UVM/SystemVerilog, owning plan-to-close execution through tapeout and silicon correlation. Responsibilities: Author verification plans from specs and micro-architecture; build reusable UVM environments from scratch at subsystem or SoC level. Develop constrained-random and directed tests, scoreboards, checkers, coverage models, and assertions (SVA). Drive coverage closure (functional, code, asser...

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff include formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product arch...

As an FPGA Lead at our company, you will be responsible for designing, simulating, and implementing digital logic circuits on FPGAs using VHDL or Verilog. You will collaborate with hardware and software teams to integrate FPGA designs into larger systems, develop testbenches, and perform functional simulations to verify FPGA designs. Additionally, you will be involved in synthesis, place and route, and timing analysis using industry-standard FPGA toolchains such as Xilinx Vivado and Intel Quartus. Your role will also include debugging and validating FPGA designs on target hardware using oscilloscopes, logic analyzers, and in-system debugging tools. You will optimize FPGA designs for performa...