1570 Tcl Jobs - Page 8

Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You’ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys' products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You’ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Hi All, Greetings' from Eximietas Design....! We are Hiring RTL Micro Architect Engineers/Leads ...! Job Title: RTL Micro Architect Experience: 8+ years Location: Bangalore & Visakhapatnam Job Description: Eximietas Design is seeking an experienced and highly skilled RTL Micro Architect to join our growing team. As a key contributor, you will play a critical role in defining and implementing the microarchitecture of cutting-edge semiconductor designs. You will work on complex RTL design challenges, collaborate with cross-functional teams, and contribute to the delivery of high-performance, power-efficient, and innovative solutions. Key Responsibilities: Define and develop microarchitecture specifications for complex SoC designs. Lead RTL design and implementation using Verilog/SystemVerilog, ensuring optimal performance, power, and area (PPA). Collaborate with system architects, verification teams, and physical design teams to ensure successful project execution. Perform design trade-off analysis to meet functional, performance, and power requirements. Develop and implement design methodologies to improve efficiency and quality. Mentor and guide junior engineers, fostering a culture of innovation and excellence. Participate in design reviews, provide technical leadership, and ensure adherence to project timelines. Qualifications: 8+ years of hands-on experience in RTL design and microarchitecture development. Strong expertise in RTL design using Verilog/SystemVerilog and logic synthesis . Proficiency in microarchitecture design for complex SoCs, including pipelining, caching, and memory subsystems . Experience with low-power design techniques (e.g., clock gating, power gating, multi-Vt optimization). Familiarity with advanced process nodes and their specific challenges (e.g., finFET, multi-patterning). Strong scripting skills in Tcl, Python, or Perl for automation and flow development. Excellent problem-solving skills and attention to detail. Strong communication and leadership skills. What We Offer: Opportunity to work on cutting-edge semiconductor designs and innovative technologies. Collaborative and inclusive work environment. Competitive compensation and benefits package. Professional growth and development opportunities. Interested Engineers please share your updated resume : maruthiprasad.e@eximietas.design

Eximietas Hiring: ASIC SOC RTL Micro Architect Experience: 8+ years Location: Visakhapatnam Job Description: Eximietas Design is seeking an experienced and highly skilled RTL Micro Architect to join our growing team. As a key contributor, you will play a critical role in defining and implementing the microarchitecture of cutting-edge semiconductor designs. You will work on complex RTL design challenges, collaborate with cross-functional teams, and contribute to the delivery of high-performance, power-efficient, and innovative solutions. Key Responsibilities: Define and develop microarchitecture specifications for complex SoC designs. Lead RTL design and implementation using Verilog/System Verilog, ensuring optimal performance, power, and area (PPA). Collaborate with system architects, verification teams, and physical design teams to ensure successful project execution. Perform design trade-off analysis to meet functional, performance, and power requirements. Develop and implement design methodologies to improve efficiency and quality. Mentor and guide junior engineers, fostering a culture of innovation and excellence. Participate in design reviews, provide technical leadership, and ensure adherence to project timelines. Qualifications: 5+ years of hands-on experience in RTL design and microarchitecture development. Strong expertise in RTL design using Verilog/System Verilog and logic synthesis . Proficiency in microarchitecture design for complex SoCs, including pipelining, caching, and memory subsystems . Experience with low-power design techniques (e.g., clock gating, power gating, multi-Vt optimization). Familiarity with advanced process nodes and their specific challenges (e.g., finFET, multi-patterning). Strong scripting skills in Tcl, Python, or Perl for automation and flow development. Excellent problem-solving skills and attention to detail. Strong communication and leadership skills. What We Offer: Opportunity to work on cutting-edge semiconductor designs and innovative technologies. Collaborative and inclusive work environment. Competitive compensation and benefits package. Professional growth and development opportunities. Interested Engineers please share your updated resume: maruthiprasad.e@eximietas.design

Qualcomm India Private Limited is seeking a Hardware Engineer to join their Engineering Group, specifically focusing on Hardware Engineering. As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems including circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to contribute to the development of cutting-edge, world-class products. Collaboration with cross-functional teams to meet performance requirements is a key aspect of this role. Key responsibilities for this position include: - IR Signoff CPU/high performance cores - Signal EM & Power EM Signoff for Chip TOP level & Block level CPU/DSP and other HMs - Development of PG Grid spec for different HM - Validating the PG Grid using Grid Resistance & Secondary PG Resistance Checks - Validating the IR Drops using Static IR, Dynamic IR Vless & VCD Checks for validating Die & Pkg Components of IR Drops - Working with SOC and Packaging Teams on Bumps Assignments / RDL Enablement / Pkg Routing Optimizations to improve overall PDN Design - Good knowledge on PD would is desirable - Proficiency in Python, Perl, TCL The ideal candidate should possess the following qualifications and skills: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field - 4+ years of experience in PDN engineering with EMIR and PG planning expertise - Hands-on experience in PDN Signoff using Redhawk/RHSC/Voltus at block level/SOC Level - Good understanding of Power Integrity Signoff Checks - Proficiency in scripting languages (Tcl and Perl) - Familiarity with Innovus for RDL/Bump Planning/PG eco - Ability to effectively communicate with global cross-functional teams - Experience with tools such as Redhawk, Redhawk_SC, Innovus/Fusion Compiler, Power Planning/Floorplanning, and Physical Verification Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please contact disability-accommodations@qualcomm.com or Qualcomm's toll-free number. It is essential for Qualcomm employees to adhere to all applicable policies and procedures, including confidentiality requirements. Staffing and recruiting agencies are advised not to use Qualcomm's Careers Site for submissions, as unsolicited applications will not be considered. For more information about this role, please reach out to Qualcomm Careers directly.,

You are a Physical Design Engineer with 2-5 years of hands-on experience in different PnR steps including Floor planning, Power planning, Placement & Optimization, CTS, Routing, Static timing analysis, Post route optimization, ECO implementation, and DRC closure. You should be well versed with high frequency design & advanced tech node implementation, in-depth understanding of PG-Grid optimization, custom clock tree design, and tackling high placement density/congestion bottlenecks. Your expertise should include identifying high vs low current density paths, layer/via optimization, and Adaptive PDN experience. You must have knowledge of custom clock tree designs such as H-tree, SPINE, Multi-point CTS, Clock metrics optimization through tuning of CTS implementation. Familiarity with PnR tool knobs/recipes for PPA optimization is essential. Experience in automation using Perl/Python and tcl is required. Good communication skills are necessary as you will be working in a cross-site cross-functional team environment. The ideal candidate will have a BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or an equivalent field with a minimum of 3 years of relevant experience. This is a great opportunity to be part of a fast-paced team responsible for delivering high-performance designs for high performance SoCs in sub-10nm process for the mobile space.,

As a Silicon Design Engineer 2 at AMD, you play a crucial role in shaping the next generation of AMD products, including CPUs, GPUs, and adaptive compute engines. Your responsibilities include interfacing with large, globally distributed design teams to support complex and collaborative development efforts. You will drive automation of Synthesis, Place and Route, Logic Eqv, and Functional ECO methodologies targeting advanced technology nodes. Additionally, you will be responsible for developing and automating Synthesize, PnR, and Functional ECO for various designs at advanced technology nodes and scripting out utilities to automate different components of the implementation flow. Your role will involve collaborating closely with EDA vendors to identify innovative solutions, resolve tool/methodology issues, and enhance flow capabilities. You will contribute to the evolution of AMD's design infrastructure by improving automation, performance, and methodology robustness. Hands-on experience in Front-End Synthesis, Logical Eqv, and Conformal ECO flows is essential, along with proficiency in industry-standard tools such as DC, Fusion Compiler, FM, VCLP, ICC2, Innovus, and Conformal. Experience in PnR, STA, Formal Verification, or RTL coding domains is a plus. An automation mindset and expertise in CAD flow and methodology development on advanced process nodes are preferred. To qualify for this role, you should hold a Master's degree in Electronics Engineering and possess 3-6 years of experience in CAD flow and methodology development on advanced nodes. Proficiency in scripting languages like Python, Tcl, Perl, sed/awk is required. Strong problem-solving skills, analytical thinking, and excellent communication skills are essential. As a team player with a good work ethic, you will thrive in a collaborative environment. This position is based in Hyderabad. If you are looking to be part of a team that pushes the limits of innovation to solve the world's most important challenges, AMD could be the perfect place for you to advance your career in silicon design engineering.,

As a VLSI Design Engineer at Kinara, you will be part of a dynamic team focused on edge AI technology, pushing the boundaries of what's achievable in machine learning and artificial intelligence. You will contribute to the development of state-of-the-art AI processors and high-speed interconnects, ensuring unmatched performance, power efficiency, and scalability to meet the demands of modern AI applications. Your role will involve working on cutting-edge semiconductor projects, requiring a blend of technical expertise, problem-solving skills, and collaborative teamwork. Your responsibilities will include defining micro-architecture and creating detailed design specifications, developing RTL code based on system-level requirements using Verilog, VHDL, or SystemVerilog, implementing complex digital functions and algorithms in RTL, and executing comprehensive test plans to verify RTL designs. You will optimize designs for power, performance, and area constraints, conduct simulation and debugging activities to ensure design accuracy, collaborate with verification engineers to develop test benches and validate RTL against specifications, and apply your strong understanding of digital design principles and concepts. To excel in this role, you should possess proficiency in writing and debugging RTL code, experience with synthesis, static timing analysis, and linting tools, familiarity with scripting languages like Python, Perl, or TCL for automation, and expertise in processor subsystem design, interconnect design, or high-speed IO interface design. A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, along with 5+ years of experience in RTL design and verification, is required. Proven experience in digital logic design using Verilog, VHDL, or SystemVerilog, familiarity with simulation tools such as VCS, QuestaSim, or similar, and hands-on experience with RTL design tools like Synopsys Design Compiler and Cadence Genus is preferred. At Kinara, we offer an innovative environment where technology experts and mentors collaborate to tackle exciting challenges. We believe in sharing responsibilities and valuing diverse viewpoints. If you are passionate about making a difference in the field of edge AI technology, we invite you to join our team and contribute to creating a smarter, safer, and more enjoyable world. Your application is eagerly awaited as we look forward to reviewing your qualifications and experiences. Make your mark with us at Kinara!,

We are seeking a hands-on validation engineer who can convert real customer use cases into executable test plans (manual & automated), drive continuous product improvement, and collaborate closely with cross-functional global teams. In this role, you will work closely with partners and end customers to capture detailed requirements and exact use cases. Your responsibilities will include translating this information into end-to-end validation test scenarios and test plans, both manual and automated. You will execute these test plans, create fault reports, and push for proper fixes. Furthermore, you will play a key role in driving product improvements by leveraging your in-depth technical knowledge to enhance and refine technical customer documentation and collaterals for our partners. Collaboration with R&D, PLM, and other functional teams to align validation activities with product goals is also a crucial aspect of this position. Additionally, you will have the opportunity to learn and apply advanced tools and protocols such as PON, L2 switching, QoS, as well as validation tools like Spirent/Ixia. Key Skills And Experience You should possess a Graduate or Masters degree in engineering with at least 4 years of experience in programming using automation/scripting languages such as Python, Robot, Tcl, or Perl. Exposure to the Robot framework is preferred. Experience in testing NMS/EMS products and Cloud-based solutions is essential. Previous work with traffic tools like Spirent, Ixia, or Router tester for end-to-end traffic testing is highly beneficial. Desired qualifications include an understanding of PON technology, solid knowledge of L2 switching architecture, and familiarity with protocols in the domain of Ethernet, VLAN handling, MAC handling, ARP, DHCP, IGMP, 802.1x, QoS, LLDP-MED, and PoE. About Us Nokia is dedicated to innovation and technology leadership in mobile, fixed, and cloud networks. Working with us will allow you to make a positive impact on people's lives and contribute to building capabilities for a more productive, sustainable, and inclusive world. Our inclusive way of working encourages new ideas, risk-taking, and authenticity in the workplace. What We Offer At Nokia, you will have access to continuous learning opportunities, well-being programs to support your mental and physical health, employee resource groups, mentoring programs, and diverse teams with an inclusive culture that fosters empowerment. We are committed to inclusion and are an equal opportunity employer. Nokia has been recognized for its dedication to inclusion and equality as: - One of the World's Most Ethical Companies by Ethisphere - Gender-Equality Index by Bloomberg - Workplace Pride Global Benchmark Join our team and be part of a company where inclusion and empowerment are key to success. About The Team Nokia's Network Infrastructure group plays a crucial role in bringing more and faster network capacity to people worldwide. With our ambition, innovation, and technical expertise, we are at the forefront of a revolution in telecoms networks that has been underscored by the importance highlighted during the pandemic.,

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. As a new graduated Silicon Validation Engineer, you are a dedicated and innovative professional with a passion for advancing technology. You have a strong background in electronics engineering and a keen eye for detail. You thrive in collaborative environments, working seamlessly with R&D teams to drive the success of cutting-edge projects. Your problem-solving skills are exceptional, and you are adept at troubleshooting complex systems and equipment. With a commitment to continuous learning, you stay updated with the latest industry trends and technologies. You are proactive, self-motivated, and ready to take on new challenges in a dynamic and fast-paced environment. Developing test strategies for validation of silicon devices in conjunction with R&D engineering teams. Writing and implementing test programs for National Instruments LabVIEW-based equipment. Performing hands-on testing of devices using National Instruments LabVIEW-based equipment in the Plymouth lab facility. Designing and verifying SystemVerilog RTL targeting FPGA implementations. Creating schematics for test boards and fixtures. Recording and analyzing product test results and equipment logs. Ensuring the reliability and performance of Synopsys PVT Sensors across various applications. Contributing to the development of cutting-edge on-chip sensor products targeting the latest technology processes. Enhancing product quality through meticulous validation and testing procedures. Collaborating with a skilled team of engineers to drive innovation and technological advancements. Providing critical insights through data analysis to inform product improvements. Supporting the optimization of performance, power, and other requirements for a diverse range of applications. University degree/masters or similar, either in Electronics Engineering or related field. Some background of FPGA design using HDL would be beneficial, i.e. SystemVerilog. Basic understanding of the design of digital and analogue circuits for device validation and testing. Elementary understanding of component level device test methods. Some experience of PCB schematic capture using suitable CAD software. A familiarity with programming and scripting skills in one or more of VB script, python, tcl & bash. Ability to do basic statistical and data analysis for silicon devices and test results. You are an analytical thinker with excellent problem-solving abilities. You have strong communication skills and work effectively within a team. Your attention to detail ensures high-quality results, and you are driven by a commitment to continuous improvement. You are adaptable, proactive, and capable of managing multiple tasks efficiently. You will join a dynamic R&D team focused on the development of Synopsys PVT Sensors. This team is comprised of skilled engineers dedicated to pushing the boundaries of technology and delivering innovative solutions. Collaboration and knowledge sharing are key aspects of the teams success, fostering an environment where creativity and technical excellence thrive. We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.,

The company Eximietas Design is currently seeking an experienced and highly skilled RTL Micro Architect to join their team in Bangalore. As the RTL Micro Architect, you will be responsible for defining and implementing the microarchitecture of advanced semiconductor designs. Your role will involve working on challenging RTL design tasks, collaborating with various teams, and contributing to the development of high-performance and power-efficient solutions. Your key responsibilities will include defining microarchitecture specifications for complex SoC designs, leading RTL design and implementation using Verilog/SystemVerilog, collaborating with different teams to ensure project success, performing design trade-off analysis, developing design methodologies for efficiency improvement, mentoring junior engineers, participating in design reviews, and providing technical leadership. To qualify for this position, you should have at least 8 years of hands-on experience in RTL design and microarchitecture development, strong expertise in RTL design using Verilog/SystemVerilog and logic synthesis, proficiency in microarchitecture design for complex SoCs, experience with low-power design techniques, familiarity with advanced process nodes, strong scripting skills in Tcl, Python, or Perl, excellent problem-solving skills, and effective communication and leadership skills. In return, Eximietas Design offers you the opportunity to work on cutting-edge semiconductor designs and innovative technologies, a collaborative work environment, competitive compensation and benefits package, and professional growth and development opportunities. If you are interested in this position, please share your updated resume with maruthiprasad.e@eximietas.design.,

The ideal candidate for the FPGA Engineer position in Hyderabad/Bangalore should have a minimum of 4 years of experience in the field. You should possess basic STA knowledge and be proficient in using tools like Vivado. Your expertise should extend to FPGA platforms such as AMD(XILINX) and Altera. Additionally, you should be skilled in digital hardware designing using Verilog on large AMD(Xilinx)/Altera FPGAs. Proficiency in scripting languages like perl, python, and tcl is essential for this role. Experience in working with Linux operating systems is also required. You will be responsible for completing design and timing verification tasks within specified timelines. The ability to work both independently and as part of a team is crucial for success in this role. Your primary job deliverables will include designing, implementing, testing, integrating, and delivering system-level digital designs for FPGA blocks timing verification. You will also be tasked with debugging design timing related issues on various FPGA families and segmenting FPGA designs effectively. In this role, you will run internal scripts for performance testing and update them as needed. A BTech/MTech qualification is necessary to be considered for this position. If you meet these requirements and are interested in the opportunity, please share your CV with sharmila.b@acldigital.com.,

The Senior ADC Migration Engineer will be responsible for the end-to-end migration of complex Application Delivery Controller (ADC) configurations from Citrix NetScaler to F5 BIG-IP platforms. A key focus of this role will involve expert analysis, translation, and re-implementation of custom Citrix LUA scripts into equivalent F5 iRules Tcl, as well as leveraging other F5 native features. This role requires deep technical expertise in both Citrix NetScaler and F5 BIG-IP, along with strong scripting and problem-solving abilities. The responsibilities include conducting a thorough analysis of existing Citrix NetScaler configurations, including Virtual Servers, Services, Policies, Profiles, and custom LUA scripts to understand their functionality and dependencies. Expertly analyzing complex Citrix LUA scripts and translating their functionality into optimized F5 iRules Tcl or alternative F5 features. Designing, configuring, and implementing equivalent F5 BIG-IP configurations, primarily focusing on LTM (Local Traffic Manager) and APM (Access Policy Manager) objects. Mapping and converting Citrix policies and profiles to their F5 counterparts. Developing and executing comprehensive test plans to ensure functional parity and optimal performance post-migration, including load testing and security validation. Creating detailed documentation of migrated configurations, iRules, and architectural changes. Diagnosing and resolving complex issues arising during the migration process and post-migration. Working closely with application owners, network architects, security teams, and project managers to ensure seamless migration and minimal business disruption. Advocating and implementing F5 best practices for security, performance, and maintainability. Potentially mentoring junior team members on F5 BIG-IP technologies and migration strategies. Required Skills and Qualifications: - Bachelor's degree in Computer Science, Information Technology, or a related field. - Minimum of 7 years of hands-on experience with Application Delivery Controllers (ADCs). - Extensive experience (5 years) with Citrix NetScaler/ADC platforms, including advanced configuration, policy creation, and expert-level proficiency in Citrix LUA scripting. - Extensive experience (5 years) with F5 BIG-IP platforms, including LTM and strong proficiency in F5 iRules Tcl. Experience with APM is highly desirable. - Demonstrable experience in successfully migrating ADC configurations between different vendor platforms (Citrix to F5 preferred). Technical Proficiency: - Deep understanding of networking protocols (TCP/IP, HTTPS, DNS, SSL/TLS). - Strong command of Tcl scripting language for iRules development. - Strong understanding of security concepts related to ADCs, SSL offloading, authentication/authorization. - Familiarity with automation tools and scripting (e.g., Python, Ansible) for ADC configuration management is a plus.,

You should be well versed with timing closure (STA) and timing closure methodologies, along with the ability to develop pre/post-layout constraints for timing closure. You will be required to collaborate with the design team to establish functional/DFT constraints and integrate IP level constraints. Additionally, you should have experience in defining multi-voltage/switching aware corner definitions, selecting RC/C models, and possessing expertise in abstraction techniques such as Hyperscale/ILM/ETM. In this role, you will be responsible for conducting RC balancing and scaling analysis of full chip clocks as well as critical data paths. Proficiency in automation using PERL, TCL, and EDA tool-specific scripting is essential. You should also have experience in DMSA at full chip level and developing custom scripts for timing fixes. As for qualifications, a BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design is required. Detailed knowledge of EDA tools and flows, specifically Tempus/Primetime, is a must-have. The ideal candidate should have a minimum of 7 years of relevant experience in the field.,

Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You’ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys' products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You’ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You’ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys' products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You’ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

As a Senior Hardware Design Engineer at Agnisys, you will have the opportunity to work on high-tech semiconductor products by joining our R&D team. We provide a progressive and innovation-driven environment that promotes constant learning, which is crucial for personal and professional growth. Basic Requirements: - A B.Tech degree in Electronics and Communication Systems - Proficiency in Verilog, VHDL, SystemVerilog & C - Experience with FPGA, EDA Tools, Linux, Perl, and Tcl - Excellent communication skills - Ability to work independently with minimal supervision and collaboratively within a team - Strong multi-tasking skills - Self-motivated with a solid team spirit Job Responsibilities: - Design, plan, document, and develop new hardware products from initial requirements to production-ready prototypes - Maintain existing designs and create new variants to incorporate new features and manage component end-of-life issues - Collaborate with Hardware team members, Product Management, Software Engineering, and Manufacturing to deliver reliable and standards-compliant products About Agnisys: Agnisys Inc. is a prominent supplier of Electronic Design Automation (EDA) software aimed at addressing complex design and verification challenges in system development. Our products facilitate a unified specification-driven development flow, enabling users to describe registers and sequences for SoC and IP projects and automatically generate RTL design, UVM testbenches, C/C++ embedded code, and documentation. This approach accelerates design, verification, firmware, and validation processes. Leveraging patented technology and user-friendly interfaces, our specification automation tools enhance productivity, efficiency, and accuracy in system design and verification. Established in 2007, Agnisys is headquartered in Boston, Massachusetts, with R&D centers in Milpitas, CA, and Noida, India. Location: Noida Job Type: Full-time Schedule: Monday to Friday Work Location: In person,

As a Silicon Design Engineer with over 5 years of experience in RTL design and development, you will be responsible for creating RTL designs and developing various documents such as requirements specification, design, user guides, etc. Your expertise in FPGA VHDL and/or Verilog design using Xilinx technology and tools will be crucial in this role. Additionally, your experience with Ethernet, PCIe, SPI, I2C, USB, GPIO, Memory architectures, DDR, SDRAM, DMA technologies, and hardware testing will be valuable assets. You should be adept at HW testing, including working with test equipment such as logic and traffic analyzers, test generators, etc. Strong debugging skills at both device and board levels will be essential. Proficiency in scripting languages like Perl, Python, or TCL will be beneficial. Your excellent interpersonal, written, and verbal communication skills will enable you to collaborate effectively with cross-functional teams. Moreover, your problem-solving and analytical skills will be put to good use in this dynamic role. If you are interested in this opportunity, please submit your updated resume to janagaradha.n@acldigital.com. Your contributions as a Silicon Design Engineer will play a vital role in the successful development of cutting-edge technology solutions.,

Qualcomm India Private Limited is a leading technology innovator that is dedicated to pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a Hardware Engineer at Qualcomm, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. This includes working on a wide range of systems such as yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to develop cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop innovative solutions that meet performance requirements. To qualify for this role, you should possess a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 6 years of experience in Hardware Engineering or a related field. Alternatively, a Master's degree with 5+ years of relevant experience or a PhD with 4+ years of experience is also acceptable. Key responsibilities for this position include having 5 to 10 years of experience in static timing analysis, constraints, and other physical implementation aspects. A solid understanding of industry-standard tools such as PT, Tempus, GENUS, Innovus, and ICC is required. You should have the ability to address extreme critical timing bottleneck paths and prepare complex ECOs for timing convergence across a wide range of corners. Experience in deep submicron process technology nodes is highly preferred along with knowledge of high-performance and low-power implementation methods. The ideal candidate should be willing to optimize power, push PPA to the best possible extent, and have expertise in Perl and TCL language. Qualcomm is an equal opportunity employer that is committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please reach out to disability-accommodations@qualcomm.com or contact Qualcomm's toll-free number. The company expects its employees to adhere to all applicable policies and procedures, including security measures for protecting confidential information. Please note that Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies are not authorized to use the site for submissions, and any unsolicited profiles, applications, or resumes will not be accepted. For more information about this role, please contact Qualcomm Careers directly.,

Job Title: 3DEXPERIENCE Developer Experience Level: Mid-level (36 Years) Number of Positions: 2 Location: [Bengaluru] Employment Type: Full-Time [work from office] Job Summary: We are seeking skilled 3DEXPERIENCE Developers with 3–6 years of experience to join our engineering team. The ideal candidates will have hands-on experience in ENOVIA customization and be proficient in MQL, TCL, EKL, and CAA. You will work closely with cross-functional teams to develop, customize, and enhance 3DEXPERIENCE applications based on business needs. Key Responsibilities: Develop and customize 3DEXPERIENCE/ENOVIA applications using MQL (Matrix Query Language), TCL (Tool Command Language), EKL (Engineering Knowledge Language), and CAA (Component Application Architecture). Implement business logic using EKL in 3DEXPERIENCE dashboards and widgets. Customize and extend out-of-the-box (OOTB) ENOVIA apps. Develop integrations with external systems (e.g., ERP, CAD tools). Perform bug fixing, performance tuning, and upgrades for ENOVIA components. Analyze requirements and translate them into technical designs. Provide technical documentation and support user acceptance testing (UAT). Collaborate with functional teams and provide post-deployment support. Key Skills and Tools: Languages & Scripting: MQL, TCL, EKL Platform Expertise: ENOVIA 3DEXPERIENCE (2019x and above preferred) Development Framework: CAA (Component Application Architecture) Other Skills: Java, JavaScript (optional but a plus), 3DEXPERIENCE data model understanding Strong debugging and problem-solving abilities Knowledge of data migration and upgrade processes in ENOVIA (added advantage) Preferred Qualifications: Bachelor’s or master’s degree in computer science, Mechanical Engineering, or related field Dassault Systems certification (optional but preferred) Experience working in Agile/Scrum environments Role & responsibilities Preferred candidate profile

Job Requirements Candidate should have strong knowledge in handling complex design in terms of minimum 2 million instance count, 1Ghz clock freq, MPCTS, good knowledge in CTS qor analysis and timing closure with minimal DRC in route, PRO ECO experience. Timing Analysis: Able to analyze timing for internal paths including ICG independently Scripting: TCL mandatory Work Experience Candidate should have strong knowledge in handling complex design in terms of minimum 2 million instance count, 1Ghz clock freq, MPCTS, good knowledge in CTS qor analysis and timing closure with minimal DRC in route, PRO ECO experience. Timing Analysis : Able to analyze timing for internal paths including ICG independently Scripting : TCL mandatory

Category Engineering Hire Type Employee Job ID 12213 Remote Eligible No Date Posted 21/07/2025 Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You’ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys' products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You’ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Alternate Job Titles: Applications Engineering, Sr Engineer Technical Support Engineer – Senior Level We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced engineering professional, eager to make a tangible impact in the semiconductor industry. With a strong foundation in electronics, computer engineering, or a related discipline, you thrive in dynamic, fast-paced environments where learning never stops. You enjoy solving complex technical challenges, collaborating with diverse teams, and engaging directly with customers to deliver innovative solutions. Your ability to communicate technical concepts to both technical and non-technical stakeholders sets you apart. You are proactive, resourceful, and committed to continuous self-improvement. Your adaptability and curiosity drive you to stay ahead of technology trends, and you take pride in mentoring peers as well as learning from them. You value inclusivity, respect different viewpoints, and believe that the best results come from teamwork. You are excited to work on projects that have real-world impact and are motivated by the opportunity to influence how cutting-edge technology shapes the future. If you’re looking to grow your career alongside some of the brightest minds in the industry and contribute to game-changing advancements, Synopsys is the place for you. What You’ll Be Doing: Collaborating with customers to understand their technical requirements and provide tailored solutions using Synopsys products. Delivering technical support and troubleshooting for complex issues throughout the product lifecycle, ensuring customer satisfaction. Conducting product demonstrations, training sessions, and workshops to empower users and promote product adoption. Working closely with R&D and product management teams to relay customer feedback and influence product roadmap decisions. Developing technical collateral including application notes, best practices, and white papers to facilitate customer success. Participating in pre-sales activities, including technical presentations and proof-of-concept evaluations. Staying abreast of industry trends and emerging technologies to provide strategic guidance to customers and internal teams. The Impact You Will Have: Accelerate customer success by ensuring seamless integration and optimal use of Synopsys solutions in their workflows. Bridge the gap between customer needs and product capabilities, driving continuous improvement and innovation. Enhance customer satisfaction through timely and effective technical support, fostering long-term partnerships. Influence product development by providing actionable feedback from real-world customer engagements. Expand Synopsys’ market reach by enabling customers to maximize the value of our technology. Contribute to a collaborative, knowledge-sharing culture that elevates the performance of the entire team. What You’ll Need: Bachelor’s or Master’s degree in Electronics, Computer Engineering, or a related technical field. 5+ years of experience in application engineering, technical support, or a relevant engineering role. Strong understanding of semiconductor design flows, EDA tools, and/or IP integration methodologies. Hands-on experience with scripting languages (e.g., Python, TCL, Perl) and familiarity with Linux/Unix environments. Proven ability to analyze and resolve complex technical issues in a timely manner. Excellent written and verbal communication skills for technical documentation and customer interaction. Who You Are: Proactive problem solver with a customer-first mindset. Strong collaborator who enjoys working in diverse, cross-functional teams. Adaptable and resilient in the face of shifting priorities and technical challenges. Excellent communicator with the ability to explain complex concepts clearly. Continuous learner, open to feedback, and eager to grow professionally. Detail-oriented and organized, with strong time management skills.

Category Engineering Hire Type Employee Job ID 12211 Remote Eligible No Date Posted 21/07/2025 Alternate Job Titles: Senior Digital Design Engineer ASIC Design Engineer High-Speed SerDes Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced ASIC Digital Design Engineer with a strong background in digital design for high-speed serial interfaces. You have a deep understanding of USB, PCIe, Ethernet, Display, and HDMI protocol standards, and you thrive in a collaborative environment. Your expertise in Verilog RTL design, microarchitecture, and timing constraints development makes you a valuable asset to any team. You are adept at using tools like Spyglass for CDC/RDC/Lint and have excellent debugging skills. Your ability to propose and implement design updates based on various requirements, coupled with your experience in test coverage and physical design timing closure, sets you apart as a leader in your field. With a passion for innovation and a keen eye for detail, you are ready to take on new challenges and contribute to the success of Synopsys. What You’ll Be Doing: Driving and working on digital design for high-speed serial interface PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Proposing micro-architecture of design/design updates based on customer requirements, analog requirements, system performance improvements, Link layer interface changes, or overall robustness of design. Implementing RTL in Verilog and running Spyglass CDC/RDC/Lint. Collaborating with verification teams to test desired functionality and corner cases. Developing timing constraints, DFT insertion, and test coverage, and closing timing with physical design teams. Well versed in Micro-Architecture and Block Ownership, Design from scratch. The Impact You Will Have: Enhancing the performance and reliability of high-speed serial interface PHY IPs. Contributing to the development of cutting-edge technologies that power modern electronics. Driving innovation in digital design and influencing the future of semiconductor technology. Collaborating with cross-functional teams to deliver robust and high-quality designs. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous improvement and excellence. Supporting customers by providing high-performance and reliable IP solutions that meet their needs. What You’ll Need: 5-8 years of relevant experience in digital design for ASICs. Strong knowledge of Verilog RTL design and microarchitecture. Experience with timing constraints development and synthesis flow. Proficiency in using Spyglass or similar tools for Lint/CDC/RDC. Proficiency in scripting and automation using TCL, PERL, or Python. Excellent debugging skills and attention to detail. Who You Are: A collaborative team player with strong communication skills. A problem solver with a proactive approach to challenges. A detail-oriented professional with a passion for innovation. A self-motivated individual who thrives in a fast-paced environment. An adaptable engineer who can handle multiple tasks and priorities. The Team You’ll Be A Part Of: You will be part of the High-Speed SerDes Digital Design Team, a group of talented engineers dedicated to developing high-performance serial link PHY IPs. The team focuses on innovation, quality, and collaboration to deliver industry-leading solutions. Together, you will work on challenging projects that push the boundaries of technology and make a significant impact on the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Alternate Job Titles: ASIC Verification, Sr. Engineer Sr. Engineer, Digital Verification We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and innovative engineer with a strong background in high-speed protocols and a keen interest in growing your expertise through verification-related work. You thrive in a collaborative environment, working alongside experienced digital design and verification professionals. With a solid foundation in Verilog, VHDL, and/or SystemVerilog, you are eager to expand your knowledge and apply your skills to state-of-the-art products. Your excellent problem-solving abilities and strong communication skills enable you to identify and address design issues effectively. You are organized, detail-oriented, and capable of managing multiple tasks efficiently. With your passion for learning and exploring new technologies, you are committed to contributing to the success of our projects and the broader goals of Synopsys. What You’ll Be Doing: Identify verification environment requirements from various sources, including specifications, design functionality, and interfaces. Generate verification test plans, environment documentation, and usage documentation. Define, develop, and verify complex UVM verification environments. Evaluate and exercise various aspects of the development flow, including Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modeling, and verification coverage metrics. Identify design problems, propose corrective actions, and address inconsistencies in documented functionality. Collaborate with cross-functional teams to ensure the successful integration and verification of projects. The Impact You Will Have: Ensure the robustness and reliability of our digital designs through meticulous verification processes. Contribute to the development of cutting-edge technologies that power the Era of Smart Everything. Enhance the overall quality and performance of our silicon IP products. Help our customers bring differentiated products to market quickly and with reduced risk. Drive continuous improvements in our verification methodologies and practices. Support the growth and success of Synopsys by contributing to our reputation for innovation and excellence. What You’ll Need: Proven desire to learn and explore new state-of-the-art technologies. Demonstrated proficiency in Verilog, VHDL, and/or SystemVerilog. Experience with scripting languages such as BASH, TCSH, PERL, PYTHON, or TCL is a plus. Understanding of verification methodologies such as UVM is a plus. Strong organizational and communication skills. 3+ years of relevant experience in ASIC digital verification. Who You Are: A passionate and innovative engineer with a strong technical background. Detail-oriented and capable of managing multiple tasks efficiently. Excellent problem-solving abilities and a proactive approach to addressing challenges. Strong communication skills, both written and spoken. A collaborative team player who thrives in a dynamic and fast-paced environment. The Team You’ll Be A Part Of: You will join an experienced and dedicated digital design and verification team focused on developing state-of-the-art products. Our team is committed to excellence and continuous improvement, working collaboratively to achieve our goals. You will have the opportunity to learn from experts in various fields and contribute to the success of our projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Job Summary: We are seeking skilled 3DEXPERIENCE Developers with 36 years of experience to join our engineering team. The ideal candidates will have hands-on experience in ENOVIA customization and be proficient in MQL, TCL, EKL, and CAA. You will work closely with cross-functional teams to develop, customize, and enhance 3DEXPERIENCE applications based on business needs. Key Responsibilities: Develop and customize 3DEXPERIENCE/ENOVIA applications using MQL (Matrix Query Language), TCL (Tool Command Language), EKL (Engineering Knowledge Language), and CAA (Component Application Architecture). Implement business logic using EKL in 3DEXPERIENCE dashboards and widgets. Customize and extend out-of-the-box (OOTB) ENOVIA apps. Develop integrations with external systems (e.g., ERP, CAD tools). Perform bug fixing, performance tuning, and upgrades for ENOVIA components. Analyze requirements and translate them into technical designs. Provide technical documentation and support user acceptance testing (UAT). Collaborate with functional teams and provide post-deployment support. Key Skills and Tools: Languages & Scripting: MQL, TCL, EKL Platform Expertise: ENOVIA 3DEXPERIENCE (2019x and above preferred) Development Framework: CAA (Component Application Architecture) Other Skills: Java, JavaScript (optional but a plus), 3DEXPERIENCE data model understanding Strong debugging and problem-solving abilities Knowledge of data migration and upgrade processes in ENOVIA (added advantage) Preferred Qualifications: Bachelor’s or master’s degree in computer science, Mechanical Engineering, or related field Dassault Systems certification (optional but preferred) Experience working in Agile/Scrum environments