At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position: Sr Principal Software Engineer Grade: T5 Location: Noida Job Responsibilities The role’s day to day responsibilities cover: R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power. This job will suit applicants looking to continue their software engineering career in an intellectually stimulating and challenging problem domain. There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out! Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their programming skills into professional software engineering skills. Job Qualifications BE/BTech/ME/MTech- Computer Science or others Experience: 11- 15 Yrs Required Skills Develop reliable, scalable, and high-performance Modus DFT software that is easy to use. Develop software tools in C/C++ to support DFT and ATPG. Research and develop software solutions to allow greater efficiency in architecture, hardware, and software teams. Development environment is C++ on Unix in multi-threaded environment with expertise in C++, data-structure and algorithms. Strong knowledge of Tcl is preferred Experience in language compiler Prior experience with large software development projects is highly recommended. We’re doing work that matters. Help us solve what others can’t. Show more Show less

Project Role : Software Development Lead Project Role Description : Develop and configure software systems either end-to-end or for a specific stage of product lifecycle. Apply knowledge of technologies, applications, methodologies, processes and tools to support a client, project or entity. Must have skills : Dassault Systemes ENOVIA V5 Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Lead, you will engage in the development and configuration of software systems, either managing the entire process or focusing on specific stages of the product lifecycle. Your day will involve collaborating with team members, applying your expertise in various technologies and methodologies, and ensuring that the software solutions meet client needs effectively and efficiently. You will also be responsible for troubleshooting issues and implementing improvements to enhance system performance and user experience. Roles & Responsibilities:1.Capable of understanding and contributing to the technical solution from 3DEXPERIENCE design through code level.2.Capable of providing solutions & mentoring support to the team.3.Taking ownership of individual tasks (implementation and bug fixing) and ensuring the delivery of assignments on-time with quality. Extending Support to the team when required4.Awareness and adherence to the best practices to the coding standards of Enovia API/EKL/CAA. Professional & Technical Skills: - Must Have Skills: Proficiency in Dassault Systemes ENOVIA V5.- Strong understanding of software development methodologies.- Experience with configuration management tools and practices.- Ability to analyze and optimize software performance.- Experience in 3DExperience/CATIA/Enovia - Customization- Experience in 3DExperience Enovia customization, configuration and SME role.- Excellent verbal and written communication skills. Additional Information:- The candidate should have minimum 4 years of experience in in 3DExperience/CATIA/Enovia - Customization.- This position is based at our Bengaluru office.- A 15 year full time education is required. Qualification 15 years full time education

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Principal Product Engineer Grade: T4 Experience: 7-12 Years Location: Bangalore/Noida Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. We offer amazing opportunities to grow, no matter where you are in your career. Job Responsibilities This opportunity is for a Principal Product Engineer in the Digital and Signoff Group (DSG) at Cadence. The Cadence Digital and Signoff Group will offer you a dynamic environment in which you will work with innovative R&D and Customer Engagement teams to influence the development of software tools for advanced chip design platforms. Experience And Technical Skills Required Strong knowledge of IC design and physical design flow. Experienced in using EDA tools such as Cadence Innovus, Cadence Genus, Cadence Cerebrus with strong debug skills Good understanding of physical design constraints such as power, clock, placement, routing and timing. Proficient in scripting languages such as Tcl, Perl, or Python. Ability to work with cross-functional teams, including physical design, Synthesis, and signoff. Excellent communication and interpersonal skills. Ability to work under tight deadlines and handle multiple projects simultaneously. Testing, validating, and deploying Innovus software for key customer. Working with Research and Development (R&D) to discuss results and next steps for Innovus' features Qualifications BE/BTech/ME/MS/MTech or equivalent We’re doing work that matters. Help us solve what others can’t. Show more Show less

Are you an expert in Design for Test (DFT) , and we're looking for a talented Principal DFT Engineer to join our dynamic engineering team in Hyderabad. This is a unique opportunity to lead critical DFT implementation for cutting-edge ASIC designs while shaping the future of our DFT practices. As a Principal DFT Engineer , you will take on a leadership role in delivering DFT (including ATPG) implementation at both the chip and block levels. You will lead DFT strategy, manage the implementation of DFT structures, perform formal checks, debug test pattern mismatches, and ensure timing closure in DFT modes. This role may involve acting as an industry-leading expert in a specific area of DFT or leading a team to deliver complete DFT solutions from architecture to pattern generation. Key Responsibilities: DFT Strategy & Implementation: Lead the DFT work in projects, including the definition of DFT strategy, implementation of DFT structures, and verification of the DFT structures to meet the project's testability requirements. DFT Expertise: Serve as an expert in DFT tools and techniques, demonstrating advanced skills in tools from Mentor, Synopsys, or Cadence. Complex Problem Solving: Address and resolve complex issues related to DFT, ATPG, timing closure, and ATE chip bring-up, providing solutions to challenges across multiple projects. Leadership & Mentorship: Lead DFT design projects and mentor junior engineers, providing guidance in technical aspects and helping to manage the team’s workflow and priorities. Customer Interface & Project Management: Act as the main customer interface for DFT aspects of the project, ensuring clear communication and alignment. Take responsibility for managing multiple assignments from different customers and teams. Continuous Improvement: Analyse customer feedback and recognise business opportunities. Collaborate with the Sondrel Business Team to push these opportunities forward. Technical Contributions: Contribute to technical white papers, present at internal and external conferences, and participate in sales support, such as preparing Statements of Work. Team Organisation: Organise and manage teams effectively, setting and adjusting priorities quickly to meet project timelines. Key Relationships: Internal: Reports to: Regional Engineering Head Collaborates with: Engineers, Project Leaders, Sales, Finance, and HR teams Supervises: Engineers, Senior Engineers, and Staff Engineers External: Customers: Minimal technical engineer-to-engineer communication Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses Qualifications: Essential: A Bachelor’s degree, Master’s, or PhD in Engineering or a related field. Typically 10+ years of experience in the microelectronics field, specifically in DFT. Strong Project Management skills. Desirable: A project management qualification. Additional experience in high-level design teams, especially in DFT architecture. Skills & Experience: Essential: Extensive experience with DFT tools (e.g., Mentor, Synopsys, Cadence) and techniques including: IJTAG/Scan/MBIST/BSD/LBIST/Boundary Scan insertion. ATPG/TC improvements and pattern generation. Pattern simulation (Zdel/SDF) and pattern verification (VCS, NC-Verilog, NC-Sim, ModelSim). Diagnosis of ATE failures and silicon bring-up. Deep understanding of DFT architecture design and implementation. Strong problem-solving skills and ability to lead or collaborate in a DFT team. Expertise in managing complex, technical DFT projects. Advanced scripting skills in Python, TCL, Perl, Shell, or similar languages. Proven ability to evaluate issues, define solutions, and make sound judgments in technical environments. Desirable: Ability to apply advanced knowledge in specific areas of physical design or a broad understanding across multiple sub-functions of DFT. Proven capability to contribute to business development and customer engagement. Attributes: Team leader with strong organisational skills and the ability to manage multiple priorities. Active listening skills and the ability to motivate a team to work under pressure. Excellent attention to detail and high level of self-motivation. Strong conflict resolution skills and the ability to quantify risks and estimate engineering effort. Ability to think creatively and "outside the box." Why Aion Silicon? At Aion, we are committed to advancing the boundaries of digital design. You’ll be leading key DFT projects in a collaborative, innovative, and growing team. This is a fantastic opportunity to have a direct impact on both technical and business outcomes while working on cutting-edge ASIC designs in a global environment. If you are a seasoned Principal DFT Engineer with a passion for leading technical teams and projects, we would love to hear from you. Show more Show less

Are you ready to take the next step in your career and contribute to cutting-edge ASIC and IP/SoC development? We are looking for an experienced Design Engineer to join our team in Hyderabad. This is an exciting opportunity to work with a talented team on high-impact projects, pushing the boundaries of digital design in a collaborative and fast-paced environment. As a key technical contributor, you will work closely with ASIC engineering management to define and implement digital IP/SoC designs, and integrate these with third-party designs into customer ASICs and SoCs. You’ll be part of a multi-site development team, ensuring the delivery of high-quality designs that meet customer requirements and solving complex technical challenges. Key Responsibilities: Design & Implementation: Specify, micro-architect, implement, and perform design verification for complex RTL IP blocks, from basic SoC building blocks to advanced video processing and encoding/decoding logic. IP Development Cycle: Take part in the full lifecycle of IP development—from customer concept to backend layout and silicon validation. Collaboration: Work closely with SoC architects to ensure designs align with project requirements and integrate seamlessly with the rest of the SoC. Technical Guidance: Provide technical advice and solutions to design, verification, physical design, silicon validation, and production test teams. Customer & Team Engagement: Analyse customer requirements and implement functional digital designs and integration flows for complex SoCs. Provide support for customer-facing technical discussions. Tool & Script Development: Develop, maintain, and deploy proprietary scripts and tools for ASIC/SoC design and database management. Leverage industry-leading EDA tools for design quality assurance, power optimisation, and synthesis/timing analysis. Continuous Learning: Stay up-to-date with the latest advances in engineering technologies and methodologies to maintain our competitive edge. Mentorship: Coach junior engineers and support them in all aspects of design activities, including coding, synthesis, debug, DFT, and backend integration. Technical Publications: Contribute to technical white papers, and provide sales support as part of a collaborative team. Key Relationships: Internal: Collaborate with Engineers, Senior Engineers, Principal Engineers, Project Managers, Sales, Finance, and HR teams. External: Technical communication with customers (minimal), and liaising with EDA Tool Vendors, Foundries, and Assembly Houses. What We're Looking For: Qualifications: Essential: Degree/Masters or PhD in Electrical Engineering, Computer Science, or a related field. Typically, 5+ years of relevant experience in digital design and IP/SoC development. Desirable: A Masters or PhD in a related subject with practical experience of 5+ years. Skills & Experience: Essential: Expertise in IP design, implementation, and verification. Strong knowledge of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode simulation, gate-level simulation). Experience with design checking tools (Lint, CDC, LEC). Strong communication skills and ability to provide technical guidance to junior engineers. Desirable: Familiarity with ARM processor subsystems, video processing, bus protocols (AXI/AHB/ACE). Experience with low power design methodology (UPF/CPF) and synthesis/timing analysis. Experience with Tcl, Perl, Python, SystemC, IPXACT, and database management. Familiarity with Linux software frameworks. Attributes: Self-motivated with the ability to work independently and as part of a team. Strong problem-solving skills and ability to adapt quickly to changing priorities. Excellent attention to detail and time management skills. A fast learner who thrives in a dynamic, collaborative environment. Show more Show less

Aion Silicon is looking for an experienced Verification Engineers to join our office in Hyderabad. In this hands-on technical role, you will contribute to a variety of SoC , subsystem , and IP development projects , taking responsibility for the verification process from planning to coverage closure. Working closely with ASIC/SoC project leaders , you will architect, specify, and lead the implementation of high-level verification projects, using advanced verification languages. You will also collaborate with multi-site development teams and customers to propose solutions and ensure the delivery of high-quality verification environments and methodologies. If you are a passionate and innovative engineer who enjoys solving complex verification problems and leading teams, this could be the perfect opportunity for you. Key Responsibilities: Verification Expertise: Provide hands-on expertise in IP and SoC-level functional verification , including the development of testbenches and implementation of verification plans . Problem Solving: Proactively address and resolve verification challenges, working independently or as part of a collaborative team. Mentorship & Team Leadership: Mentor junior team members, fostering a creative and innovative environment and helping to develop new ideas and approaches. Industry Knowledge: Stay up-to-date with the latest advancements in verification technologies and methodologies, ensuring Sondrel remains at the forefront of industry best practices. Cross-Functional Collaboration: Coordinate with cross-functional teams to define verification strategies and create comprehensive verification plans for SoC designs. Optimised Design Solutions: Deliver cutting-edge, optimised solutions for functional verification, ensuring high-quality outcomes. Recruitment Support: Contribute to the recruitment process by interviewing candidates and assisting in team expansion activities. Key Relationships: Internal: Reports to: Engineering Manager/Principal Engineer Collaborates with: Engineers, Senior Engineers, Principal Engineers, Project Managers, and HR teams Supervises: Verification Team (including junior engineers) External: Customers: Minimal technical engineer-to-engineer communication Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses Qualifications: Essential: A degree, Master's, or PhD in a relevant subject. Typically, 5+ years of experience in SoC , subsystem , or IP verification in a team environment. Desirable: A Master's or PhD in a related subject, with 5+ years of practical experience. Skills & Experience: Essential: Proven experience in metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g., UPF ). Experience with RTL and gate-level simulation , as well as SoC-level verification , including HW/SW co-verification and multi-mode simulation . Familiarity with HW acceleration techniques like emulation . Experience with verification infrastructure automation (e.g., Perl , Python , Java , Tcl , IP-XACT , UCDB ). Strong knowledge of C programming for verification tasks. Demonstrated ability to listen to customer feedback , recognise opportunities for technical innovation , and provide constructive feedback. Desirable: Experience in contributing to or presenting technical white papers . Advanced knowledge or experience in multiple verification sub-functions. Attributes: Essential: Strong leadership, communication, and problem-solving skills. Excellent negotiation , organisation , and time management skills. Self-organised with the ability to respond to changing priorities quickly. Collaborative team player , with the ability to work under pressure. Self-motivated , with a proactive approach to tasks. Exceptional attention to detail and focus on high-quality results. Ability to work independently , with a strong sense of initiative and responsibility. Why Aion? At Aion, we are committed to innovation and excellence in SoC design. Joining our team in Hyderabad will provide you with the opportunity to work on cutting-edge technologies and contribute to high-impact projects. You will be part of a dynamic, supportive team where you can grow your technical expertise and leadership capabilities, while helping shape the future of semiconductor design. If you're an experienced Verification Engineer eager to contribute to innovative design solutions, we'd love to hear from you. Show more Show less

Aion Silicon is seeking an experienced Physical Design Engineers to join our growing team in UK/Barcelona/Morocco or Hyderabad . As part of a dynamic physical implementation design team, you will be responsible for block development and potentially full chip responsibility, taking designs from RTL to GDS. This is an exciting opportunity for an individual who is self-motivated, detail-oriented, and passionate about contributing to the development of high-quality, cutting-edge designs. Key Responsibilities: Independent Work: Contribute to physical design projects with minimal supervision, delivering high-quality results. Problem Solving: Address and resolve moderate complexity design challenges, applying sound judgment to interpret results and conduct quantitative analysis. Physical Design Ownership: Take responsibility for various aspects of the physical design flow, from RTL to GDS, ensuring timely and accurate delivery. Multi-Project Management: Handle multiple assignments from different customers or teams, ensuring that deadlines and quality standards are met. Collaboration: Work closely with more experienced team members to resolve design issues, applying expertise in physical design tools and techniques. Tool Expertise: Demonstrate proficiency in one or more tools such as Synthesis, PnR, Formal verification, Custom layout techniques, Analog simulation, or Chip finishing. Documentation and White Papers: Contribute to the development of technical white papers and presentations. Sales Support: Contribute to sales activities, including Statement of Work preparation. Time Management: Maintain accurate timekeeping and manage your workload effectively. Self-Discipline: Execute design tasks efficiently, adhering to best practices and maintaining a high standard of work. Key Relationships: Internal: Reports to: Engineering Manager/Principal Engineer Collaborates with: Engineers, Senior Engineers, Principal Engineers, Project Managers, Sales, Finance, and HR teams Supervises: Physical Design Team (2-3 engineers) External: Customers: Minimal technical engineer-to-engineer communication Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses Qualifications: Essential: A degree, Master's, or PhD in a relevant subject. Typically, 5+ years of experience in physical design and implementation. Desirable: Master's or PhD in a related subject with 5+ years of practical experience. Skills & Experience: Essential: Good tapeout experience on multiple technologies (e.g., 5nm, 7nm, 12nm, 28nm). Experience with physical verification checks (e.g., DRC, LVS, ANTENNA, ERC). Solid understanding of synthesis, floorplanning, placement, CTS, routing, and STA concepts. Experience with physical design tools such as: PnR tools: Synopsys ICC, Cadence EDI, Mentor Olympus Synthesis tools: Synopsys DC, Cadence RC Formal verification tools: Formality, Formalpro Physical verification tools: Mentor Calibre, Synopsys IC Validator Demonstrated ability to solve problems independently and as part of a team. Strong scripting skills in Tcl, Perl, or Python. Strong capability in managing projects and delivering results on time. Desirable: Broad knowledge across multiple sub-functions within physical design. Proven ability to contribute to multi-disciplinary teams. Attributes: Essential: Excellent self-organisation and adaptability to changing priorities. Strong leadership skills with the ability to manage and guide a small team. Ability to work under pressure and manage multiple projects simultaneously. Excellent organisational and problem-solving skills. Self-motivated with the ability to work independently. Strong attention to detail and commitment to delivering high-quality results. Why Aion? At Aion, we are passionate about pushing the boundaries of digital design. As part of our new office in Barcelona, you’ll be joining an innovative and collaborative team, with opportunities to work on cutting-edge ASIC designs. This role offers significant responsibility and the opportunity to influence the direction of key projects. If you're a skilled Physical Design Engineer with a passion for technology and leadership, we’d love to hear from you! Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary: Join Qualcomm’s cutting-edge hardware engineering team to drive the design verification of next-generation SoCs, with a focus on wireless technologies including WLAN (IEEE 802.11). You will work on IP and subsystem-level verification, collaborating with cross-functional teams to deliver high-performance, low-power silicon solutions. A strong understanding of on-chip buses and bridges is essential to ensure seamless integration and performance across subsystems. Key Responsibilities: Develop and execute verification plans for complex SoC designs and IP blocks. Architect and implement testbenches using SystemVerilog and UVM/OVM methodologies. Perform RTL verification, simulation, and debugging. Collaborate with design, architecture, and software teams to ensure functional correctness. Contribute to IP design reviews and sign-off processes. Support post-silicon validation and bring-up activities. Analyze and verify interconnects, buses (e.g., AMBA AXI/AHB/APB), and bridges for performance and protocol compliance. Conduct CPU subsystem verification including coherency, cache behavior, and interrupt handling. Perform power-aware verification using UPF/CPF and validate low-power design intent. Execute performance verification to ensure bandwidth, latency, and throughput targets are met. Preferred Skills & Experience: 2–15 years of experience in digital design and verification. Deep understanding of bus protocols and bridge logic, including hands-on experience with AXI, AHB, and APB. Experience with CPU subsystem verification and performance modeling. Familiarity with wireless protocols (IEEE 802.11 a/b/g/n/ac/ax/be) is a plus. Proficiency in SystemVerilog, UVM/OVM, Verilog, and scripting languages (Perl, Tcl, Python). Experience with power-aware verification methodologies and tools (e.g., UPF, CPF). Familiarity with performance verification techniques and metrics. Exposure to tools like Clearcase/Perforce and simulation/debug environments. Strong analytical, debugging, and communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Bachelor’s or Master’s degree in Electrical/Electronics Engineering, Computer Science, or related field. Relevant experience in hardware design and verification. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076713 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skil Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Exp -3-6 yrs with Bachelors or Masters in Engineering Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076383 Show more Show less

Share resumes to - anushia.g@hcltech.com Job Description : Python scripting/programming hands-on automation , Programming Logics. Good understanding of automation frameworks using Python and TCL. L2/L3 Networking concepts. : OSI Layers, TCP/IP, 3 Way and 4 Way Handshake Hands-on experience on any tier1 networking vendors’ Switches and Routers like Cisco, Juniper, Dell, or Ericsson Good understanding of the CI/CD SDLC Should be independently contributing to the day-to-day activities Good in attitude and communication Show more Show less

Join Our Aprisa Team! Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. We Make Real What Matters. This is your role. At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey! This is the Role Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis. Guide and lead others toward successful project completion by innovating and implementing powerful solutions. Collaborate with a hardworking team of experts. Must-Have Requirements B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college with 8-12 years of experience in software development. Validated understanding of C/C++, algorithms, and data structures. Demonstrate excellent problem-solving and analytical skills. Lead and encourage the team with your expertise. Great to Have Experience in: You will have the opportunity to develop RTL synthesis tools and work with System Verilog, VHDL, DFT, formal verification, and Dynamic Power. Additionally, you will design C or RTL IPs and optimize RTL & gate level logic, area, timing, and power. Your experience in developing parallel algorithms and job distribution strategies will be highly valued, as well as your proficiency in using scripting languages like Python and TCL. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5+ Year of industry experiences in the following areas: Expertise in Synthesis - Synopsys Design Compiler, DCG/DC_NXT/Fusion Compiler and/or Cadence RC/Genus. o Hands on with multi-voltage, power aware synthesis, UPF flows in synthesis and low power designs. o Expertise in formal verification with Cadence LEC/ Synopsys Formality o Expertise in writing and debugging timing constraints o Perl and/or TCL scripting, makefile flows. Qualcomm's compute sub system engineers will work on next generation low power, machine Learning sub-system for our system-on-chip (SoC) products used in Smartphone, Automotive and other low power devices. Become a key member of the core team developing fastest smartphone SoC devices implemented on the latest cutting-edge process technologies. In this role candidate will be responsible for compute sub system implementation that includes Physically aware Synthesis -DCG/Fusion Compiler/Genus. In addition, he/she will perform tasks toward constraints development, clock definitions, timing analysis, UPF, CLP check, Formal Verification and ECO flow. He/She will be working closely with physical Design team to optimize designs for power, area, and performance. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. IPPD: Physical design engineer Physical Implementation activities for high performance Cores for 16/14/7/5nm or lower technologies, which includes all or some of the below. Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), Low Power verification, PDN, Timing Closure and / or power optimization Exposure to PD implementation of PPA critical cores. Exposure to timing convergence of high frequency data-path intensive Cores and advanced STA concepts. Able to handle Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes. Understanding of clocking architecture. Tcl/Python/Perl Scripting aware for small automation Strong problem-solving skills , good communication skills and good team player Collaborate with design, DFT and PNR teams and support issue resolutions wrt constraints validation, verification, STA, Physical design, etc. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. About the role: We are seeking a highly motivated and detail-oriented Application Support Engineer to join our dynamic, fast paced and growth-mindset team. In this role, you will be focused on supporting the Questa verification products, specifically in Verification IP line of products. In this position, you will be working closely with the product engineering team, field application engineers and customers. As an ASE, you will be solving some of our customers complex design, testbench and environment issues in the domain of functional verification. You will also be working closely on creating knowledge-based content and providing expertise on the Questa platform. You will work with multiple customers to understand their challenges and flow and be involved in technical presentations, training, evaluation and competitive benchmarking. You will part of the larger application support engineering organization and will be interfacing regularly with the North American and PACRIM teams. Minimum Qualifications: BS Electronic/Computer Engineering from an accredited institution Minimum of 2+ years of Digital Design/Verification experience Knowledge of VHDL or Verilog, or SystemVerilog RTL languages for ASIC or FPGA design Experience with ASIC or FPGA hardware design and implementation using RTL tool flows and methodologies Knowledge of Windows and Linux OS Self-motivated, flexible, self-disciplined, and comfortable in a dynamic, quick-moving environment. Strong interpersonal and communications skills with the ability to quickly establish rapport and credibility with our customers, sales, and product teams. Strong oral, and written communication, and presentation skills Excellent organizational and time management skills Preferred qualifications: MS Electronic/Computer Engineering Knowledge of UVM and System Verilog for Verification Clock Domain Crossing (CDC), Static and Formal Verification – Formal Applications Working knowledge of Working knowledge of Questa-Modelsim, VCS (Synopsys), NCSim (Cadence) or Aldec simulators. Knowledge of C/C++ programming languages Demonstrated proficiency with Object-Oriented Programming experience in test bench architecture and design Knowledge of scripting languages (e.g., Shell, Tcl, Perl, Python) Knowledge of CDC, low power and formal methodologies. Location : Noida/ Bangalore Why us? Working at Siemens Software means flexibility - Choosing between working at home and the office at other times is the norm here. We offer great benefits and rewards, as you'd expect from a world leader in industrial software. A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! Siemens Software. Transform the Everyday Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties And Responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 12+ years Hardware Engineering experience or related work experience. 12+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3073582 Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties And Responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3073584 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Job Summary This position is open for 2-10 years’ experience candidate in Qualcomm CSI (Custom/SemiCustom implementation) team Candidate will be part of CSI team working on RTL- GDS HM implementations using custom flow and methodology for custom design . Qualcomm is one of the fastest growing semiconductor organization in India making high-end Chips with the most advanced technologies. To support its growing needs, we have strong CSI team for the design, development of various highspeed and low power IP’s being used in SoC. Individual has to work on RTL-GDS implementation. This will involve innovating new solutions in close collaboration with the other design teams. Job Responsibilities Job responsibilities include design and development of custom macro using Schematic design at block level (Ex RegArray, memory subsystem) Frontend verification and model generations CLP/PAGLS/LEC verifications at block level. Functional verification using spice/gatesim. Timing Signoff using PT, Candidate should be able to collaborate with different teams. Skillset/Experience 2-10 year of experience: Strong knowledge in transistor circuit design& block level logic design of Memory subsystem & Data path. STA for the design to close Set-up, Hold, MPW, Transition, etc Design verification using ESPCV & LEC, Simulation using Finesim & HSPICE. Front-end RTL Design (Verilog RTL design, System Verilog, Synopsys Design Compiler, Cadence RTL Compiler, LEC, PLDRC, Static Timing Analysis and PTPX) Physical Design using industry-standard RTL2GDS flow including Synopsys ICC2, Cadence Encounter. Scripting in Perl/Python/Shell/Tcl for productivity is a plus IP development (custom macro transistor level design, physical integration, collateral generation, flow development) and PPA quantification. Interface with Process Technology Team to understand the complex DRC and DFM requirements of the advanced technology nodes Work with cross functional teams (Architecture, Test/Verification , Product, CAD, Layout, Physical Design) to gather/define/implement specs Transistor level implementation of the block using CMOS/Domino/Cell-Based/Data path styles Implement power/clock gating techniques, Implement power/clock gating techniques, Implement industry standard as well as custom DFT techniques Implement clock distribution using custom/CTS techniques for low skew/latency/power, Implement block layout using custom/compiler techniques using custom/semi-custom/stdcell libraries Implement block level floor planning using custom and/or tiling techniques Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075292 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Hands on PD execution at block/SoC level along with PPA improvements Strong understanding of the technology and PD Flow Methodology enablement. Work with Physical design engineers to rollout robust, identify areas for flow improvement methodologies. (area/power/performance/convergence), develop plans and deploy/support them Provide tool support and issue debugging services to physical design team engineers across various sites Develop and maintain 3rd party tool integration and productivity enhancement routines Understand advance tech PNR and STA concepts and methodologies and work closely with EDA vendors to deploy solutions. Skill Set Strong programming experience & Proficiency in Python/Tcl/C++ Understand physical design flows using Innovus/fc/icc2 tools Knowledge of one of Encounter/Innovus or FC (or other equivalent PNR tool) is mandatory Basic understanding of Timing/Formal verification/Physical verification/extraction are desired Ability to ramp-up in new areas, be a good team player and excellent communication skills desired Experience 3-5 years of experience with the Place-and-route and timing closer and power analysis environment is required Niche Skills Handling support tools like Encounter/Innovus/edi/fc/Icc2 (or other equivalent PNR tool). One or more of the above is mandatory* Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3072982 Show more Show less

Role Description Role Proficiency: Independently execute mid sized customer projects in any field of VLSI Frontend Backend or Analog design with minimal supervision Outcomes Work as an individual contributor owning any one task of RTL Design/Module. Provide support and guidance to engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Anticipate diagnose and resolve problems; coordinating as necessary with cross-functional teams On time quality delivery approved by the project manager and client Automate the design tasks flows and write scripts to generate reports Come up with novel ideas to reduce design cycle time and cost accepted by UST Manager and client Measures Of Outcomes Quality –verified using relevant metrics by UST Manager / Client Manager Timely delivery - verified using relevant metrics by UST Manager / Client Manager Reduction in cycle time cost using innovative approaches Number of papers published Number of patents filed Number of mandatory trainings attended adhering to training goals Outputs Expected Quality of the deliverables: Ensure zero bugs are present in the design / circuit design. Clean delivery of the design/module in-terms of ease in integration at the top level Meeting functional spec / design guidelines 100% without any deviation or limitation Documentation of tasks and work performed Timely Delivery Ensure project timelines as laid out by the client or program manager are met Meet intermediate tasks delivery for other team members to progress Calling out for help and support in the case of delay in tasks delivery New Skills Development Participate in training – skilling someone and also getting skilled in newer technologies Take up new areas of project development learn on the job and deliver Team Work Participation in team work and supporting team members at the time of need Able to take up additional tasks in-case of any team member(s) not available Able to hand hold junior team members to explain the project tasks and support to deliver Work dedication to go beyond the call of duty to ensure deadlines and quality are met Innovation & Creativity Approach towards repeated work by automating tasks to save design cycle time Participation on technical discussion training forum white paper etc Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong Physical Design / Circuit Design / Analog Layout Knowledged. Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Strong communication skills and ability to interact with team members and clients equally Strong analytical reasoning and problem-solving skills with attention to details Ability to understand the standard specs and functional documents Ability to deliver the tasks on-time in a quality fashion per quality guidelines and GANTT Well versed with the available EDA tools and able to use them efficiently Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present at a level needed to execute the project Knowledge Examples Knowledge of project(s) in any of the design by executing – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc. Understanding of the design flow and methodologies used in the designing Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager as per known skills Additional Comments The person should have hands on experience(>8 Yrs.) on full custom Memory design & architectures, Characterization, Layout design, net-listers, complete SRAM Design verification at compiler level (not only at instance level) covering both design and layouts. The person should ensure to populate and publish Execution plan, Design Quality plan, DFMEA, Publish project health along with reporting of any risk and mitigation strategy. “ Skills Memory design and compiler,SRAM design,Design quality plan Show more Show less

About ICE: Intelligent Consulting Engineers (ICE) is an independent BIM and Engineering consultancy based in Finland, India, North America, and Estonia delivering services all over the world. ICE is a team of seasoned Engineers, Architects Modelers and Technicians who apply state-of-the-art techniques along with their diverse experience to deliver impeccable design solutions. With a collective experience of over 1500+ projects spanning Asia, the US, the Middle East, and Europe, our team is adept at understanding clients’ needs and is committed to delivering projects to their satisfaction. Job title: Team Lead – Electrical Design Location- Noida, Mohali 5 days work week- (Monday to Friday) The ideal candidate will bring extensive experience in electrical modeling, design, and drafting, along with strong leadership and communication abilities to guide complex international projects. Must-Have Qualifications & Skills: Excellent Communication Skills – Able to coordinate across multidisciplinary teams and international clients. Bachelor’s Degree in Electrical or Electronics Engineering ⚡ 6+ Years of Experience in BIM with a strong portfolio of delivered projects. Hands-on experience in Modeling & Designing of electrical systems . 🖥️ Expertise in Electrical 3D Modeling, Designing & 2D Drafting .📐 Experience handling Medium & Low Voltage Power Distribution Systems. Strong in electrical Calculations including Transformer sizing, Cable Sizing (TCL), Circuit Breaker selection, and Single Line Diagrams (SLD). 📊 In-depth knowledge of International Electrical Standards: IEC, IEEE, and NFPA-70 .📚 Proficient in developing models from LOD 100 to LOD 500. 🔍 Advanced skills in AutoCAD, Revit MEP, BIM 360, Dialux, and Navisworks. Show more Show less

Business details : HPS - Lifecycle Solutions & Services Position : Sr Advanced Field Service Engr - Services Base Location : Vadodara Description Knowledge of DCS and PLC with a hands-on experience of min. 10 years. Planning and coordination of preventive maintenance / corrective / emergency maintenance visits for customer sites. Knowledge on Honeywell System particularly TDC/TPS/EPKS/ML200/PGM/SM/Network/FGS/DVM is must. Must be willing to operate from Baroda & handling customers near to Baroda based customers. Must be willing to work closely with customers like Vedanta, OPaL, RIL, TCL, GGL, RPL, SRF etc.. to explore additional business opportunities. Must create new revenue stream for LSS from exploring new business opportunity from Non-IB customer nearby that region. Need to have close coordination with ASM-Vadodara/Central team-Pune to ensure successful project execution right from FAT to execution. Need to work closely with Estimation & Sales team based in Pune to ensure reduction in cycle time for quick job closure. Planning and close co-ordination with customer and GTAC to reduce the cycle time of resolution. Also, need to ensure implementation of PAR/BW/PNs for respective sites. Help region to achieve billing and collection target month on month basis. Understand customer needs & extend Service Support at site / remote for prompt issue closure ensuring adherence to Honeywell Process and Quality matrices. Build, Develop & Sustain Customer relationships with effective Customer management. Should be able to plan site visits as per agreed SLAs and in line with the regional/central revenue plan. Resource planning and coordination for executing Service projects and migrations. • Provide technical support to FSE as and when required. Provide technical support for sales offers by providing site data. Ensure weekly, monthly documentation to track contract execution and customer deliverables. Ensure GSM process compliance as per contract terms and ensures team follows the same. Identify prospects, conduct pre-sales site assessment, and develop them into firm leads. Constantly probe opportunities for migrations, add-ons & work seamlessly with customers to reduce their pain areas by pitching-in the right solution ISO, HSE, commercial guidelines and all Honeywell Process compliance is must. Be a single point contact for all customer needs for designated customers.Engineer is expected to carry out preventive maintenance / corrective / emergency as & when required. maintenance visits at customer sites on DCS/PLC/SCADA systems. Documentation - 50 % documentation is involved Matured skills in independent troubleshooting / problem resolution on these platforms. Required travel 60% to 70% of the time anywhere in India. Be available 24X7 for support during exigencies. Executing Service projects and migrations Identify prospects, conduct pre-sales site assessment, and develop them into firm leads. Constantly probe opportunities for migrations, add-ons & work seamlessly with customers to reduce their pain areas by pitching-in the right solution Be a single point contact for all customer needs for designated customers. Other Mandatory Condition Must possess Leadership quality & handle team of 4-6 engineers. Ready to work on other Vadodara region sites including some part of MP. Office Process should be followed timely and accurately. Politeness and good communication skills are required during interactions. Leave process and frequency should be followed as per the standard regional process. Show more Show less

Location:Pan India Experience : 2 -15 yrs Skill: Enovia Desired Skill Sets: 1.PLM domain Experience 2.Experience in ENOVIA Product development, Customization 3.Experience with JPO/JSP/Spinner based customizations 4.Experience with MQL and TCL 5.Experience with ENOVIA 3DEXPERIENCE upgrade process, server configurations 6.Experience in Core Java, J2EE, JSP, Servlets, Java Script, jQuery, ENOVIA ADK, Java API and RESTful web services 7.Good working knowledge in Engineering / Program / Configuration Central 8.Experience of Technia tools / TVC will be an added advantage 9.Should have strong inter-personal skills, should be able to work in tight deadlines Interested can share your resume to sangeetha.spstaffing@gmail.com with below inline details. Full Name as per PAN: Mobile No: Alt No/ Whatsapp No: Total Exp: Rel Exp in Enovia Customization: Rel Exp in JPO/MQL/TCL/JSP: Rel Exp in Java/J2EE: Current CTC: Expected CTC: Notice Period (Official): Notice Period (Negotiable)/Reason: Date of Birth: PAN number: Reason for Job Change: Offer in Pipeline (Current Status): Availability for Virtual interview on 9th May between 10 AM- 4 PM(plz mention time): Current Res Location: Preferred Job Location: Whether educational % in 10th std, 12th std, UG is all above 50%? Do you have any gaps in between your education or Career? If having gap, please mention the duration in months/year:

Job Summary JOB DESCRIPTION If you are a graduate looking for an opportunity to build career in Cybersecurity domain, Emerson has an exciting opportunity for you! Based in our Pune, India location, you will be a member of a collaborative product Security group. You will have the opportunity to learn product Security and work with global technical leadership teams for product Security for Emerson business units located across the globe. You’ll be employed for Emerson Innovation Centre, Pune (EICP) In This Role, Your Responsibilities Will Be: Perform Vulnerability Analysis and Penetration testing of Web / Thick client / Mobile applications used in critical infrastructure Perform protocol fuzz Testing of industrial communication protocol Provide appropriate mitigation actions for the identified vulnerabilities to development team Work closely with development team to validate and strengthen security controls. Who You Are: You will quickly learn the dynamic and fast changing security area under mentorship of senior resources and build skillset to deliver results independently by the end of training period. For This Role, You Will Need: Familiar with different security pen test tools like Burp Suite, Kali Linux, DAST like App Scanner or similar other tools widely used for Penetration Test. Understanding of security protocols (HTTPS, HSTS, TLS, SSH). Strong learning agility and commitment to learn. Good analytical skills and decision-making capabilities. Proven verbal and written communications. Knowledge of scripting language (TCL, Perl, Python, Shell etc.) for exploit development. Familiar with OWASP Top10 and IEC62443 standard Preferred Qualifications that Set You Apart: BCA / BSC-Computer Science completed in 2024 or due to complete by June 2025 from reputed institute. Cybersecurity training / Certification will have added advantage. Our Culture & Commitment to You At Emerson, we prioritize a workplace where every employee is valued, respected, and empowered to grow. We foster an environment that encourages innovation, collaboration, and diverse perspectives—because we know that great ideas come from great teams. Our commitment to ongoing career development and growing an inclusive culture ensures you have the support to thrive. Whether through mentorship, training, or leadership opportunities, we invest in your success so you can make a lasting impact. We believe diverse teams, working together are key to driving growth and delivering business results. We recognize the importance of employee wellbeing. We prioritize providing competitive benefits plans, a variety of medical insurance plans, Employee Assistance Program, employee resource groups, recognition, and much more. Our culture offers flexible time off plans, including paid parental leave (maternal and paternal), vacation and holiday leave. About Us WHY EMERSON Our Commitment to Our People At Emerson, we are motivated by a spirit of collaboration that helps our diverse, multicultural teams across the world drive innovation that makes the world healthier, safer, smarter, and more sustainable. And we want you to join us in our bold aspiration. We have built an engaged community of inquisitive, dedicated people who thrive knowing they are welcomed, trusted, celebrated, and empowered to solve the world’s most complex problems — for our customers, our communities, and the planet. You’ll contribute to this vital work while further developing your skills through our award-winning employee development programs. We are a proud corporate citizen in every city where we operate and are committed to our people, our communities, and the world at large. We take this responsibility seriously and strive to make a positive impact through every endeavor. At Emerson, you’ll see firsthand that our people are at the center of everything we do. So, let’s go. Let’s think differently. Learn, collaborate, and grow. Seek opportunity. Push boundaries. Be empowered to make things better. Speed up to break through. Let’s go, together. Accessibility Assistance or Accommodation If you have a disability and are having difficulty accessing or using this website to apply for a position, please contact: idisability.administrator@emerson.com . About Emerson Emerson is a global leader in automation technology and software. Through our deep domain expertise and legacy of flawless execution, Emerson helps customers in critical industries like life sciences, energy, power and renewables, chemical and advanced factory automation operate more sustainably while improving productivity, energy security and reliability. With global operations and a comprehensive portfolio of software and technology, we are helping companies implement digital transformation to measurably improve their operations, conserve valuable resources and enhance their safety. We offer equitable opportunities, celebrate diversity, and embrace challenges with confidence that, together, we can make an impact across a broad spectrum of countries and industries. Whether you’re an established professional looking for a career change, an undergraduate student exploring possibilities, or a recent graduate with an advanced degree, you’ll find your chance to make a difference with Emerson. Join our team – let’s go! No calls or agencies please. Show more Show less

TECHNICAL LEAD – DFT SmartSoC is looking for a smart and enterprising leader with expert knowledge in DFT to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking. You will be responsible for leading and managing a team, client communication, and project execution. Job Responsibilities- Lead an internal DFT team, executing projects for an offshore client Manage the team and their technical and leadership growth Manage all interactions with the client Desired Skills and Experience- 7+ years of experience in DFT, mainly Scan Architecture, ATPG & MBIST Experience in planning scan chains, running scan insertion flow Experience in latest Cadence tool set Genus & Modus Experience in ATPG for Stuck@, TFT, IDDQ & Path delay faults with tough coverage targets Experience in MBIST architecture, generation and implementation Experience in AECQ100 requirement standard is a big plus Experience in working with a multi-site team is a big plus Experience in working on critical time-bound projects is a big plus Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas Location - Bengaluru,Chennai,Hyderabad,Noida

SR. DFT ENGINEER SmartSoC is looking for expert DFT engineers for the development, support, maintenance, Implementation, and Testing of complex components of an ASIC/SOC/FPGA/Board. Desired Skills and Experience- 3 – 10year’s experience in DFT Good experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. DFT logic integration and verification. Experience in debugging low coverage and DRC fixes Gate Level ATPG simulation with and without timing. Pattern generation, verification, and delivery to ATE team. Post silicon debug and support on failing patterns. Good experience with tools from Mentor/Synopsis/Cadence. LBIST experience is plus. DFT mode STA and timing closure support. Familiarity with Verilog and RTL simulation Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas Location - Bengaluru,Chennai,Hyderabad,Noida