Who We Are Applied Materials is the global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips- the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world- like AI and IoT. If you want to work beyond the cutting-edge, continuously pushing the boundaries of"science and engineering to make possible"the next generations of technology, join us to Make Possible® a Better Future. What We Offer Location: Bangalore,IND At Applied, we prioritize the well-being of you and your family and encourage you to bring your best self to work. Your happiness, health, and resiliency are at the core of our benefits and wellness programs. Our robust total rewards package makes it easier to take care of your whole self and your whole family. Were committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits . Youll also benefit from a supportive work culture that encourages you to learn, develop and grow your career as you take on challenges and drive innovative solutions for our customers."We empower our team to push the boundaries of what is possible"”while learning every day in a supportive leading global company. Visit our Careers website to learn more about careers at Applied. Applied Materials is the leader in materials engineering solutions to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. Our innovations make possible„¢ the technology shaping the future. To achieve this, we employ some of the best, brightest, and most talented people in the world who work together as part of a winning team. Key Responsibilities Expertise in PDK enablement and library validation/automation. Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies Design/System level experience with DTCO and PPA analysis Hands-on expertise in TCL, Python, make and shell scripting Broad understanding of system design (product architecture, packaging, SRAM, DRAM, etc.) is a plus Strong understanding of the RTL2GDS concepts and methodology and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus) Knowledge of standard cell architecture and design tradeoffs with respect to PPA Proactively identify and act on new trends or developments in future technology nodes Ability to implement solutions and troubleshoot complex problems with limited or no supervision in area of expertise Creative thinking and ability to look ahead and anticipating future technology innovations/issues Ability to collaborate with internal stakeholders, customers and vendors Collaborate/participate in discussions to solve interdisciplinary technical issues in a cross-functional team environment Mandatory - PDK, DRC, LVS, Python, Physical Design Functional Knowledge Demonstrates depth and/or breadth of expertise in own specialized discipline or field Business Expertise Interprets internal/external business challenges and recommends best practices to improve products, processes or services Leadership May lead functional teams or projects with moderate resource requirements, risk, and/or complexity Problem Solving Leads others to solve complex problems; uses sophisticated analytical thought to exercise judgment and identify innovative solutions Impact Impacts the achievement of customer, operational, project or service objectives; work is guided by functional policies interpersonal Skills Communicates difficult concepts and negotiates with others to adopt a different point of view Additional Information Time Type: Full time Employee Type: Assignee / Regular Travel: Yes, 10% of the Time Relocation Eligible: Yes Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.

Who We Are Applied Materials is the global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips- the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world- like AI and IoT. If you want to work beyond the cutting-edge, continuously pushing the boundaries of"science and engineering to make possible"the next generations of technology, join us to Make Possible® a Better Future. What We Offer Location: Bangalore,IND At Applied, we prioritize the well-being of you and your family and encourage you to bring your best self to work. Your happiness, health, and resiliency are at the core of our benefits and wellness programs. Our robust total rewards package makes it easier to take care of your whole self and your whole family. Were committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits . Youll also benefit from a supportive work culture that encourages you to learn, develop and grow your career as you take on challenges and drive innovative solutions for our customers."We empower our team to push the boundaries of what is possible"”while learning every day in a supportive leading global company. Visit our Careers website to learn more about careers at Applied. Key Responsibilities: Understand and Enhance Existing FPGA Architecture: Analyze and comprehend current FPGA designs and architectures. Identify areas for improvement and optimization within existing systems. Implement enhancements to improve performance, efficiency, and functionality. Develop Modular Architectural Approaches with a Focus on Testability: Design modular FPGA architectures to facilitate ease of testing and integration. Ensure that new designs are scalable and maintainable. Incorporate best practices for testability into the design process. Collaborate with Software, Hardware, and System Teams: Work closely with cross-functional teams to ensure FPGA designs meet system requirements. Communicate effectively with software developers, hardware engineers, and system architects. Participate in design reviews and provide feedback to other team members. Develop RTL Code, Perform Logic Synthesis, Timing Analysis, and Timing Closure: Write and optimize RTL (Register Transfer Level) code for FPGA designs. Conduct logic synthesis to translate RTL code into gate-level designs. Perform timing analysis to ensure designs meet timing constraints and achieve timing closure. Create Test Benches and Simulation Tools for Verification: Develop comprehensive test benches to verify the functionality and performance of FPGA designs. Utilize simulation tools to test and validate designs before implementation. Debug and resolve issues identified during the verification process. Troubleshoot and Improve Building Block Modules: Identify and resolve problems in FPGA modules to enhance performance and reliability . Continuously improve the design and functionality of FPGA building blocks. Document troubleshooting processes and solutions for future reference. Qualifications: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. Proficiency in hardware description languages such as VHDL or Verilog. Experience with FPGA design tools and platforms (e.g., Xilinx Vivado, Altera Quartus). Strong understanding of digital design principles and practices. Excellent problem-solving skills and attention to detail. Ability to work collaboratively in a team environment and communicate effectively with diverse teams. Preferred Skills: Experience with high-speed digital design and signal processing. Familiarity with scripting languages (e.g., Python, Tcl) for automation tasks. Knowledge of system-level integration and testing methodologies. Experience in low-power design techniques and optimizations. The role of an FPGA engineer is dynamic and requires a strong technical foundation, creativity in design, and the ability to work well within a multidisciplinary team to develop cutting-edge digital systems. Top of Form Additional Information Time Type: Full time Employee Type: Assignee / Regular Travel: Yes, 10% of the Time Relocation Eligible: Yes Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.

Software Quality Assurance (SQA) /System Test Engineer Description We are seeking a Software SQA/System Test Engineer to join our growing team and participate in the development of a state-of-the-art digital lithography tool. The successful candidate will help drive our software and system quality by working with both the software and hardware teams on the development of Test Plans, tests, and methodologies for finding problems before they surface. Key Responsibilities Contribution to the SQA function and infrastructure for the Digital Lithography group Develop and conduct tests in the lab to validate the functionality of various software features and printed circuit boards Review SW requirements, and functional Specifications and develop detailed, comprehensive test plans and test cases. Facilitate reviews of test plans and test execution results Develop and apply testing processes for new and existing functionality to meet release quality. Integration of software tests into the Automation test framework and documentation of the system/board test procedures Analysis of quality results and directions for process and product improvement Education: BE/MS degree in Computer Science, EE, or related field. Years of Experience: 2 -4 Years Qualifications 2 to 4 years experience in hands-on SQA development. 2+ years experience with system-level and/or hardware board test Proven work experience in software quality assurance Experience with Linux-based embedded systems is required Experience in developing tests and test automation tools in Python, TCL and shell scripting. Some experience in automation framework development is desirable Experience with DB. Experience in C++/C#. More than 3 years experience (Semi conductor manufacturing preferred). Experience using software tools and scripts to test hardware boards and systems Familiarity with digital circuits and communication protocols like I2C and SPI Experience in manufacturing automation and machine control industry is desirable Excellent communication and process documentation skills for developing test methodologies while working with software and hardware developers Qualifications Education: Bachelor's Degree Skills: Certifications: Languages: Years of Experience: 7 - 10 Years Work Experience: Additional Information Time Type: Full time Employee Type: Assignee / Regular Travel: Yes, 10% of the Time Relocation Eligible: Yes Applied Materials is an Equal Opportunity Employer committed to diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

We are seeking highly motivated DFT engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation, and delivery of DFT patterns for IBM’s microprocessor chip design team. As a member of DFT team, you will be required but not restricted to pattern generation, simulation, validation, characterization, delivery to TAE, IBM’s Hardware Bring-up and Silicon Debug Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4-9 years experience in DFT on complex designs involving scan insertion, compression, MBIST, ATPG, simulations and IP integration and validation. Proven expertise in analysing and resolving DRCs/TSVs . Hands-on experience in pattern generation for various fault models, pattern retargeting and debugging techniques to address low coverage issues. Hands-on experience with Gate-Level DFT verification, both with and without timing annotations. Well versed with industry standard test techniques and advanced DFT features like SSN, IJTAG, IEEE 1500, Boundary scan , LBIST and STA constraint delivery . Hands on experience on industry standard tools used for DFT features Proficiency in scripting languages such as TCL, Perl or Python to automate design and testing tasks. Worked with cross functional teams like design, STA & tester teams for ensuring top quality of DFT deliverables and DFT support and hand offs. Excellent analytical and problem-solving skills, with a keen attention to detail. Strong communication and collaboration skills, with the ability to work effectively within cross-functional teams Preferred technical and professional experience Experience working with ATE engineers for silicon bring up, silicon debug and validation. Experience in processor flow and post silicon validation

Category Engineering Hire Type Employee Job ID 9746 Remote Eligible No Date Posted 27/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performan ce silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled ASIC Digital Design Engineer with a strong foundation in both analog and digital CMOS circuit designs. You thrive in dynamic environments and are adept at working with Verilog/System Verilog languages and methodologies such as VMM and UVM. You have a knack for writing and modifying test cases, checkers, and scoreboards within a system Verilog-based test environment. Your expertise extends to AMS verification, particularly in high-speed SerDes designs supporting multi-protocol s. Familiarity with Synopsys analog mixed-signal design tools and modeling languages like Verilog-A/AMS is a plus. You are proficient in programming/sc ripting languages like TCL, Perl, and Python, and have experience working with Linux. Your excellent communication skills and ability to take ownership of projects ensure that you meet deadlines and exceed expectations. Self-organizat ion is second nature to you, allowing you to manage time effectively and contribute meaningfully to your team's success. What You’ll Be Doing: Defining and developing ASIC RTL design and verification at both chip and block levels. Writing and modifying test cases, checkers, and scoreboards in a system Verilog-based test environment. Collaborating with cross-function al teams to ensure seamless integration of analog and digital components. Conducting AMS verification, particularly for high-speed SerDes designs supporting multi-protocol s. Utilizing Synopsys analog mixed-signal design tools for efficient design and verification processes. Programming and scripting using TCL, Perl, and Python to automate and streamline workflows. The Impact You Will Have: Enhancing the performance and reliability of our high-performan ce silicon chips. Contributing to the development of innovative technologies that drive the Era of Pervasive Intelligence. Improving the efficiency and effectiveness of our design and verification processes. Ensuring the seamless integration of analog and digital components in our products. Supporting the creation of cutting-edge solutions for self-driving cars, learning machines, and more. Driving continuous technological innovation within Synopsys and the broader industry. What You’ll Need: Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/ Microelectroni cs Knowledge or hands-on expertise/anal ysis of Analog and digital CMOS circuit designs Knowledge on electrical circuit networks and analysis Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment AMS verification experience in high speed Serdes designs supporting multi-protocol s is an advantage. Experience with the Synopsys Analog mixed-signal design tool set is an advantage. Modelling languages Verilog-a/ams can be an advantage Programming/sc ripting know-how e. g. tcl, perl, python Experience with Linux Good communication skills, ability to take ownership Self-organized to ensure that project timescales are met Who You Are: Excellent communicator with strong interpersonal skills. Proactive and able to take ownership of projects. Self-organized and capable of managing time effectively. Collaborative team player who thrives in a dynamic environment. Detail-oriente d and committed to delivering high-quality results. The Team You’ll Be A Part Of: You will join a dynamic team of engineers focused on pushing the boundaries of ASIC digital design and verification. Our team values collaboration, innovation, and continuous improvement, working together to create cutting-edge solutions that drive the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Senior RTL Design & Validation Engineer Hyderabad, India Engineering 65747 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER As a member of the AECG Product Validation and Solutions Teams within AMD you will develop and enable the next generation of PCIe technologies to power datacenter, acceleration, AI and communications markets. High speed PCIe connectivity is critical for modern technology and infrastructure that helps improve our lives. THE ROLE: At AMD you will help create leading edge PCIe technologies used in a wide variety of applications. The focus of this role is to design, plan and execute RTL design for new and existing PCIe technology and solutions for programmable silicon at AMD. Key development includes PCIe technologies for PCIe Gen 6, CXL, TDISP, IDE, PCIe in-line DMA and other leading edge products. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. You should also have a desire to expand existing skill sets and take on new challenges. KEY RESPONSIBILITIES: Develop and productize next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, AI and communications markets Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for IPs Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans Pre-Silicon and Post Silicon validation for new PCIe enabled blocks Responsible for IP design, Silicon bring up, Validation and IP release Work in collaboration with the Global teams PREFERRED EXPERIENCE: Strong knowledge in RTL coding, preferably with Verilog and SystemVerilog Proficient in RTL simulation tools (VCS, Modelsim) Knowledge of high-speed interfaces including, PCIe, CXL, Ethernet, DDR3/4/5, LPDDR3/4, HBM, AMBA AXI/AHB/APB protocol Experience in using Lab equipment like PCIe Lecroy/Viavi Exerciser/Analyzer Experience in developing system or IP prototypes using FPGAs Strong knowledge of IP/SOC design methodologies Experience with scripting languages including Tcl, Perl, Python, Unix shells and Makefiles Knowledge of C/C++ is an added advantage ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering with 8+Yrs of exp #LI-SR4 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 9914 Date posted 03/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for developing and validating Process Design Kits (PDKs) for cutting-edge custom design platforms. With a robust background in CAD engineering and a deep understanding of the design process, you thrive in collaborative environments and excel at problem-solving. Your expertise in scripting languages such as Python, Tcl, and UNIX, coupled with your strong communication skills, makes you an invaluable asset to any team. You are adaptable, capable of handling complex projects, and are always eager to network with senior internal and external personnel. Your ability to coach and mentor junior peers, along with your readiness to tackle demanding situations, sets you apart as a leader in your field. What You’ll Be Doing: Developing and validating Process Design Kits (PDKs) for Synopsys Custom Design platform. Supporting internal and external customers on previously developed PDKs. Interacting with customers to gather data and specifications, and managing project deliverables. Collaborating with cross-functional teams to test and implement custom tool adjacencies such as Physical Verification, Parasitic Extraction, and Design Enablement. Coaching other PDK developers to build quality, design-ready PDKs for Custom Compiler users. Engaging with various stakeholders to enable feature-rich iPDKs. The Impact You Will Have: Enhancing the efficiency and quality of PDKs, ensuring they meet the high standards required for advanced custom design. Contributing to the successful deployment and optimization of Synopsys Custom Design platforms. Supporting the seamless integration of advanced design tools, improving the overall user experience for customers. Driving innovation by ensuring PDKs are equipped with the latest features and technologies. Mentoring and developing the next generation of PDK developers, fostering a culture of excellence and continuous improvement. Strengthening Synopsys' position as a leader in the semiconductor industry through high-quality, reliable PDK solutions. What You’ll Need: BS with 5+ years of relevant experience or MS with 4+ years of experience. Basic overall understanding of the design process. Expert knowledge of scripting languages such as Python, Tcl, and UNIX. Strong problem-solving and debugging skills. Experience in executing projects from start to completion, handling complex projects, and identifying best practices. Who You Are: A collaborative team player with strong communication skills. A proactive and adaptable individual, capable of working under stress and managing demanding situations. A mentor and coach to junior peers, guiding them to achieve their best. An innovative thinker with a passion for continuous improvement and excellence. The Team You’ll Be A Part Of: You will be part of a dynamic team focused on the development of Process Design Kits for Synopsys Custom Design platform. This team collaborates with cross-functional teams to ensure the seamless integration and optimization of custom design tools, driving innovation and excellence in the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: MTS SILICON DESIGN ENGINEER As a member of the AECG Product Validation and Solutions Teams within AMD you will develop and enable the next generation of PCIe technologies to power datacenter, acceleration, AI and communications markets. High speed PCIe connectivity is critical for modern technology and infrastructure that helps improve our lives. THE ROLE: At AMD you will help create leading edge PCIe technologies used in a wide variety of applications. The focus of this role is to design, plan and execute RTL design for new and existing PCIe technology and solutions for programmable silicon at AMD. Key development includes PCIe technologies for PCIe Gen 6, CXL, TDISP, IDE, PCIe in-line DMA and other leading edge products. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. You should also have a desire to expand existing skill sets and take on new challenges. KEY RESPONSIBILITIES: Develop and productize next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, AI and communications markets Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for IPs Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans Pre-Silicon and Post Silicon validation for new PCIe enabled blocks Responsible for IP design, Silicon bring up, Validation and IP release Work in collaboration with the Global teams PREFERRED EXPERIENCE: Strong knowledge in RTL coding, preferably with Verilog and SystemVerilog Proficient in RTL simulation tools (VCS, Modelsim) Knowledge of high-speed interfaces including, PCIe, CXL, Ethernet, DDR3/4/5, LPDDR3/4, HBM, AMBA AXI/AHB/APB protocol Experience in using Lab equipment like PCIe Lecroy/Viavi Exerciser/Analyzer Experience in developing system or IP prototypes using FPGAs Strong knowledge of IP/SOC design methodologies Experience with scripting languages including Tcl, Perl, Python, Unix shells and Makefiles Knowledge of C/C++ is an added advantage ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering with 8+Yrs of exp #LI-SR4 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Category Engineering Hire Type Employee Job ID 7644 Remote Eligible No Date Posted 02/03/2025 Job Title: Analog/Mixed-Signal Layout Methodology Engineer Company: Synopsys Role Description: Synopsys, at the forefront of technological innovation, is seeking an Analog/Mixed-Signal Layout Methodology Engineer. As a member of our Mixed Signal IP Methodology Team, you will work with the most advanced chip design technologies and tools. You will collaborate with local and global teams to develop capabilities that improve the time-to-market of complex mixed-signal designs in the latest technology nodes. This role offers the opportunity to lead technical projects, coordinate with other team members, and develop our best-in-class utilities. Key Responsibilities: Propose and develop innovative methodologies to accelerate layout development without compromising quality. Collaborate with cross-teams in the enablement of advanced technology nodes. Measure project performance using appropriate systems, tools, and techniques. Establish and maintain relationships with cross-functional teams, internal and external customers. Create and maintain comprehensive methodology and workflow documentation. Key Qualifications: Familiarity with the physical design of analog and mixed-signal CMOS circuits. Proficiency in TCL and/or Python. Understanding of the full design cycle from RTL to GDSII, including chip level. Excellent communication skills. Strong organizational skills, attention to detail, and multi-tasking abilities. Experience with advanced FinFET nodes, TSMC 16 nanometer and below. Familiarity with Design tools such as Custom Compiler, Cadence Virtuoso, or equivalent. Knowledge of Verification tools like ICV, Calibre. Experience working with Jira/Atlassian or similar tools. Strong working knowledge of MS Office Suite of applications. Preferred Experience and Requirements: MSEE or BSEE with a minimum of 3 years of related experience. Previous analog layout physical design experience. Join us to contribute to the evolution of technology and leave your mark on the semiconductor industry. Contact us today to learn more about this exciting opportunity! At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 6998 Remote Eligible No Date Posted 22/10/2024 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled ASIC Digital Design Engineer with a strong foundation in both analog and digital CMOS circuit designs. You thrive in dynamic environments and are adept at working with Verilog/System Verilog languages and methodologies such as VMM and UVM. You have a knack for writing and modifying test cases, checkers, and scoreboards within a system Verilog-based test environment. Your expertise extends to AMS verification, particularly in high-speed SerDes designs supporting multi-protocols. Familiarity with Synopsys analog mixed-signal design tools and modeling languages like Verilog-A/AMS is a plus. You are proficient in programming/scripting languages like TCL, Perl, and Python, and have experience working with Linux. Your excellent communication skills and ability to take ownership of projects ensure that you meet deadlines and exceed expectations. Self-organization is second nature to you, allowing you to manage time effectively and contribute meaningfully to your team's success. What You’ll Be Doing: Defining and developing ASIC RTL design and verification at both chip and block levels. Writing and modifying test cases, checkers, and scoreboards in a system Verilog-based test environment. Collaborating with cross-functional teams to ensure seamless integration of analog and digital components. Conducting AMS verification, particularly for high-speed SerDes designs supporting multi-protocols. Utilizing Synopsys analog mixed-signal design tools for efficient design and verification processes. Programming and scripting using TCL, Perl, and Python to automate and streamline workflows. The Impact You Will Have: Enhancing the performance and reliability of our high-performance silicon chips. Contributing to the development of innovative technologies that drive the Era of Pervasive Intelligence. Improving the efficiency and effectiveness of our design and verification processes. Ensuring the seamless integration of analog and digital components in our products. Supporting the creation of cutting-edge solutions for self-driving cars, learning machines, and more. Driving continuous technological innovation within Synopsys and the broader industry. What You’ll Need: Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/ Microelectronics Knowledge or hands-on expertise/analysis of Analog and digital CMOS circuit designs Knowledge on electrical circuit networks and analysis Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment AMS verification experience in high speed Serdes designs supporting multi-protocols is an advantage. Experience with the Synopsys Analog mixed-signal design tool set is an advantage. Modelling languages Verilog-a/ams can be an advantage Programming/scripting know-how e. g. tcl, perl, python Experience with Linux Good communication skills, ability to take ownership Self-organized to ensure that project timescales are met Who You Are: Excellent communicator with strong interpersonal skills. Proactive and able to take ownership of projects. Self-organized and capable of managing time effectively. Collaborative team player who thrives in a dynamic environment. Detail-oriented and committed to delivering high-quality results. The Team You’ll Be A Part Of: You will join a dynamic team of engineers focused on pushing the boundaries of ASIC digital design and verification. Our team values collaboration, innovation, and continuous improvement, working together to create cutting-edge solutions that drive the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 5823 Remote Eligible No Date Posted 24/02/2025 In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team developing high speed analog integrated circuits in the latest FinFET process nodes. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team Experience in design of Charge-pump PLLs, Fractional-N PLLs, DLL design techniques, LDO design techniques Hands-on experience on designing charge pumps, LC VCOs, Ring oscillators, phase interpolator, bandgap reference, etc. In depth familiarity with transistor level circuit design at SPICE netlist level and should be capable to develop SPICE verification testbench Design exposure in advanced process nodes (FinFETs) Hands on experience with industry standard tools (Cadence, Synopsys, Mentor) for schematic capture spice simulations. Familiarity with automation / Scripting language (TCL, Python, PERL). Experience optimizing CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of device mismatch and proximity effects. understanding of ESD issues and reliability issues Looking for 1-2 years of experience in Analog design with master's degree or 2-4 years of experience in in Analog design with bachelor's degree In depth familiarity with transistor level circuit design - sound CMOS design fundamentals. Silicon-proven experience implementing circuits for the PLL within Highspeed SerDes At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 4806 Remote Eligible No Date Posted 12/11/2024 Alternate Job Titles: Senior Analog Design Engineer Senior SERDES Engineer Senior Mixed-Signal Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated Analog Design Engineer with a passion for developing high-speed analog integrated circuits. You thrive in a collaborative environment and enjoy working with cross-functional teams to achieve design success. You possess a deep understanding of transistor-level circuit design and have hands-on experience with SERDES IP development. Your expertise in CMOS design fundamentals and familiarity with SERDES sub-circuits, such as TX, RX, adaptive equalizers, PLL, DLL, ADC, BGR, and regulators, makes you an ideal candidate for this role. You are aware of ESD issues and have a sound knowledge of custom digital design, design for reliability, and layout effects. You are proficient in using custom design tools and have experience with scripting for post-processing simulation results. Your excellent communication and documentation skills enable you to effectively convey complex technical information to various stakeholders. What You’ll Be Doing: Designing, developing, troubleshooting, and debugging multi-Gb/s SERDES IP. Working from SerDes standards to block specifications to identify potential circuit architectures and successful design strategies. Collaborating with a cross-functional design team of analog and digital designers from diverse backgrounds. Utilizing a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team. Ensuring designs meet performance, reliability, and manufacturability requirements. Documenting design processes and results for knowledge sharing and future reference. The Impact You Will Have: Contributing to the development of cutting-edge high-speed analog integrated circuits. Enhancing the performance and reliability of SERDES IP used in various high-tech applications. Driving innovation in analog and mixed-signal design methodologies. Collaborating with a talented team to deliver world-class design solutions. Supporting the growth and success of Synopsys' analog and mixed-signal R&D initiatives. Ensuring the seamless integration of analog and digital components in complex systems. What You’ll Need: In-depth familiarity with transistor-level circuit design and CMOS design fundamentals. Exposure to SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, ADC, BGR, regulators). Awareness of ESD issues and circuit techniques for mitigation. Familiarity with custom digital design for high-speed logic paths. Knowledge of design for reliability (e.g., EM, IR, aging) and layout effects (e.g., matching, reliability, proximity effects). Proficiency with custom design tools such as Cadence, HSPICE, HSIM, and Ultrasim. Experience with scripting languages for post-processing simulation results (e.g., TCL, PERL, MATLAB). Understanding of system-level budgeting for jitter, amplitude, noise, etc. Awareness of signal integrity issues, including packaging effects, board parasitics, crosstalk, and noise. Who You Are: A collaborative team player who excels in a cross-functional environment. A problem solver with strong analytical skills and attention to detail. An effective communicator with excellent documentation skills. A self-motivated individual with a passion for continuous learning and innovation. Adaptable and able to thrive in a fast-paced, dynamic work environment. The Team You’ll Be A Part Of: You will be part of a fast-growing analog and mixed-signal R&D team dedicated to developing high-speed analog integrated circuits. Our team consists of talented analog and digital designers from diverse backgrounds, working collaboratively to achieve design excellence. We leverage a best-in-class environment with a comprehensive suite of IC design tools, supported by an experienced software/CAD team, to drive innovation and deliver cutting-edge solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9332 Remote Eligible No Date Posted 06/02/2025 Applications Engineer position offers a wonderful opportunity to work on most challenging technical problems in verification domain and innovative technologies under Synopsys Verification Platform. Looking for an experienced and motivated professional who enjoys problem solving, open to continuous learning, passionate to work on cutting edge technologies and has excellent communication skills. It gives exposure to the breadth of HDL/HVL, methodologies, static and formal verification, dynamic simulation aspects including debug and experience in working in a diverse environment where interaction with domain experts across global locations will be involved. Key Requirements Experience: Bachelor’s degree in Electronics with 7+ Years’ or Master’s degree in Electronics with 5+ Years' Experience in verification technologies (Simulation, UVM, SVA, LRM understanding) Strong HDL language support (Verilog, VHDL, System Verilog) Simulation, UVM, Design Verification Digital design fundamental and RTL coding understanding Good Debugging skills. Scripting – Perl, TCL, Make, Shell Scripting. Role - VCS Simulation Technology Product Engineer Solid fundamentals in Digital design, HDLs (Verilog/VHDL) and System Verilog Exposure to Synopsys EDA tools (SpyGlass, VC SpyGlass, Verdi) would be added advantage Excellent written and oral communication skills is a must as the role requires interfacing global teams, proposing solutions Must have working knowledge on UNIX, TCL and/or any other scripting language to be effective Team player, partners with multiple stakeholders, has attention to detail and innovative mindset Motivated, doer and self-organized team worker with good social communication skills Open to travel, ability to multi-task, be detail-oriented Drive VCS/related technology customer deployment working closely with field and R&D Drive competitive engagements, requirements gathering for delivery strong product roadmap Work directly with R&D, Product Validation & Customers to suggest improvements in implementation and validation Use in-depth product understanding to provide technical expertise, diagnose, troubleshoot issues At Synopsys, we’re at the heart of the innovations that positively impact the world. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you echo our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

About the role As a Staff DevOps Engineer focused on Site Reliability within Infrastructure Engineering and Cloud Operations (IECO), you will contribute to the development of our solution delivery platforms supporting our web-based applications on the latest cloud technologies within a DevSecOps culture. You will have the opportunity to utilize automation technologies and private/public cloud technologies to provide world-class solutions that serve the non-profit industry. What you'll do Build automation leveraging CI/CD processes, automated testing, unit testing, code coverage and other software development best practices Contribute to reusable automation scripts, libraries, services, and tools to increase system and process efficiencies Partnering with the security teams and tools to continually review and understand new industry security threats, associated technologies and quickly addressing vulnerabilities Pursue opportunities to further operational excellence by increasing efficiency and reducing risk, complexity, waste and cost Partner with key stakeholders to establish technical direction and negotiate technical decision points to drive innovative solutions Drive technical design and validation, while ensuring implementation aligns with our technical strategies and strategic business goals Develop architectural designs for applications building something to delight clients while managing costs to deliver these applications What you’ll bring 2+ years of experience with common web technologies required – Javascript, C#, .NET, HTML, AJAX or other equivalent Object-Oriented language 2+ years of experience in the implementation of cloud technologies (Microsoft Azure) and an understanding of SAAS, PAAS, and IAAS models Experience building high performance, scalable, robust, 24x7 environments and/or applications Experience creating scripts or automation, such as Perl, PowerShell, Python, TCL/TK, Ruby or similar for cloud orchestration required (PowerShell preferred) Available on a 24x7x365 basis when needed for production impacting incidents or key customer events Ability to develop quality code that is secure and operable at scale Stay up to date on everything Blackbaud, Blackbaud is a digital-first company which embraces a flexible remote or hybrid work culture. Blackbaud supports hiring and career development for all roles from the location you are in today! Blackbaud is proud to be an equal opportunity employer and is committed to maintaining an inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, physical or mental disability, age, or veteran status or any other basis protected by federal, state, or local law.

Category Engineering Hire Type Employee Job ID 8943 Remote Eligible No Date Posted 28/01/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As a seasoned professional in analog IC design, you possess a deep understanding and hands-on experience with high-speed designs and FinFET technologies. You have a proven track record of working with Multi-Gbps NRZ & PAM4 SERDES IP and are familiar with various SerDes sub-circuits. Your expertise in transistor-level circuit design, combined with your strong analytical skills, equips you to tackle architectural bottlenecks and drive significant improvements in power, area, and performance. With excellent communication and documentation skills, you excel in presenting complex simulation data and collaborating with cross-functional teams. You are passionate about innovation and continuously seek to enhance design efficiency and quality through meticulous oversight of physical layouts and a keen awareness of design for reliability and signal integrity issues. What You’ll Be Doing: Review SerDes standards to develop novel transceiver architectures and sub-block specifications. Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets. Work across project and department teams to streamline design and verification strategies ensuring overall design quality, efficiency, and performance. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present and review simulation data from internal project teams; present results externally at industry panels or customer reviews. Document design features and test plans; consult on the overall electrical characterization of the SerDes IP product. Analyze customer silicon data for design enhancements and propose solutions for post-silicon design updates. The Impact You Will Have: Contribute to the development of cutting-edge Multi-Gbps NRZ & PAM4 SERDES IP, shaping the future of high-speed communication technology. Drive revolutionary improvements in power, area, and performance, enhancing the overall efficiency and effectiveness of our designs. Streamline design and verification strategies across teams, fostering a collaborative and innovative work environment. Ensure high-quality design and performance through meticulous oversight of physical layouts and awareness of design for reliability and signal integrity issues. Enhance customer satisfaction by analyzing silicon data and proposing effective design updates. Represent Synopsys at industry panels and customer reviews, showcasing our commitment to excellence and innovation. What You’ll Need: MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical Engineering, Computer Engineering, or a related field. Experience with FinFET technologies and a strong understanding of transistor-level circuit design and CMOS fundamentals. Extensive design experience with high-speed designs, including PAM4 SerDes architectures and various SerDes sub-circuits. Familiarity with tools for schematic entry, physical layout, design verification, and SPICE simulators. Exposure to scripting for post-processing of simulation results (e.g., TCL, PERL, MATLAB). Who You Are: You are a detail-oriented and innovative engineer with a passion for analog IC design. Your strong analytical skills and familiarity with high-speed designs enable you to tackle complex design challenges effectively. You excel in cross-functional teamwork and have excellent communication and documentation skills, making you a valuable contributor to both internal and external stakeholders. Your commitment to continuous improvement and reliability ensures that your designs meet the highest standards of quality and performance. The Team You’ll Be A Part Of: You will join a fast-growing analog and mixed-signal R&D team dedicated to developing high-speed analog integrated circuits in the latest FinFET and gate-all-around process nodes. Our team is composed of talented analog and digital designers from diverse backgrounds, working collaboratively to push the boundaries of innovation. Supported by a best-in-class environment with a full suite of IC design tools and custom in-house tools, our team is committed to delivering cutting-edge solutions that drive technological advancement. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10341 Remote Eligible No Date Posted 26/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and passionate individual with a strong background in semiconductor manufacturing technology and device physics. You hold a PhD in Electrical Engineering or Physics and have a deep understanding of numerical methods. You possess excellent IT skills, particularly in Linux as well as Python and TCL scripting. With at least three years of experience using TCAD simulation tools, you are adept at both pre-sales and post-sales activities, including technical support, customer relationship management, technical training, and presentation delivery. You thrive in a dynamic environment, working closely with R&D, Sales, Marketing, and customers to drive the development and acceptance of cutting-edge TCAD products. What You’ll Be Doing: Serving as the primary technical interface with customers, assisting them in evaluating, using, and ing TCAD tools. Providing technical support, troubleshooting, and resolving complex issues related to TCAD products. Managing new and existing customer relationships, ensuring high levels of customer satisfaction. Preparing and delivering technical training and presentations to customers and internal teams. Conducting beta testing, benchmarking, and onsite evaluations to support product development and customer needs. Collaborating with R&D to specify new features and drive continuous product improvement. The Impact You Will Have: Enhancing customer experience and satisfaction with Synopsys TCAD products. Driving the successful adoption and integration of TCAD tools in leading semiconductor companies. Contributing to the development and refinement of state-of-the-art TCAD tools. Strengthening Synopsys' market position through exceptional technical support and customer engagement. Facilitating knowledge transfer and training to empower customers and internal teams. Playing a key role in the continuous innovation and advancement of semiconductor technology. What You’ll Need: PhD in Electrical Engineering, Physics, or a related field. Strong background in semiconductor manufacturing technology and device physics. Proficiency in numerical methods and simulation tools. Excellent IT skills, particularly in Linux, Python, and TCL scripting. Minimum of three years of experience with TCAD simulation tools. Who You Are: A proactive and customer-oriented professional with excellent communication skills. Detail-oriented with strong problem-solving abilities. A collaborative team player who thrives in a dynamic environment. Adaptable and able to manage multiple priorities effectively. Passionate about technological innovation and continuous learning. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on driving the development and adoption of Synopsys TCAD products. Collaborating closely with R&D, Sales, Marketing, and customers, you will play a crucial role in ensuring the success and continuous improvement of our cutting-edge semiconductor technology solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10885 Remote Eligible No Date Posted 26/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performan ce silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and motivated professional with a passion for solving challenging technical problems in the verification domain. You are open to continuous learning and thrive on working with cutting-edge technologies. You possess excellent communication skills and enjoy collaborating with domain experts across global locations. You have a strong foundation in digital design, HDLs, and System Verilog, and you are proficient in using verification technologies. Your attention to detail and innovative mindset make you a valuable team player who partners effectively with multiple stakeholders. You are s elf-organized, motivated, and capable of multitasking in a dynamic environment. What You’ll Be Doing: Working on challenging technical problems in the verification domain under the Synopsys Verification Platform. Engaging with HDL/HVL methodologies and dynamic simulation aspects, including debugging. Collaborating with global teams to propose and implement solutions. Utilizing your knowledge of UNIX, Tcl, and other scripting languages to enhance productivity. Participating in continuous learning and staying updated with the latest verification technologies. Contributing to a diverse environment and interacting with domain experts across various locations. The Impact You Will Have: Accelerating the design and verification of high-performan ce silicon chips. Enhancing the usability and adoption of Synopsys' verification products and solutions. Optimizing chip designs for power, cost, and performance, thereby reducing project schedules. Driving technological innovation and contributing to the development of next-generatio n processes and models. Fostering collaboration and knowledge sharing within a global team. Supporting the creation of advanced technologies that power self-driving cars, AI, the cloud, 5G, and IoT. What You’ll Need: Bachelor’s degree in Electronics with 3+ years’ experience or a Master’s degree in Electronics with 2+ years’ experience. Proficiency in verification technologies such as Simulation, UVM, SVA, and LRM. Experience with Synopsys EDA tools (e.g., VCS, Verdi) is an advantage. Strong fundamentals in digital design, HDLs (Verilog/VHDL) , and System Verilog. Excellent written and oral communication skills for effective global team interactions. Who You Are: A team player with a collaborative mindset and the ability to work with multiple stakeholders. A detail-oriente d and innovative thinker who can propose effective solutions. Motivated, proactive, and self-organized with good social communication skills. Open to travel and capable of multitasking in a dynamic environment. The Team You’ll Be A Part Of: You will be part of our Silicon Design & Verification business unit, which focuses on building high-performan ce silicon chips faster. We are the leading provider of solutions for designing and verifying advanced silicon chips, and we develop next-generatio n processes and models to manufacture these chips. Our team is dedicated to optimizing chips for power, cost, and performance, and we work collaborativel y with global experts to drive innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10610 Remote Eligible No Date Posted 24/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned SOC Engineering professional with a passion for pushing the boundaries of technology. With a Bachelor's degree in electronics engineering or computer science, and preferably a Master's, you bring at least 5 years of hands-on experience in physical verification and IR. Your proficiency in Verilog/VHDL, Unix, Perl, and TCL scripting makes you a valuable asset to any team. You have an in-depth understanding of microprocessor design, which sets you apart from the rest. Your strong written, verbal, and methodical skills enable you to communicate complex ideas effectively. You are driven by a desire to learn and grow, and you are excited by the opportunity to work on world-class microprocessors that allow customers to develop highly optimized and sophisticated embedded designs. What You’ll Be Doing: Working on producing highly optimized hardware IP for the ARC family of configurable processors. Collaborating with an international multi-disciplinary team on the qualification, benchmarking, and test chip implementation of new microprocessor IPs. Participating in in-house test chip designs and development platforms to learn about potential applications of our microprocessor IPs. Assisting in customer sales and design-ins of our IP, providing technical support and expertise. Implementing a comprehensive implementation flow that is configurable and supported by Synopsys memory compilers and standard cell libraries. Ensuring the highest standards of quality in physical verification and IR processes. The Impact You Will Have: Contributing to the development of cutting-edge microprocessor IPs that set industry standards. Enhancing the capabilities of our customers by enabling them to develop highly sophisticated embedded designs. Driving the success of our products through your expertise in physical verification and IR. Supporting our sales team by providing technical insights and facilitating design-ins. Improving the efficiency and configurability of our implementation flows. Helping to position Synopsys as a leader in the semiconductor industry through continuous innovation. What You’ll Need: Bachelor’s degree in electronics engineering or computer science; Master’s degree is a plus. Minimum of 5 years of related experience in physical verification and IR. Proficiency in Verilog/VHDL. Expertise in Unix, Perl, and TCL scripting. Understanding of microprocessor design is highly desirable. Who You Are: A detail-oriented professional with strong analytical skills. An excellent communicator with the ability to convey complex technical concepts effectively. A team player who thrives in a collaborative, international environment. A proactive learner who stays updated with the latest industry trends and technologies. A problem solver who enjoys tackling challenging technical issues. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on producing highly optimized hardware IP for the ARC family of configurable processors. Our team is dedicated to continuous improvement and innovation, and we work collaboratively with international colleagues to achieve our goals. You will have the opportunity to work on exciting projects, learn from industry experts, and contribute to the success of our world-class microprocessor IPs. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 5945 Remote Eligible No Date Posted 04/11/2024 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a driven and detail-oriented individual with a passion for cutting-edge technology and continuous learning. With 0-1 years of related experience, you possess a sufficient understanding of DFT architectures and methodologies, including Scan insertion, ATPG, JTAG, and SIMS. You have moderate experience in generating scan patterns and coverage statistics for various fault models like stuck-at, IDDQ, transition faults, and path delay. Your experience in scan stuck-at and at-speed coverage exploration, simulation, and debug is commendable. Familiarity with state-of-the-art EDA tools for DFT, design, and verification is a plus. Additionally, you have some knowledge of STA for DFT mode timing constraint development and exploration. Your debugging skills and demonstrated experiences in Perl/TCL/Python scripting are an advantage. You are an excellent communicator and can effectively work with cross-functional teams across geographies. Design experience in MBIST, LBIST, and Analog DFT is an added advantage. You value inclusion and diversity and are committed to contributing to a collaborative and innovative work environment. What You’ll Be Doing: Implementing DFT architectures and methodologies, including Scan insertion, ATPG, JTAG, and SIMS. Generating scan patterns and coverage statistics for various fault models. Exploring, simulating, and debugging scan stuck-at and at-speed coverage. Utilizing state-of-the-art EDA tools for DFT, design, and verification. Developing and exploring STA for DFT mode timing constraints. Collaborating with cross-functional teams across geographies to achieve project goals. The Impact You Will Have: Enhancing the reliability and quality of our high-performance silicon chips through robust DFT methodologies. Contributing to the efficiency of our chip design and verification processes. Supporting the continuous innovation of our technology and products. Ensuring seamless integration of DFT in our chip design workflows. Improving fault detection and coverage, thereby reducing time-to-market for our products. Fostering a collaborative and inclusive work environment that drives technological advancements. What You’ll Need: 0-3 years of related experience in DFT architectures and methodologies. Moderate experience in generating scan patterns and coverage statistics for various fault models. Experience in scan stuck-at and at-speed coverage exploration, simulation, and debug. Familiarity with state-of-the-art EDA tools for DFT, design, and verification. Basic knowledge of STA for DFT mode timing constraint development and exploration. Who You Are: Excellent communicator with the ability to work effectively with cross-functional teams. Detail-oriented and driven by a passion for technology and continuous learning. Strong debugging skills and experience in scripting languages like Perl, TCL, and Python. Committed to fostering an inclusive and diverse work environment. Adaptable and eager to take on new challenges and responsibilities. The Team You’ll Be A Part Of: You will join a dynamic and innovative team focused on developing and implementing cutting-edge DFT methodologies to enhance the reliability and performance of our silicon chips. The team collaborates closely with cross-functional groups across geographies to drive technological advancements and achieve project goals. Together, we are committed to continuous learning, innovation, and fostering an inclusive work environment. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. How You Will Contribute: The SVT/PV Engineer will develop test strategies, automation script development, and execute test plans for Ciena’s Packet Optical products, focusing on OTN Transport, Switching, Automation and NMS. Key Responsibilities: Develop, automate and execute test strategies for Telecom networks. Create and execute test plans using Manual and Automation methods. Identify and automate test scenarios. Debug and resolve defects with design teams. Ensure compliance with industry standards (ITU-T, IETF, IEEE, ANSI). Must Have : OTN Transport & Switching Test Automation (TCL/Python) Defect Analysis & Debugging Telecom Network Testing with hands-on experience with Test Equipment’s. Bachelor’s/Master’s in Electronics, Computer Science, or Optical Communications. 5+ years in Telecom System Testing. Experience in test planning/execution, automation, reporting and debugging. Exposure to photonics/DWDM, NMS and TDM/packet technologies Improved test efficiency & automation coverage Reduction in defect leakage & debugging time Compliance with test quality standards Nice-to-Have Skills Exposure to different NBIs – REST, NETCONF, gRPC and Photonics/DWDM Exposure to photonics/DWDM, NMS and TDM/packet technologies #LI-MP2 Not ready to apply? Join our Talent Community to get relevant job alerts straight to your inbox. At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is an Equal Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Category Engineering Hire Type Employee Job ID 10808 Remote Eligible No Date Posted 21/04/2025 Sr. Staff Verification Expert (CXL IP Design) The candidate will be part of the R&D in IP Group in India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in a role that will include IP Design Verification using UVM based environment methodology. Job Description: The candidate will be part of the Synopsys CXL IP Design verification R&D team at Synopsys. You will own UVM based verification environment, which handles multiple features of IP, test plan creation, test case writing, random constraint creation, coverage closure, SVA and Release. As part of the work, you will closely work with lead and be part of a global team of experienced engineers. Technical Expertise Needed: BS or MS degree in Computer Science, Electrical or Electronics Engineering, or Related Field with 8+ years of experience in the following areas: Own UVM based testbench environment and developed UVM testbench architecture, Testplan and SVA for an IP. Knowledge of one or more of protocols/standards: PCIe, CXL, UCIe, AMBA (AXI,APB,AHB) etc Good knowledge of System Verilog. Hands-on experience with coverage closure and writing SVA for IP/SOC. Good simulation debugging skills. Experience with Perforce or similar revision control environment. Experience with Python/TCL or any scripting knowledge is an added advantage. Job Responsibilities include - Understand Standard Specifications, create testplan for the product and create UVM based testbench architecture. Propose and enhance the UVM architecture with unique idea for verification. Be single point of contact with hands-on experience on all verification tasks – Testbench Creation – Testplan creation – Coverage closure – SVA – Release Perform peer review of testbench code for continuous quality. Own simulation debugs using DVE/Verdi, interact with Design Team and aid in debug and Verification closure. The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide. Lead team of engineers to perform various verification activities on IPs/Subsystems. Anticipate problems and risks and work towards a resolution and risk mitigation plan. Assist and mentor the team in day-to-day activities and grow the capabilities of verification team for future assignments. Review various results and reports to provide continuous feedback to the team and improve quality of deliverables. Report status to management and provide suggestions to resolve any issues that may impact execution. The candidate must have excellent oratory and written communication skills in English, should be a team player and possess good problem-solving skills and show high levels of initiative. This position requires prior industry experience and is not open for college fresh grads. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Bhubaneswar, Odisha, India Category: Engineering Hire Type: Employee Job ID 7953 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. PVT Sensor IP development is a critical offering for process, voltage, temperature and other monitoring IPs within SOC subsystems. Synopsys is a market leader for these IP developments which are integral parts of Silicon lifecycle monitoring. You Are: As a new, exciting, and challenging position, we are looking for a talented person that can show a great level of initiative and ability to work in a busy and fast-changing environment. This rewarding role is fundamental to the successful and smooth operation of the engineering teams. You will play a vital role in helping to strengthen and develop forecasting capabilities, based upon improved monitoring capacity and forward-looking project schedules. Contribute to the development and enhancement of layout design methodologies and best practices. Work closely with different function design leaders to understand/enhance processes and help to enhance methodology. Collaborate with internal infrastructure teams on compute grid, storage management, and job scheduling architecture, efficiency, maintenance, and forecasting. Understanding CAD infrastructure and methodology will help to set up project environments. Contribute to enhancing quality assurance methodology by adding more quality checks/gatings. Front End development process understanding and support internal tools development and automation to help improve productivity across ASIC design cycles. Work with design engineers on new tools/technology and new features evaluation and adoption. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Stay updated with the latest industry trends and advancements in A&MS layout design. Understanding of tools like VC Spyglass, Verdi, & views like SDF, Liberty, etc., and other frontend views will add value to this position. Writing RTL Code and TCL is a good addition. The Impact You Will Have: Enhance layout design methodologies and best practices, contributing to the overall quality and efficiency of the design process. Improve project forecasting capabilities by leveraging advanced monitoring and scheduling techniques. Boost productivity across ASIC design cycles through the development and automation of internal tools. Ensure design integrity and manufacturability through meticulous physical verification and design rule checks. Stay at the forefront of industry advancements, bringing the latest trends and technologies into Synopsys' design practices. Collaborate effectively with cross-functional teams, driving innovation and continuous improvement in design methodologies. What You’ll Need: Bachelor’s or master’s degree in engineering or a related field. 2 to 3+ years of experience in A&MS frontend and backend views & collaterals development flows. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented environment. Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV). Good communication and interpersonal skills. Who You Are: You are a highly motivated individual with a strong technical background and a passion for innovation. You possess excellent problem-solving skills and thrive in a collaborative, team-oriented environment. Your ability to adapt to fast-paced, dynamic work settings and your proactive approach to challenges make you an invaluable asset to the team. You are dedicated to continuous learning and staying updated with industry advancements, ensuring that your contributions drive Synopsys' success in the competitive semiconductor landscape. The Team You'll Be A Part Of: You will be joining a dynamic and forward-thinking team focused on developing cutting-edge PVT Sensor IPs and enhancing SOC subsystems. Our team is dedicated to pushing the boundaries of technology and innovation, ensuring that Synopsys remains a market leader in the semiconductor industry. Collaboration, continuous improvement, and a commitment to excellence are the core values that drive our team's success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Job Description: We are seeking an experienced Validation Engineer to join our dynamic team. The ideal candidate will have extensive experience in pre-silicon and post-silicon validation of complex SoCs , with a strong understanding of automotive chip interfaces, protocols, and system-level validation . This role requires a hands-on approach to debugging, validation strategy development, and working closely with cross-functional teams to ensure high-quality silicon products. Key Responsibilities: Develop and execute validation plans for System-on-Chip (SoC) solutions targeted at automotive applications . Perform pre-silicon verification and post-silicon validation using advanced debugging and validation methodologies. Validate and debug high-speed interfaces (PCIe, USB, Ethernet, DDR, MIPI, LPDDR, USB ,I3C etc.). Collaborate with design, architecture, firmware, and software teams to ensure comprehensive coverage and resolution of validation issues. Automate test cases and validation flows using Python, Perl, or other scripting languages . Work with lab equipment such as oscilloscopes, logic analyzers, protocol analyzers, and signal generators to perform high-speed interface validation . Develop functional and stress test cases to assess SoC reliability and performance. Drive root cause analysis and resolution of silicon issues, working closely with design, process, and test teams . Optimize validation methodologies for faster bring-up and improved test coverage . Document and present validation results, debug findings, and test coverage metrics to stakeholders. Required Skills & Qualifications: 6-10 years of experience in SoC validation, functional testing, and debug . Hands-on experience in pre-silicon and post-silicon validation methodologies. Strong knowledge of automotive SoC interfaces and industry standards. Proficiency in scripting languages like Python, Perl, or TCL for test automation. Experience with high-speed serial interfaces and debugging tools (oscilloscopes, logic analyzers, JTAG, etc.). Familiarity with firmware, embedded systems, and driver-level debugging . Good understanding of power management, clocking, and reset architectures in SoCs. Experience working in cross-functional teams and collaborating with hardware and software engineers. Strong analytical and problem-solving skills. Excellent communication and documentation abilities. Preferred Qualifications: Experience in automotive safety standards (ISO 26262) and functional safety validation. Strong know how for Board layout and schematic design vis-à-vis debugging board level debugging Experience in FPGA/Emulation( haps /Palladium ) -based validation . Knowledge of automotive networking protocols (CAN, LIN, FlexRay, etc.). Experience with Jenkins automation and configuration management plugins Show more Show less

Category Engineering Hire Type Employee Job ID 6134 Remote Eligible No Date Posted 08/09/2024 We are looking for a highly motivated individual, with expertise in IC design and physical implementation for a group with growth opportunities. Responsibilities include complete digital implementation from RTL to GDS including Synthesis, Floor-Planning, Power Planning and Analysis, CTS, Placement and Routing, STA, Formal Verification, EMIR Signoff and physical verification. The individual will contribute both on the implementation side as well as flow development for a variety of advanced high performance interface IPs, Test chips & Subsystems at latest techno nodes. The successful candidate: has solid engineering understanding of the underlying concepts of IC design, implementation flows and sign-off methodologies for deep submicron design. has intimate knowledge of the full design cycle from RTL to GDSII, including development of timing constraints has good scripting & programming skills (Perl, Tcl, Python etc); knowledge of CAD automation methods. Can interface with the larger product team to understand design constraints, deliverable formats, customer requirements Independent, timely decision maker and able to cope with interrupts Knowledge of IP Subsystem implementation & FE flows are added advantages 8+ years of hands-on experience in ASIC physical implementation and EDA tools with recent contribution to project tape-outs. Must demonstrate knowledge of the Synopsys tools, flows and methodologies including Design Compiler, IC Compiler/2, Fusion Compiler, Primetime, Formality, Star-RCXT, Hercules/ICV and other industry tools. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.