1588 Tcl Jobs - Page 13

The position requires 2-6 years of experience with micro architecture design and system design using Verilog, SV, or VHDL. You should also have experience in Spyglass Lint, CDC, SoC Integration, logic design with Verilog and SV, ASIC Synthesis, STA, timing closure, and working with any Processor based system. Familiarity with design using SoC, AXI/AHB/APB System bus, and peripherals such as Ethernet, PCIe, DDR, USB, UART, SPI, and I2C is essential. You will be responsible for synthesis, timing analysis using various industry standard tools, and should have proficiency in TCL and Python scripting. The ideal candidate for this role should have a notice period of immediate availability to 1 month. The position is based in BLR/Hyd locations.,

You are an experienced Design for Testability (DFT) Engineer who will be responsible for leading and defining the overall DFT strategy for critical ASIC and SoC projects at HCL Tech. Your expertise in DFT methodologies is crucial for driving the implementation of robust test strategies to ensure the manufacturability and high-quality testing of next-generation integrated circuits. In this senior-level role, you will collaborate with design and verification teams to seamlessly integrate DFT techniques throughout the design flow. Your responsibilities include developing and implementing advanced DFT methodologies such as scan insertion, ATPG, Boundary Scan, and Design for X to achieve exceptional test coverage and fault detection rates. You will also champion best practices for DFT, participate in design reviews, mentor junior engineers, and analyze test results to identify and address potential design issues. To qualify for this position, you should hold a Master's degree in Electrical Engineering, Computer Engineering, or a related field, along with a minimum of 10+ years of experience in DFT for complex ASICs and SoCs. Your proven track record of successfully leading DFT strategies for high-volume production and in-depth knowledge of advanced DFT concepts are essential. Additionally, expertise in industry-standard DFT tools and scripting languages for automation, as well as a strong understanding of digital design principles and manufacturing test processes, will be beneficial. Joining HCL Tech as a DFT Engineer offers competitive salary and benefits, the opportunity to lead cutting-edge DFT strategies, a dynamic work environment with professional growth opportunities, and recognition for outstanding contributions. If you are a highly accomplished DFT Engineer looking to make a significant impact in the field of integrated circuits, this role is perfect for you.,

We are seeking a talented and driven Senior QA Engineer to join our team at Pune, India. As a Senior QA Engineer, you will play a pivotal role in testing Platform products for wireless telecom and cloud-based cellular solutions at Parallel Wireless. You will collaborate with test engineers across different sites and have the opportunity to contribute to ORAN wireless technology. Your responsibilities will include: - Reviewing 3GPP standards, architecture, and design documents to develop comprehensive test plans for 5G NR/LTE testing. - Designing test plans for PHY/ Stack algorithms and considering end-to-end perspectives. - Generating test scripts using available tools and exploring innovative ways to replicate real-world scenarios. - Setting up simple or complex test environments as per test case requirements. - Developing test plans for LTE/5G NR features in compliance with 3GPP and ORAN standards. - Executing test cases, validating test outcomes, and interpreting log data for issue debugging. - Identifying system improvements based on test expertise and debugging field log/data. - Devising strategies for enhancing QA test planning and implementation efficiency. - Quickly diagnosing and resolving customer issues by replicating configurations in a lab environment. - Proficiency in K8S deployment and adapting deployment models across different platforms. Key qualifications: - 4-8 years of experience in various protocols for interoperability, performance evaluation, and troubleshooting radio access technology. - Strong background in RAN (5G/LTE) testing, feature testing, and lab testing. - Understanding of message flows and parameters in LTE/5G NR procedures. - Proficiency in scripting languages such as Python and Tcl. - Experience in creating complex test plans for 5G/4G features and root cause analysis. - Prioritization of automation and scripting skills for this role. Education requirements: - Bachelor's (B.E/B.Tech) or Master's degree (M.E. or M.Tech) in Electronics/Communication/Computer Science Engineering or equivalent field. Kindly note that the salary for this position is 0 - 0 per year.,

Tenstorrent is at the forefront of AI technology, setting new standards in performance, usability, and cost efficiency. With the evolution of AI reshaping computing, there is a growing need for innovative solutions that integrate advancements in software models, compilers, platforms, networking, and semiconductors. Our team comprises diverse technologists who have created a high-performance RISC-V CPU and share a common passion for AI, striving to develop the ultimate AI platform. We value collaboration, curiosity, and a dedication to solving complex problems. As we expand our team, we are seeking individuals at all levels to contribute to our mission. We are currently seeking an experienced engineer to lead the clock design efforts for our IP, CPU, and SoC teams. In this role, you will be responsible for defining clocking strategies that strike a balance between stringent timing requirements, power efficiency, and area constraints. You will collaborate closely with RTL, PD, and power engineers to construct robust, high-performance systems. This position is based in Bangalore and requires onsite presence. We invite candidates with a minimum of 6 years of experience to apply for this role. Throughout the interview process, candidates will be evaluated for their proficiency, and job offers will be made based on the assessment, which may vary from the details provided in this listing. As an ideal candidate: - You possess a solid background in clock tree synthesis and clock network design. - You are adept at working with timing, CDC, and low-power design methodologies. - You have experience working with advanced technology nodes, particularly 5nm or below, influencing design decisions. - You enjoy developing scripts to automate tasks and streamline engineering workflows. Key responsibilities include: - Taking charge of the end-to-end clock architecture for intricate SoCs. - Collaborating effectively with RTL, physical design, and power teams to achieve project objectives. - Proficiency in utilizing tools like Synopsys FC, ICC2, and scripting languages such as Python, Perl, or Tcl. - Demonstrating a problem-solving mindset focused on enhancing efficiency and resilience. This role offers the opportunity to: - Architect clocking strategies that are scalable across IP, CPU, and SoC designs. - Learn techniques to minimize power consumption and jitter while meeting aggressive power, performance, and area (PPA) targets. - Enhance workflows and reduce manual interventions through intelligent automation. - Address and resolve challenges specific to cutting-edge technology nodes. Join us at Tenstorrent and be part of a dynamic team dedicated to pushing the boundaries of AI technology.,

You are an experienced and highly skilled Senior SOC Design Verification Engineer with over 10 years of experience, specializing in PCIE (Peripheral Component Interconnect Express) protocols. As a key member of the team at Eximietas Design, you will be responsible for ensuring the robustness and correctness of cutting-edge System on Chip (SoC) designs. Your role will involve developing and implementing verification plans for complex SoC designs, with a particular focus on PCIE subsystems. You will work on creating and maintaining advanced testbenches using SystemVerilog and UVM (Universal Verification Methodology), as well as writing and executing test cases to verify functional and performance requirements, especially for PCIE protocols. Your responsibilities will also include debugging and resolving functional and performance issues in collaboration with design and architecture teams, developing and enhancing verification environments for PCIE and related interfaces, performing coverage-driven verification, and ensuring coverage closure. You will collaborate with cross-functional teams to define verification strategies and methodologies, mentor junior engineers, and contribute to the continuous improvement of verification processes. To qualify for this role, you should have a strong background in SoC design verification, with expertise in SystemVerilog, UVM, and PCIE specifications (e.g., PCIE Gen3/Gen4/Gen5) and verification methodologies. You should be proficient in developing and debugging complex testbenches and test cases for PCIE subsystems, with experience in coverage-driven verification and achieving coverage closure. Familiarity with AMBA protocols (AXI, AHB, APB), low-power verification techniques, power-aware simulation, and formal verification tools and methodologies will be beneficial. Strong problem-solving skills, attention to detail, excellent communication, and teamwork skills are essential for this role. Preferred skills for this position include knowledge of scripting languages like Python, Perl, or Tcl, familiarity with machine learning accelerators or AI/ML-based SoC designs, and experience with advanced process nodes (e.g., 7nm, 5nm). In return, Eximietas Design offers you the opportunity to work on cutting-edge SoC designs and innovative technologies in a collaborative and inclusive work environment. You will receive a competitive compensation and benefits package, along with professional growth and development opportunities.,

As a member of the Common Hardware Group (CHG) at Cisco, you will be part of a team that delivers cutting-edge silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. Our work involves designing networking hardware for Enterprises, Service Providers, Public Sector, and Non-Profit Organizations worldwide. Join us in shaping Cisco's groundbreaking solutions by participating in the design, development, and testing of advanced ASICs that are at the forefront of the industry. Your role will involve implementing Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics requirements of the designs. You will collaborate with multi-functional teams to develop innovative DFT IP and play a crucial role in integrating testability features in the RTL. Working closely with design and PD teams, you will ensure the seamless integration and validation of test logic throughout all phases of implementation and post-silicon validation flows. Your team will contribute to the creation of innovative Hardware DFT and physical design aspects for new silicon device models, bare die, and stacked die. You will drive re-usable test and debug strategies while showcasing your ability to craft solutions and debug with minimal mentorship. To excel in this role, you are required to have a Bachelor's or Master's Degree in Electrical or Computer Engineering along with a minimum of 10 years of relevant experience. Your expertise should encompass knowledge of the latest trends in DFT, test, and silicon engineering. Proficiency in Jtag protocols, Scan and BIST architectures, ATPG, EDA tools, and verification skills like System Verilog Logic Equivalency checking will be essential. Preferred qualifications include experience in Verilog design, DFT CAD development, Test Static Timing Analysis, and Post-silicon validation using DFT patterns. Your background in developing custom DFT logic and IP integration, familiarity with functional verification, and scripting skills like Tcl, Python, or Perl will be advantageous. At Cisco, we value diversity, innovation, and collaboration. We empower our employees to bring their unique talents to work, driving positive change and powering an inclusive future for all. As a company that embraces digital transformation, we encourage creativity, innovation, and a culture that supports learning and growth. Join us at Cisco, where every individual is valued for their contributions, and together, we make a difference in the world of technology and networking.,

As an intern in the SOC design team at MIPS, you will have the opportunity to be part of a 6-month or 1-year program. Candidates who have graduated in 2026 or later are eligible to apply, with 2025 graduates not meeting the qualification criteria. To be considered for this internship, you should possess a Master's or Bachelor's degree in Electronics Engineering, Electronics and Telecommunication Engineering, Computer Science, or Electrical Engineering. A strong academic track record with a CGPA of 8.0 or higher is preferred. The internship positions are available in Pune and Bangalore. Your main responsibilities will include designing and integrating subsystems into SoCs and contributing to the definition of RTL development flows for MIPS RISC-V processors. The key skills required for this role include proficiency in Verilog, SystemVerilog, VCS, Verdi, as well as strong scripting abilities in languages such as Tcl, Python, and Perl. Additionally, strong debugging skills will be beneficial in carrying out your day-to-day tasks effectively.,

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: FPGA Design.: Experience: 3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Design For Testability - DFT.: Experience: 3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI HVL Verification Experience : 3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Design For Testability - DFT Experience : 1-3 Years.

Associate / Lead – Enovia CAD Integration Location: Chennai (Hybrid - 2-3 days WFO) Shift: Swing Shift (2 PM – 11 PM) Max CTC: ₹28 LPA 27376 Job Summary We are seeking a skilled Associate or Lead with 3-5 years of hands-on experience in developing and configuring solutions on the Enovia 3DExperience platform, with strong expertise in CAD integrations. The role involves participating in design workshops, analyzing business requirements, supporting system integration testing, reviewing technical designs, and driving Enovia PLM integrations such as CAD and SAP with modules like BOM and Change Management. Key Responsibilities Engage in design discussions and contribute technical insights to decision-making. Translate business requirements into IT requirements and review user stories for clarity. Execute system integration tests and validate data flows with PLM BOM and change management modules. Review technical designs and code for risk and alignment with business and IT needs. Develop test cases for functional feature validation. Champion Enovia PLM integration efforts (CAD, SAP) and ensure smooth interplay with existing modules. Collaborate with project managers and business stakeholders to provide timely updates. Required Experience & Skills 3-5 years of experience with Enovia 3DExperience platform development and configuration. Strong expertise in CAD integrations with systems like Creo/PDMLink, SolidWorks/EPDM, Inventor Vault, Solid Edge. In-depth knowledge of Enovia CAD integration technologies, including PowerBy and XPDM architectures. Proficiency with the 3DExperience data model (Classic and UPS) and UPS data model concepts. Familiarity with OOTB applications such as 3DPlay, Product Structure, 3D Visualization, 3D Issue & Markups. Experience in CAD data migrations is advantageous. Skilled in web-services based integration architecture. Programming experience with MQL scripts, TCL, JPOs, JSPs, and widget development on the 3DExperience platform. Strong SQL skills and familiarity with Oracle databases. Excellent communication, problem-solving, and analytical skills. Educational Qualifications Doctorate: 0 years relevant experience OR Master’s Degree: Minimum 3 years relevant experience OR Bachelor’s Degree: Minimum 5 years relevant experience Additional Details Only candidates with hands-on Enovia configuration and development experience will be considered. Pure installation/support experience is not sufficient. Target candidates from product-based or reputed service-based companies. Interview process: Three technical rounds + HR round. Skills: integration,mql scripts,ootb applications,tcl,cad data migrations,change management,3d,xpdm architectures,web-services based integration architecture,jsps,sql,analytical skills,jpos,oracle databases,cad,problem-solving,skills,plm,data,powerby,solid edge,business requirements,communication,solidworks/epdm,cad integrations,enovia 3dexperience,3dexperience data model,widget development,design,inventor vault,creo/pdmlink

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 12+ years of Hardware Engineering or related work experience. Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 10+ year of Hardware Engineering or related work experience. PhD in Computer Science, Electrical/Electronics Engineering, Engineering, with 8+ years of related work experience STA/Timing CAD Methodology Lead As an STA CAD methodology lead, the role would expect the candidate to lead deployment of new features and or methodologies related to STA and ECO domain Scope of the work would cover (but not limited to) STA flow/methodology development, continuous efficiency improvement, Flow development/Support for ECO convergence with tools in STA and ECO domain (PrimeTime, Tempus, Tweaker, PrimeClosure to name a few) There would be challenges for timing convergence at both block and Top level on cutting edge technology on high performance designs would have to be resolved for ensuring successful design tapeouts on time with high quality. Key requirements: Thorough knowledge of the ASIC design cycle and timing closure flow and methodology. 10 + years of proficiency in timing constraints and timing closure. Expertise in STA tools (any of Primetime, Tempus, Tweaker) and flow. Strong understanding of advanced STA concepts and challenges in advanced nodes Proficiency scripting languages (TCL, Perl, Python). Strong background in PNR and Extraction domain. Experience of constraints development tool (like spyglass) will be added advantage. Leadership qualities to lead (technically) and manage the STA CAD team Qualification: BE/BTech + 12 years of experience, or ME/MTech + 10 years of experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Preferred Qualifications: Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 12+ years of Hardware Engineering or related work experience. 3+ years of experience with circuit/logic design/validation (e.g., digital, analog, RF). 3+ years of experience utilizing schematic capture and circuit stimulation software. 3+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. 1+ year in a technical leadership role with or without direct reports. Principal Duties and Responsibilities: Leverages advanced Hardware knowledge and experience to plan, optimize, verify, and test highly critical electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Participates in or leads the implementation of advanced design rules and processes for electronic hardware, equipment, and/or integrated circuitry. Conducts highly complex simulations and analyses of designs as well as implements designs with the best power, performance, and area. Collaborates with cross-functional teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality. Evaluates, characterizes, and develops novel manufacturing solutions for leading edge products in the most advanced processes and bring-up product to meet customer expectations and schedules. Evaluates reliability of highly critical materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Advises and leads engineers in the development of complex hardware designs, evaluating various design features to identify potential flaws or issues. Writes detailed technical documentation for highly complex Hardware projects; reviews technical documentation for junior engineers. Level of Responsibility: Works independently with minimal supervision. Provides supervision/guidance to other team members. Decision-making is significant in nature and affects work beyond immediate work group. Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc. Has a moderate amount of influence over key organizational decisions. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. Qualcomm CDMA Technologies (QCT) is a global leader in Multimedia integrated circuits (ICs), software and systems for wireless consumer devices including Smartphones, Netbooks and E-readers. Our teams are developing advanced technologies to enhance mobile devices in areas including 2D and 3D graphics, audio/video, display and architecture. These Multimedia ASICS are co-designed with our Modems, Applications Processors, Analog Codecs and Power Management ICs to deliver highly-integrated, high-performance and low-cost chipsets to our customers and partners. You will be implementing the industry's leading edge graphics processor, specific areas include 2D and 3D graphics, streaming processor, high speed IO interface and bus protocols. In this position, the designer will be responsible for architecture and micro-architecture design of the ASIC, RTL design and synthesis, logic and timing verification. The successful candidate for this position will specify and design digital blocks in our Multimedia Graphics team that will be integrated into a broad range of devices. All Qualcomm employees are expected to actively support diversity on their teams, and in the Company. Minimum Qualifications Bachelor's degree in Science, Engineering, or related field Previous experience in designing GPU or CPU cores and ASICs for Multimedia and Graphics applications in deep sub-micron CMOS processes for volume productionExperience with Verilog/VHDL design, Synopsys synthesis, static timing analysis, formal verification, low power design, test plan development, coverage-based design verification, and/or design-for-test (DFT)Experience with Computer Architecture, Computer Arithmetic, C/C++ programming languages is desiredExposure to DX9~12 level graphics HW development is big plusGood communication skill and desire to work as a team player RequiredBachelor's degree in Computer Science, Electrical Engineering, Information Systems, or related field.PreferredMaster's degree in Computer Science, Electrical Engineering, Information Systems, or related field. ASIC, hardware, design, GPU, OpenGL, DirectX, RTL, Verilog, SystemVerilog Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company Description TCL Cables Limited has been a leading manufacturer of control cables, thermocouple cables, and instrumentation cables since 1980. Based in Delhi, the company is known for its quality products that serve various industrial applications. TCL Cables Limited is committed to innovation, quality, and customer satisfaction. Role Description This is a full-time on-site role based in Hyderabad for a Senior Technician. The Senior Technician will be responsible for maintaining and repairing cable machinery, ensuring the quality of produced cables, troubleshooting technical issues, and collaborating with the engineering team for process improvements. Daily tasks include performing routine maintenance, executing technical tests, and adhering to safety protocols. Qualifications Technical skills in machinery maintenance and repair Experience with quality control and technical testing Ability to troubleshoot and solve technical issues Knowledge of safety protocols and procedures Strong analytical and problem-solving skills Ability to work collaboratively with cross-functional teams Bachelor's degree or equivalent in a relevant field is preferred

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: Analog Layout. Experience: 1-3 Years. >

Legal & Compliance Services LOB Financial Services PREFERRED SECTOR/INDUSTRY Legal & Compliance DESIGNATION B2 Sr. Analyst QUALIFICATION CS. (Must) LL. B (preferred but not mandatory) JOB LOCATION Delhi/NCR EXPERIENCE REQUIRED 3.5- 6 years JOB RESPONSIBILITIES The role of Sr. Analyst in Legal & Compliance shall encompass various tasks including, but not limited to, the following: Preparation of management committee meetings, board meetings and the GPs of Client funds Drafting of management committee and board meetings minutes and review of GP minutes including maintaining policies/minutes trackers/action logs in this respect Manage corporate and legal & compliance process Ensure quality assurance and checking for all the deliverables Ensure creation of training plans and manuals, quality manuals, SOPs, query log, escalation matrix, guidelines, checklist, etc. Manage team and accountable for QAs/QCs/Analyst work Oversee Implementation of the Quality system in the project Quickly and effectively train resources on process and client tools. Creating SOPs, guidelines, checklist, quality manuals, training manuals etc. Reports to Team lead DESIRED SKILLS & COMPETENCIE Candidate should have at least 3.5 6 yearsexperience in the legal/corporate department of a fiduciary or have worked in a law firm. Candidate should be willing and looking to consolidate and grow the skills and talents in the long term with a company that works in a dedicated team and results-based environment. Technical Skills Knowledge of regulatory and corporate environment for Irish/Luxembourg funds Understand key challenges General Counsels face in running corporate legal departments and functioning of law firms Engage with Clients, support decision making, delivery/governance related discussions Skills in planning, evaluation, research, analysis, training, problem solving and reporting Ability to facilitate and contribute to client sessions to define, illustrate and gain buy in to substantial departmental transformation via legal services Ability to perform email outreach to client Expert in analyzing legal and compliance issues Functional Skills Excellent written and oral communication in English Proficiency in using MS office Suite Experience in managing multiple/large teams Experience in Delivery and related governance Handling Client Escalations, Resourcing, People Management, Project Deliverables Implementing the Quality system in the project Ensuring appropriate use of methods, tools, and techniques in project Co-ordinating customer-related activities including acceptance of the deliverables Engage with Clients, support decision making, delivery/governance related discussions

Meet the Team Data Center Networking Group develops the Nexus 9000 line of data center and cloud switches that feature application awareness to make the network infrastructure flexible and agile for dynamic response to application needs and virtual machine workload mobility. Data Center also developed a 400G, 800G Ethernet transceiver crafted to drastically lower the optics price to out challenge the competitor offerings. As we realize our modernization strategies and move into new markets, our diverse, inclusive culture also creates a competitive advantage for Cisco. It ensures we have the fresh ideas and execution capabilities and the local knowledge to best serve our customers and build Cisco brand recognition around the globe. By gaining a better understanding of the world and the differences in its people we can change the way it works, lives, plays, and learns. Your Impact In depth understanding of hardware boards, layout Development experience in one or more areas of BIOS/GRUB/uboot, linux device drivers/ Linux KLM, networking stack, memory model Development experience on PCH and peripherals PCI, I2C, SPI, Higig+ bus, FPGA and CPLD handling, handling os special devices and peripherals – I2C-GPIO expanders. Exposure to standards – XAUI, SGMI, Serdes, SGMII, MSA Development experience in Chassis management Knowledge of asic forwarding, Linux drivers and 3rdparty ASICs/network processors highly desired. Excellent debugging skills and rich experience using various hardware, memory debugging tools Minimum Qualifications: B.E/B.Tech/ME/Mtech/MS from reputed university and at least 8-12 years of software development experience in embedded systems or system software space Hands on Engineer/leader who can work along with senior folks contributing to Architecture, design and development of platform development cycle Develop innovative solutions to redefine for the next generation data center. Preferred Qualifications: Familiar with Networking technologies and concepts Scripting experience (Python, Perl, TCL, shell programming) Working experience in merchant silicon Ability to multi-task and solve complex problem Knowledge of asic forwarding, Linux drivers and 3rdparty ASICs/network processors highly desired. Consistent track record of learning new technologies and features on own initiative A demonstrable passion for technology and software development #WeAreCisco #WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all. Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best. We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do! Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!

Meet the Team Join the Cisco IIOT team in product development for Industrial IOT switching and routing products that transforms industrial operations. Cisco's IIOT team provides an outstanding, unique experience for software engineers by combining the resources offered by a sizable multi-geography organization and a large campus (with an on-site gym, healthcare, café, social interest groups, and philanthropy) with the startup culture and breadth of growth opportunities that working in a smaller teams can provide. Your Impact Design and development of IIoT hardware platforms, ensuring flawless integration between hardware and software layers. Design and development of control plane and data plane software for Cisco IIOT Switching, Routing products. Design and develop low-level software components, including BSP, device drivers and kernel modules. Analyse requirements and problem statements to come with right software designs and solutions. To be able to write details Design documents and Functional Specifications. To Code and Unit Test Software components and modules. It is required to have strong open system testing and automating skills Triage, debug, and root cause simulation, software bring-up, and customer failures To be able to innovate and come up with new ideas that can lead to filing patents and creating IP value for the company Minimum Qualifications: Bachelors (4-8 years) or Master’s degree(3-6 years) in Computer Science, EE/ECE or related fields. Proficient in writing quality code in C/C++ Strong understanding of OS (e.g. Linux, RTOS, Unix) and experience working with Linux kernel, device drivers, and BSPs. Prior work experience with control plane software or data plane software, data structures, Linux/RTOS/Networking OS internals Experience in developing software/firmware for networking equipment. Experience using Traffic generators/Analyzers such as IXIA/Sniffer is a plus. Experience with debugging and verification methodologies Preferred Qualifications: Scripting experience (Python, Perl, TCL, shell programming) You have hands-on development experience on L2, L3 protocols. Experience in Networking domain with strong L2/L3 or Security protocols experience OR Experience in development and validation of peripheral interfaces (e.g. PCI, PCIe, I2C, SPI, UART, GPIO, Ethernet) and ensure their reliable operations is a plus. Cisco Networking certificates such as CCNA, CCNP, CCIE are preferable. Excellent communication and strategic planning skills, while being self-motivated with a focus on execution. #WeAreCisco #WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all. Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best. We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do! Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!

Company Description Sri Shakthi Institute of Engineering and Technology (SSIET), founded in 2006 by Dr. S. Thangavelu, is dedicated to imparting character-building education and productive life skills. The institution has collaborated with notable global universities and industries such as CISCO, ORACLE, SIEMENS, Infosys, and WIPRO. Recognized by the TIMES Group as one of the 40 Centers for Excellence in Education in Tamilnadu, SSIET is also a member of IESA, NASSCOM, IEEE, and ICTACT. Leading firms such as Accenture, TCS, Oracle, and Verizon are among our esteemed recruiters. Role Description This is a full-time on-site role based in Tiruchirappalli for a Technical Trainer. The Technical Trainer will be responsible for planning and delivering technical training programs, developing instructional materials, and assessing trainees' progress. Daily tasks include conducting training sessions, preparing training content, and collaborating with other departments to identify training needs. The role also involves staying updated with the latest industry trends and technologies to ensure training relevance and quality.Hiring is happening for all four roles. Qualifications Experience as a Technical Trainer, including Technical Training skills Proficiency in Training & Development, including creating training materials and programs Excellent Communication and presentation skills for effective training delivery Ability to assess training needs, evaluate training effectiveness, and implement improvements Strong organizational and time management skills Relevant certifications or qualifications in training, such as a Bachelor's degree in a related field Experience in the engineering or technology sector is a plus Skills required: 1.MERN Stack Trainer HTML, CSS, JavaScript (ES6+) React.js (Hooks, State Management, Routing) Node.js and Express.js MongoDB (CRUD, Aggregation, Mongoose) RESTful API development Git and GitHub Deployment tools (Heroku, Vercel, Netlify) Basic understanding of authentication (JWT/OAuth) 2.DevOps Trainer Git, GitHub, GitLab Jenkins (CI/CD pipelines) Docker (containerization) Kubernetes (basic orchestration) Linux fundamentals and Bash scripting Cloud platforms (AWS/Azure/GCP basics) Infrastructure as Code (Terraform, Ansible – optional) Monitoring tools (Prometheus, Grafana – optional) 3.Cloud Trainer Cloud concepts (IaaS, PaaS, SaaS, Public/Private/Hybrid Cloud) AWS core services (EC2, S3, IAM, RDS, Lambda, VPC) Azure or GCP basics (VMs, Storage, App Services) IAM (Identity and Access Management) Basic networking and virtualization Cloud CLI tools & SDKs DevOps integration in cloud (CI/CD pipelines) Basic scripting (Bash, PowerShell or Python – optional) 4.VLSI Trainer Digital electronics and logic design Verilog and/or VHDL RTL design and simulation FPGA programming (Xilinx/Vivado, Altera/Quartus) EDA tools (ModelSim, Synopsys, Cadence) Synthesis and Timing Analysis ASIC/FPGA design flow Basic scripting (TCL, Shell – optional) minimum 5 years of industry experience needed

Job Title : 3DEXPERIENCE Developer Location : Bengaluru (WFO) Key Responsibilities: Develop and customize 3DEXPERIENCE/ENOVIA applications using MQL (Matrix Query Language), TCL (Tool Command Language), EKL (Engineering Knowledge Language), and CAA (Component Application Architecture). Implement business logic using EKL in 3DEXPERIENCE dashboards and widgets. Customize and extend out-of-the-box (OOTB) ENOVIA apps. Develop integrations with external systems (e.g., ERP, CAD tools). Perform bug fixing, performance tuning, and upgrades for ENOVIA components. Analyze requirements and translate them into technical designs. Provide technical documentation and support user acceptance testing (UAT). Collaborate with functional teams and provide post-deployment support. Key Skills and Tools: Languages & Scripting: MQL, TCL, EKL Platform Expertise: ENOVIA 3DEXPERIENCE (2019x and above preferred) Development Framework: CAA (Component Application Architecture) Other Skills: Java, JavaScript (optional but a plus), 3DEXPERIENCE data model understanding Strong debugging and problem-solving abilities Knowledge of data migration and upgrade processes in ENOVIA (added advantage) Preferred Qualifications: Bachelors or master’s degree in computer science, Mechanical Engineering, or related field Dassault Systems certification (optional but preferred) Experience working in Agile/Scrum environments Role & responsibilities Preferred candidate profile

Role and Responsibilities The candidate will be part of Functional Safety team in MBRDI Participate and provide Inputs and recommendations into ECU developments Being part of dynamic team, involve in the tasks related to Automotive Safety Expected Skills Deep knowledge of functional safety (ISO26262) and experience in project work Deep understanding of the concept and ideas behind functional safety At least 5-10 years experience in FuSa project work German skills are a big plus Motivation to support our organization to ensure a good implementation of safety topics in projects Ability to explain our requirements together with the ability to clearly point out the deviations in reviews/ assessments Ability to work in an international team (4-eye-principle for most reviews/ assessments) Ability to attend all UFB Meetings (4x UFB Daily per week + UFB Compass once per week) Knowledge needed for daily work Deep knowledge of MBC development processes (MBC MAP) & especially MBC FuSa processes Qualifications BE/B. Tech Electronics and Communication Engineering Computer science Electrical and Electronics Engineering

Job Title: Application Developer – Front End Location: Mysuru, India Experience Required: Total – 2+ Years | Relevant – 1-2 Years Job Type: Full-Time | RTH-Y (Right to Hire – Yes) Interview Mode: Face-to-Face at IBM Mysore (on account request) Joining: Day 1 onsite reporting post offer/OB Mandatory Skills: TypeScript – Strong hands-on experience in developing front-end applications using TypeScript. TCL/TK – Proven knowledge and experience working with TCL/TK scripting for UI or automation. Alternate/Secondary Skills (Good to Have): Java Full Stack – Exposure to Java backend development, Spring framework, and related technologies is a plus. Job Responsibilities: Design, develop, and maintain front-end applications using TypeScript and TCL/TK. Collaborate with cross-functional teams to define, design, and deliver new features. Ensure code quality, scalability, and maintainability. Debug and resolve technical issues in the application front-end or integration layer. Work closely with backend developers (Java Full Stack) for end-to-end feature implementation. Candidate Requirements: 2+ years of total IT experience with 1-2 years of hands-on experience in relevant technologies. Must be open to face-to-face interviews at IBM Mysore. Immediate or short notice joiners preferred (with Day 1 onsite availability). Strong problem-solving and communication skills.

Senior eCAD Application Engineer - AI & Automation Bangalore, Karnataka, India Date posted Jul 18, 2025 Job number 1842825 Work site Up to 50% work from home Travel 25-50 % Role type Individual Contributor Profession Hardware Engineering Discipline Electrical Engineering Employment type Full-Time Overview Do you want to be a part of an exciting and growing Hardware team? Do you want to help design path breaking products? Microsoft’s Hardware teams consist of progressive, diverse, and exceptionally creative professionals who design, test and manufacture some of the best-loved entertainment devices in the world. Our teams ship tens of millions of hardware products every year including Surface Pro, Surface Hub, Surface Laptop, Xbox, a full accessories lineup, and more. Microsoft is the destination for the brightest minds in entertainment device design. Come be part of what’s next. We are seeking qualified candidates for eCAD Senior Application Engineer for Automation development to support various hardware projects at Microsoft Corporation. Successful candidate will be the primary focal point for eCAD tools and process development, and support activities, working very close to electrical engineers and layout design teams, to ensure we run a world class electrical engineering environment. This candidate will contribute to the evolution of the design process and tools as our organization continues to grow and will be part of testing and evaluating new tools or tools features. Candidate is expected to enhance our tools and tools environment by creating programs, utilities and AI solutions that increase the productivity of the engineers. Additionally, this person will help document application notes and user-guides. Person will also provide basic and advanced training and Q&A sessions on the eCAD solutions created. Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. Qualifications Required Qualifications: Master's Degree in Electrical Engineering, Computer Engineering, or related field AND 5+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, or related field AND 7+ years technical engineering experience OR equivalent experience Experience and proven track record with programming languages like C#, Python, TCL and SKILL or similar in the high-tech industry is a must Experience using Cadence Allegro PCB Tools Hands-on experience in design, development and launch of high-volume electronic products Preferred Qualifications: Requires strong technical problem-solving skills, managing through ambiguity, organizing and documentation skills Interpersonal, influencing, leadership, verbal and written communication skills required Excellent project management, communication and teamwork skills required Understanding of AI capabilities, prompt engineering and offerings in eCAD area Knowledge and experience of eCAD Simulation and simulation environment is a plus Other Requirements : Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check : This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter. #W+DJOBS Responsibilities Develop, test and document custom programs, utilities and AI solutions that work standalone or provide additional capabilities for Electrical Engineers and Layout design teams Drive EE, PCB and eCAD tools usage process and methodologies and related integrations to other systems Drive data management solutions, integrations and systems in collaboration with IT and other functions to enable secure AI usage Conduct training on eCAD tools, programs, and internal processes Troubleshoot and resolve design issues related to the EE and PCB design and eCAD tools and work proactively to implement preventative Evaluate and develop tools and solutions together with 3rd party and internal partners Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.  Industry leading healthcare  Educational resources  Discounts on products and services  Savings and investments  Maternity and paternity leave  Generous time away  Giving programs  Opportunities to network and connect Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

The ideal candidate for this position at Qualcomm India Private Limited will utilize their knowledge and experience to offer leadership, technical guidance, and execute silicon validation of ARM or DSP based multiple SOC projects and platforms. The candidate should possess a strong understanding of digital design and SOC architecture, along with a good grasp of Object-Oriented Programming (OOP) concepts. Experience in Hardware Verification Languages (HVL) such as System Verilog, UVM/OVM, and System C, as well as Hardware Description Languages (HDL) like Verilog is required. Knowledge of ARM/DSP CPU architecture and High-Speed Peripherals such as USB2/3, PCIE, or Audio/Multimedia is essential. Additionally, familiarity with Power-aware Verification, GLS, Test vector generation, and Version managers like Clearcase/perforce is advantageous. Proficiency in scripting languages like Perl, Tcl, or Python is preferred. The candidate should possess strong analytical and debugging skills. Experience in Hifi Processor, Soundwire interface, ANC, DMA, I2S verification is considered a plus. Qualcomm is looking for candidates who hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 6 years of Hardware Engineering or related work experience. Alternatively, candidates with a Master's degree in the mentioned fields and 5+ years of relevant experience, or a PhD with 4+ years of relevant work experience are encouraged to apply. A total of 12-15 years of experience with a Bachelor's/Master's degree in Electrical/Electronics engineering is also acceptable. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities during the application/hiring process. Interested candidates are encouraged to reach out for accommodations if needed. Qualcomm expects its employees to comply with all relevant policies and procedures, including those related to security and the protection of confidential information. Please note that Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies, as well as individuals being represented by an agency, are not permitted to use this site for submissions. Qualcomm does not accept unsolicited resumes or applications from agencies. For further information about this role, please contact Qualcomm Careers directly.,