3439 Tcl Jobs - Page 7

Job Summary: The Sellout Manager – B2B (Apple Business) is responsible for driving Apple product sellout performance across selected premium dealer stores in the Calicut and Wayanad regions. The role focuses on on-ground execution , managing and motivating 25 Apple promoters , ensuring sales target achievement , store compliance , and maintaining a premium Apple customer experience in all assigned outlets. Key Responsibilities:1. Sellout Achievement Achieve monthly and quarterly sellout targets for Apple products across the assigned stores. Ensure daily tracking of sales performance (iPhone, Mac, iPad, Watch, Accessories). Support dealers and store teams in achieving category-wise sales targ...

This Position reports to: Procurement & Logistics Manager Your role and responsibilities: In this role, you will have the opportunity to support regional and global sourcing initiatives , either under the leadership of a regional/global Category Manager or by managing your own tasks within a defined threshold. Each day, you will ensure timely and accurate procurement of materials and services aligned with technical specifications, pricing, schedules, and terms, in full compliance with ABB purchasing policies. You will also engage closely with suppliers, category leaders, and internal stakeholders to enhance value through sourcing excellence. This role contributes to Electrification Smart Pow...

ob Summary: The Business Head – TCL Brand (Kerala) will lead the overall B2B sales, distribution, and strategic business growth for TCL Smart TVs, Smart ACs, and connected appliances across Kerala. This leadership role focuses on achieving revenue targets, expanding the dealer and institutional network, building strong channel relationships, and positioning TCL as a preferred premium smart technology brand in the state. Key Responsibilities: //1. Business Strategy & Sales Growth Develop and execute the state-level business plan for the TCL brand across Kerala. Drive B2B and channel sales performance to achieve monthly, quarterly, and annual sales targets. Identify new business opportunities ...

Job Summary: The MAC Head – Kerala (B2B Sales) will be responsible for leading and driving the Apple Mac business across Kerala , focusing on dealer network expansion, institutional business development, and consistent revenue growth. The role requires a strong understanding of Apple’s B2B ecosystem, channel sales management, and the ability to achieve category-specific targets through effective planning and execution. Key Responsibilities:1. Sales & Revenue Growth Achieve monthly and annual B2B sales targets for Apple Mac products in Kerala. Drive business through existing dealers and identify new B2B partners across the state. Develop Mac category sales strategies tailored to the Kerala ma...

Job Summary: The Area Sales Manager – B2B will be responsible for driving Apple product sales within the assigned territory through effective dealer management, new business development, and relationship building. The role focuses on maximizing B2B opportunities, expanding the dealer network, and ensuring consistent achievement of sales and profitability targets. Key Responsibilities: 1. Sales & Business Development Achieve monthly, quarterly, and annual B2B sales targets for Apple products. Identify and onboard new B2B partners, dealers, and institutional clients. Develop and execute sales strategies to expand the Apple market presence in the assigned area. Ensure proper product mix sales a...

Description: We are seeking a skilled ENOVIA 3DEXPERIENCE PLM Developer with over 5 years of experience in customization, configuration, migration, and installation of the 3DEXPERIENCE platform. Roles & Responsibilities Customize and configure the ENOVIA 3DEXPERIENCE platform based on functional and technical requirements. Widget experience is a must Utilize ENOVIA development tools such as MQL, TCL, JPOs, UI3 components, Triggers, Policies, Workflows, and Enovia APIs. Perform data migration using Java and TCL scripting; develop scripts to extract, update, and manage production data. Translate functional specifications into technical designs and implement scalable solutions. Develop and impl...

Verification Manager www.omnidesigntech.com Location: Bengaluru / Hyderabad About Omni Design Technologies Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovat...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skil Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or rel...

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test ca...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Skills: VLE, Cadence Software, VLX, Calibre, DRC, LVS,. Layout Designer _ Hyderabad (5 to 8 Years. Description. Role and Responsibilities. Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work....

We’re hiring a DFT Lead with 10+ years of experience in VLSI front-end design. The role involves DFT architecture, ATPG, scan insertion, STA, timing closure, and debug. Strong scripting and communication skills are essential. Required Candidate profile Experienced DFT professional skilled in ATPG, scan insertion, and timing closure. Proven ability to lead design-for-test implementation and debugging in complex SoC environments using industry tools.

DFT Engineer Candidates need to have good experience in Tessant tools Candidates need to have good experience in ATPG pattern generation and simulation(both timing and no timing) Candidates need to have good experience in Scan insertion Experience should be more than 6+ years Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Physical Design Engineer Physical Design Engineer Experience 4-10 yrs Job Overview: Strong background of ASIC Physical DesignFloor planning, P&R, Extraction, IR Drop Analysis, Static Timing and Signal Integrity.. Hands-on experience on technology nodes like 5nm,7nm, 14nm, 10nm. Good knowledge of EDA tools from Synopsys, Cadence and Mentor Hands-on experience in floor planning, placement optimizations, CTS and routing. Hands-on experience in cadence or Synopsys tool (Encounter, ICC, PT/PTSI, TEMPUS, DC, RC, VOLTAS) Job Category VLSI (Silicon engineering) Job Location IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida

SR. DFT ENGINEER SR. DFT ENGINEER SmartSoC is looking for expert DFT engineers for the development, support, maintenance, Implementation, and Testing of complex components of an ASIC/SOC/FPGA/Board. Desired Skills and Experience- 3 – 10year’s experience in DFT Good experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. DFT logic integration and verification. Experience in debugging low coverage and DRC fixes Gate Level ATPG simulation with and without timing. Pattern generation, verification, and delivery to ATE team. Post silicon debug and support on failing patterns. Good experience with tools from Mentor/Synopsis/Cadence. LBIST experience is plus. DFT mode STA and ...

DFx 1-3 years of experience in RTL DFT Verification (DFx). Good Understanding of JTAG IEEE-1149.1 and IJTAG IEEE P1687 standard. Understanding of using ICL and PDL files for verification and knows to create a testbench. Experience in JTAG RTL verification within any UVM. Able to debug simulation fails effectively utilizing debug tools like Synopsis Verdi. Basics of system Verilog, Basics of UVM, and preferably System Verilog assertions Scripting knowledge of TCL/Perl. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

SENIOR PHYSICAL DESIGN ENGINEER SENIOR PHYSICAL DESIGN ENGINEER SmartSoC is looking for smart and enterprising Physical Designer Engineers to come to join us and get an opportunity to do some cutting-edge work and also work in a great environment where work is Always Fun and Exciting. This role will involve Physical design at the block and chip level of complex designs in the latest technologies. Desired Skills and Experience- 3 – 10 years relevant experience Excellent hands-on P&R skills with expert knowledge in ICC/Innovus Expert knowledge in all aspects of PD from Synthesis to GDSII, Strong background of Floor planning, Placement, CTS, Routing, P&R, Extraction, IR Drop Analysis, Timing an...

Lead Verification Engineer-Low Power We are seeking a highly skilled and experienced Lead Verification Engineer with expertise in USB/LPDDR and a strong knowledge of Cadence VIP. The ideal candidate will have a deep understanding of low-power design and verification techniques. Responsibilities: Develop and execute comprehensive verification strategies for USB/LPDDR subsystem designs, considering low-power design requirements. Collaborate with cross-functional teams to define verification goals and ensure alignment with project objectives. Design and implement reusable, scalable, and efficient verification testbenches using SystemVerilog/UVM or C based . Leverage Cadence VIP and other verifi...

TECHNICAL LEAD – DFT TECHNICAL LEAD – DFT SmartSoC is looking for a smart and enterprising leader with expert knowledge in DFT to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking. You will be responsible for leading and managing a team, client communication, and project execution. Job Responsibilities- Lead an internal DFT team, executing projects for an offshore client Manage the team and their technical and leadership growth Manage all interactions with the client Desired Skills and Experience- 7+ years of experience in DFT, mainly Scan Architecture, ATPG & MBIST Experience in planning scan chains, running scan inser...

DFT-DV Number of Open Positions: 7 Experience: 4 to 7+ years Location: Bangalore About The Role : We are seeking highly skilled and motivated DFT-DV Engineers to join our dynamic team in Bangalore. As a DFT-DV Engineer, you will play a pivotal role in ensuring the quality and reliability of our digital designs through Design for Test (DFT) and Design Verification (DV) methodologies. The ideal candidates should possess a minimum of 4 to 7+ years of experience in the field, with a strong background in DFT DV flow, JTAG, MBIST, SCAN, PG, PHY-LP, and BSCAN. Key Responsibilities: DFT Implementation: Collaborate with design and verification teams to define and implement DFT strategies and methodol...

We are looking for a hands-on validation engineer who can convert real customer use cases into executable test plans (manual & automated), drive continuous product improvement, and work closely with cross-functional global teams. HOW YOU WILL CONTRIBUTE AND WHAT YOU WILL LEARN Work closely with our partners and end customers and assist in capturing their detailed requirements and their exact use cases. Translate this information into E2E validation test scenarios and test plans (with manual and automated tests). Execute on these E2E test plans, create fault reports and drive for proper fixes. Continuously drive for product improvements, by using your in-depth technical knowledge to improve a...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1.Conduct verification of the module/ IP functionality and provide customer support a.Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b.Create test bench development and test case coding of the one or multiple module c.Write the codes or check the code as required d.Execute the test cases and debug the test cases if required e.Conduct functional coverage analysis and document the test cases inc...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1.Conduct verification of the module/ IP functionality and provide customer support a.Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b.Create test bench development and test case coding of the one or multiple module c.Write the codes or check the code as required d.Execute the test cases and debug the test cases if required e.Conduct functional coverage analysis and document the test cases inc...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1.Conduct verification of the module/ IP functionality and provide customer support a.Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b.Create test bench development and test case coding of the one or multiple module c.Write the codes or check the code as required d.Execute the test cases and debug the test cases if required e.Conduct functional coverage analysis and document the test cases inc...

Physical Design Engineer Block-Level (PnR) Job Locations : Bangalore/Hyderabad/Noida/Ahmedabad Job Summary We are looking for a highly motivated Physical Design Engineer with a solid background in block-level place and route (PnR) to join our silicon implementation team. The ideal candidate will have at least 6 years of experience in block-level physical design with proven expertise in timing closure, DRC/LVS, and performance optimization. This role will involve working on advanced technology nodes and collaborating closely with RTL, DFT, STA, and power teams to ensure successful design with AMD flows is a significant plus. Required Qualifications 6+ years of hands-on experience in block-lev...