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8.0 - 13.0 years

13 - 17 Lacs

Bengaluru

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Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Are you interested in working with a world-class CPU design teamAre you interested in the application of formal methods to the verification of application processorsIn contributing to the development of the next generation of formal methodologies in this space Qualcomm's CPU team has some of the best CPU architects and engineers on the planet, developing the processors that will power the future. Come and join us on this exciting adventure. Sharpen your formal verification skills to their fullest on some of the complex designs ever attempted. Roles and Responsibilities Work with design team to understand design intent and bring up verification plans and schedules with an eye towards the end-to-end formalization of the refinement from architecture to micro-architecture Define formal verification architecture, develop test plans and build end-to-end formal sign-off environments for Qualcomm CPU components Engage in full-spectrum deployment of model-checking technology to hardware designs including property verification, math proofs, architectural modeling and validation amongst other cutting-edge application areas To be successful in this position you will need BA/BS degree in CS/EE with 8+ years of practical experience in application of formal methods in hardware or software Strong model checking or theorem proving background/experience in verification of complex systems Experience in writing assertions and associated modeling code in Hardware Description Languages or in proving correctness of architectural specifications using formal methods Working familiarity with model checkers like Jaspergold and VC-Formal or theorem-proving tools such as ACL2 and HOL The ideal candidate will have the following experience MS/PhD degree in CS/EE; 4+ years of practical experience Strong foundation in formal methods and in their application to hardware specifications and/or implementations Domain knowledge in one or more of these areasMicroprocessor architecture and micro-architecture, instruction set architecture, floating-point math, memory consistency, memory coherency, security architectures Strong software engineering skills with proven ability in automation and proficiency in at least one programming language (C++, Python, TCL etc.) Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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5.0 - 10.0 years

13 - 17 Lacs

Bengaluru

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Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: GPU Verification Engineer ------ Selected candidates will be part of the GPU HW team which is passionate about developing and delivering the best GPU Cores for all Qualcomm Snapdragon SOC products. Qualcomm GPU is an industry-leading solution which is driving the benchmarks in mobile computing industry and the future of mobile AR/VR. The overall GPU pre-Si verification team in Bangalore is currently heavily involved in the following Formal verification- Block level property based FV sign-off UVM/SV based constrained random test bench for functional verification Subsystem level TB for complete GPU workload analysis and compliance Emulation platforms to analyze performance and pipeline bottlenecks Power Aware & Gate level simulations to deliver a high-quality GPU implementation Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug triage. In the role of GPU Formal Verification Engineer , your project responsibilities will include the following, Develop high quality formal verification test benches to verify complex designs in GPU. It will involve creating & owning the test plan, test bench, performing debugs , deep bug hunting using formal tools and developing sign off quality testbenches and ensuring coverage closure & convergence metrics Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality Collaborate with worldwide architecture, design, and systems teams to achieve all project goals Currently, we are looking for candidates who can match one or more of the profiles listed below, Strong knowledge of Formal Property Verification & Assertion Based Verification, Formal Test planning and coverage analysis, Formal sign off & proof convergence strategies Hands-on experience with industry standard formal tools, such as JasperGold, VCFormal or Questa Formal Strong System Verilog Assertions knowledge, proficiency in Verilog, and scripting (Python, Perl, Tcl) is required Knowledge of GPU pipeline design is a plus, not mandatory Understanding of equivalence based methodologies such as DPV and SEQ is desired Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver Experience Minimum 5 years of Design verification experience Senior positions will be offered to candidates with suitable years of experience and proven expertise matching the profiles listed above Education BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent courses from reputed universities Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

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4.0 - 9.0 years

22 - 27 Lacs

Bengaluru

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Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: General Summary: Qualcomm is the world's leading developer of next generation of always on Display technologies and is committed to building a world-class organization that will lead the industry. Be part of the team developing next generation Display subsystems and Display peripherals. The ASIC Systems Architect is responsible for system architecture definition activities supporting a sophisticated multimedia Low Power Display subsystem catering to various market segments like mobile, XR, compute, IOT, Wearables and automotive products. Candidates will be responsible for all aspects of the ASIC hardware architecture definition/validation including the following: Owning end to end system architecture Capturing detailed technology requirements working closely with product, hardware and software engineering teams for deriving subsystem hardware specification. Engage with all stakeholders and collaborate with cross functional teams to define robust architecture Defining architecture validation plans and reviewing development results Optimization and debug via modelling, system simulation and testing across key criteria including power and performance. Collaborating, reviewing and enabling design and system teams to execute independently from the specifications Engage and provide support from Concept to Commercialization, Post-silicon commercialization support and customer engineering documentation Defining and patenting novel architectures that drive industry leadership. Job Function: Oversees hardware architecture for ASIC systems development for a variety of products. Determines architecture design, and validation via system simulation. Defines module interfaces/formats for simulation. Ability to analyze and solve complex problems through various mechanisms. Ability to optimize architecture for Area, Performance and power efficiency. Evaluates all aspects of the HW architecture flow from high-level development to validation and review. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. Uses System tools, such as, MathWorks MATLAB, SIMULINK, VISIO and other toolboxes. Uses language such as HDL, C/C++, System C, Perl, Python. Provides technical expertise for next generation initiatives. Leverages experience in image processing, SoC hardware and computer architecture concepts to develop proposals to address system Display requirements using processor, memory, bus and low-power design techniques. Uses expertise in low-power design methodology, optimization and validation using various CAD tools and design techniques to optimize system power. Leverages experience in digital system performance analysis and systems modelling to ensure performance goals met. Leverages Verilog/VHDL and digital hardware design tools such as Synopsys/Cadence/Mentor ASIC design and simulation tool sets, power analysis and simulation, scripting languages (Python, Perl, TCL, C, etc.) to optimize system. Effectively utilizes advanced problem solving and ASIC engineering practices to resolve complex architecture, design, or verification problems. Writes technical documentation and provides technical expertise for design or project reviews and project meetings. Acts as a tech lead on small to large projects and owns team deliverables of the project. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Minimum Qualifications: Bachelor's degree in, Electronics/Computer Science Engineering, or related field and 7+ years of ASIC design, verification, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, or related work experience. OR PhD in Science, Engineering, or related field.

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3.0 - 8.0 years

22 - 27 Lacs

Bengaluru

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Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: General Summary: Qualcomm is the world's leading developer of next generation of always on Display technologies and is committed to building a world-class organization that will lead the industry. Be part of the team developing next generation Display subsystems and Display peripherals. The ASIC Systems Architect is responsible for system architecture definition activities supporting a sophisticated multimedia Low Power Display subsystem catering to various market segments like mobile, XR, compute, IOT, Wearables and automotive products. Candidates will be responsible for all aspects of the ASIC hardware architecture definition/validation including the following: Owning end to end system architecture Capturing detailed technology requirements working closely with product, hardware and software engineering teams for deriving subsystem hardware specification. Engage with all stakeholders and collaborate with cross functional teams to define robust architecture Defining architecture validation plans and reviewing development results Optimization and debug via modelling, system simulation and testing across key criteria including power and performance. Collaborating, reviewing and enabling design and system teams to execute independently from the specifications Engage and provide support from Concept to Commercialization, Post-silicon commercialization support and customer engineering documentation Defining and patenting novel architectures that drive industry leadership. Job Function: Oversees hardware architecture for ASIC systems development for a variety of products. Determines architecture design, and validation via system simulation. Defines module interfaces/formats for simulation. Ability to analyze and solve complex problems through various mechanisms. Ability to optimize architecture for Area, Performance and power efficiency. Evaluates all aspects of the HW architecture flow from high-level development to validation and review. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. Uses System tools, such as, MathWorks MATLAB, SIMULINK, VISIO and other toolboxes. Uses language such as HDL, C/C++, System C, Perl, Python. Provides technical expertise for next generation initiatives. Leverages experience in image processing, SoC hardware and computer architecture concepts to develop proposals to address system Display requirements using processor, memory, bus and low-power design techniques. Uses expertise in low-power design methodology, optimization and validation using various CAD tools and design techniques to optimize system power. Leverages experience in digital system performance analysis and systems modelling to ensure performance goals met. Leverages Verilog/VHDL and digital hardware design tools such as Synopsys/Cadence/Mentor ASIC design and simulation tool sets, power analysis and simulation, scripting languages (Python, Perl, TCL, C, etc.) to optimize system. Effectively utilizes advanced problem solving and ASIC engineering practices to resolve complex architecture, design, or verification problems. Writes technical documentation and provides technical expertise for design or project reviews and project meetings. Acts as a tech lead on small to large projects and owns team deliverables of the project Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Minimum Qualifications: Bachelor's degree in, Electronics/Computer Science Engineering, or related field and 7+ years of ASIC design, verification, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, or related work experience. OR PhD in Science, Engineering, or related field.

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3.0 years

0 Lacs

Hyderābād

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Job Requirements KEY RESPONSIBILITIES Good knowledge of front-end design construction and verification. Experience in SoC Build, infrastructure tools & debugging integration issues o Knowledge of AMD flow and infrastructure. Familiarity with DJ Expertise in SoC/IP register methodology and & hands-on in IP-SoC integration, related issues & debugging failures A working knowledge of IP-XACT focused on interfaces and register descriptions. Hands on knowledge and experience with C, C++, Perl, Python, Ruby, TCL, and any other scripting languages Familiarity with design Infrastructure such as lsf, parallelism. Familiarity with Verilog, SV and Testbench languages. Work Experience PRIOR EXPERIENCE 3-5 years of Experience with EDA software development or support, ability to architect solutions to deep problems in front end design construction and verification and implementing infra are a must. Key items of interest are Excellent communication and writing skills Project execution. Customer and partner relations. Proposals and strong new initiatives impacting DV methodology

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4.0 years

1 - 9 Lacs

Hyderābād

On-site

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 8+ years Hardware Engineering experience or related work experience. 8+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

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2.0 years

0 Lacs

Bengaluru, Karnataka, India

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Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Analog + Digital Circuit Design for low power applications/sensors Spice simulations + signoff and verification Parasitic extraction + Totem-EMIR signoff + Circuit level Signal Integrity Excellent debugging skills using FSDB from simulations Automation skills python/Perl/TCL Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075780 Show more Show less

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5.0 years

0 Lacs

Hyderabad, Telangana, India

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WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Sr SILICON DESIGN ENGINEER The Role As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence. The Person You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Job Deliverables Setup ASIC QA flows for RTL design quality checks. Understand the design: top level interfaces, clock structure, reset structure, RAMs, CDC boundaries, power domains. Running Lint, Synthesis, LEC, Static timing analysis, CDC, RDC, DFT, CLP steps. Come up with clock constraints, false paths, multi-cycle paths, IO delays, exceptions and waivers. Checking the flow errors, design errors & violations and reviewing the reports. Debugging CDC, RDC issues and come up with the RTL fixes. Supporting DFX team for DFX controller integration, Scan insertion, MBIST insertion and DFT DRC & MBIST checks. Handling multiple PNR blocks, building wrappers and propagating constraints, waivers, etc. Flows or Design porting to different technology libraries. Generating RAMs based on targeted memory compilers and integrating with the RTL. Running functional verification simulations as needed. Job Requirements B.E/M.E/M.Tech or B.S/M.S in EE/CE with 5+ years of relevant experience ASIC design flow and direct experience with ASIC design in sub-20nm technology nodes Digital design and experience with RTL design in Verilog/SystemVerilog Modern SOC tools including Spyglass, Questa CDC, Cadence Conformal, VCS simulation Preferred experience in AXI4 or NOC protocols or DRAM memory interfaces. TCL, Perl, Python scripting Preferred Experience Project level experience with design concepts and RTL implementation for same Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics Good understanding of computer organization/architecture Academic Credentials Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

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5.0 years

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Hyderabad, Telangana, India

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WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SENIOR SILICON DESIGN ENGINEER The Role We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. The Person You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Job Requirements B.E/M.E/M.Tech or B.S/M.S in EE/CE with 5+ years of relevant experience ASIC design flow and direct experience with ASIC design in sub-20nm technology nodes Digital design and experience with RTL design in Verilog/SystemVerilog Circuit timing/STA, and practical experience with PrimeTime or equivalent tools Low power digital design and analysis Modern SOC tools including Spyglass, Questa CDC, Cadence Conformal, VCS simulation Working knowledge of C; embedded experience a plus TCL, Perl, Python scripting Version control systems such as Perforce, ICManage or Git Strong verbal and written communication skills Should have experience working in geographically dispersed team and should be a strong team player. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

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0 years

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Hyderabad, Telangana, India

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Job Summary: We are looking for a highly experienced RTL Design Lead to drive the architecture, micro-architecture, and RTL development of digital IP/SoC blocks. The ideal candidate should have a solid background in RTL design using Verilog/SystemVerilog, along with experience in leading teams and interfacing with verification, DFT, and physical design teams. Key Responsibilities: Lead RTL design activities for complex IPs or SoC sub-systems. Work closely with architects to translate high-level specifications into micro-architecture and RTL. Drive design reviews, coding standards, and technical quality. Define and implement RTL design methodologies and flows. Collaborate with verification, DFT, synthesis, and backend teams to ensure successful integration and tapeout. Guide and mentor junior designers in the team. Support silicon bring-up and debug as needed. Required Skills: Proven track record of delivering IP or SoC designs from spec to GDSII. Experience in micro-architecture development , pipelining, and clock-domain crossing. Good understanding of ASIC design flow , including synthesis, STA, and linting. Hands-on experience with AMBA protocols (AXI/APB/AHB) and other standard interfaces. Strong debugging and problem-solving skills. Familiarity with low-power design techniques is a plus. Preferred Skills: Exposure to high-speed protocols (PCIe, USB, Ethernet, etc.). Familiarity with scripting languages (Python, Perl, TCL) to automate design tasks. Experience with tools like Synopsys DC, Spyglass, Verdi, VCS, etc. Prior experience in leading and mentoring a small team. Educational Qualification: Bachelor’s or Master’s degree in Electronics/Electrical Engineering or related field. Show more Show less

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5.0 years

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Hyderabad, Telangana, India

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#Urgent_Opening_for Canvendor #Hiring: RTL Verification (5+ Years Experience) | Hyderabad | Immediate Joiners Preferred Location: Hyderabad, India Experience: 5+ Years Domain: Semiconductor Notice period: Immediate to 30days Skills Highlighted: SV/UVM testbenches at Top/Sub-system/Block-levels. FPGA #Key_Requirements: HW Verification Engineer - Responsible for #RTL_verification, developing Develop SV/UVM #testbenches at Top/Sub-system/Block-levels. - Responsible for driving test plan and test spec development and execution, generating documents, such as user-guide, test plan, test spec, test report etc., - Engaging in verification environment architecture and methodology development. - Experience in #System_Verilog and #UVM programing - Experience with verification of #protocols like Ethernet/PCIe/SPI/I2C/USB - Experience in#HWtesting, including working with test equipment – logic and traffic analysers, test generators, etc. - Experience with #Xilinx technology and tools, #FPGA verification and test - Strong #debugging skills at device and board level - Scripting language experience like Perl, Python or TCL - Excellent interpersonal, written and verbal communication skills - Excellent communication, problem solving and analytical skills If interested kindly share your updated CV to anushab@canvendor.com Show more Show less

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8.0 - 12.0 years

7 - 11 Lacs

Pune

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Req ID: 321949 We are currently seeking a BA Core Banking - Mortgages to join our team in pune, Mahrshtra (IN-MH), India (IN). Key skill sets: Domain "“ Agile BA Position one (1) "“ Mortgages (secured lending) 8-12 years of experience on Core Banking application and its implementation/ migration. Techno-functional BA preferred Excellent analytical skills Excellent communication skills Agile experience, experience on JIRA & Confluence, and experience working with APIs is expected. Experience of working for a Bank operating in the UK would be preferred

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0 years

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Hyderabad, Telangana, India

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. BE/BTECH---1-4 yrs Very good knowledge on SCAN/ATPG/JTAG/MBIST Experience with one or more chip tape out that includes chip ATE bring up. Experience on gate level simulation with no timing and timing (SDF) simulations (ATPG/MBIST/JTAG) Experience in Test structures for DFT, IP integration, ATPG fault models, test point insertion, coverage improvement techniques. Experience in scan insertion techniques at block level and chip top level. Experience on Memory BIST generation, insertion, verification on RTL/Netlist level. Good knowledge and understanding in Analog PHY and Analog Macro tests. Good knowledge and understanding on JTAG for IEEE 1149.1/IEEE1149.6 standards. Good knowledge on test mode timing constraints Good knowledge about running block level and chip STA flows. Cross domain knowledge to resolve DFT issues with design, synthesis, physical design, STA team. Proficiency in industry standard tools for scan insertion, ATPG, MBIST and JTAG (preferable Cadence/Tessent tools) Experience with post-silicon bring up and debug on ATE. Good knowledge on Perl/Tcl scription skills Very good team player capabilities and excellent communication skills to work with a variety of teams across the global organization. High sense of responsibility and ownership within the team for successful tape out and post-silicon bring up of project. We’re doing work that matters. Help us solve what others can’t. Show more Show less

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3.0 years

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Pune, Maharashtra, India

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Job Title Junior PLM specialist Job Description Job Title Junior PLM Specialist Work Location Pune Relevant experience required (in years) 3+ years of IT experience. Your position Within Vanderlande, the primary tool for managing our product data is Enovia 3DEXPERIENCE. The PLM tool is highly integrated into the Vanderlande IT landscape, using our ESB. It acts as the product data backbone. In this position, you will be responsible for the quality of the PLM service for over 2000 active users, spread across around the world. We are seeking a motivated Enovia PLM resource with 3+ years of experience to join our team in Vanderlande, Pune. Your team The PLM team consists of 9 people spread between Veghel and Pune, India. The members are multi-disciplinary, including both technical and functional specialists. The PLM team is part of the ICT Platform and Technology Solutions department. This department focusses on delivery of services which are used for the development and lifecycle management of multi-disciplinary Vanderlande products. Required Skills & Competencies Good knowledge of Enovia PLM (2016x onwards) Proficient in Core Java and JavaScript, JSP, Customization of UI3 Component, triggers, TCL Scripting, MQL. Knowledge of TVC (Technia Value Component) will be an added advantage. Experience in developing Web Services using SOAP and RESTFUL Services. Knowledge of Exalead search and its configuration. Knowledge of integration with Solidworks. Knowledge of build tools such as Ant, Gradle, or Maven. Experience with version control systems like GIT or Sourcetree. Experience in working with Eclipse/IntelliJ IDE. Understanding of Agile methodology and Scrum practices. Strong communication and interpersonal skills. About The Company Vanderlande Website www.vanderlande.com Vanderlande is a market-leading, global partner for future-proof logistic process automation in the warehousing, airports and parcel sectors. Its extensive portfolio of integrated solutions – innovative systems, intelligent software and life-cycle services – results in the realization of fast, reliable and efficient automation technology. Established in 1949, Vanderlande has more than 9,000 employees, all committed to moving its Customers’ businesses forward at diverse locations on every continent. It has established a global reputation over the past seven decades as a highly reliable partner for future-proof logistic process automation. Vanderlande was acquired in 2017 by Toyota Industries Corporation, which will help it to continue its sustainable profitable growth. The two companies have a strong strategic match, and the synergies include cross-selling, product innovations, and research and development. Why should you join Vanderlande India Global Capability Center (GCC) We are certified as Great Place to Work by the prestigious Great Place to Work Institute. Flexible and Hybrid Workplace. Vanderlande Academy and training facilities to boost your skills. Mediclaim benefit including parental coverage. On-site company health centers with a gym, employee wellbeing sessions, in house doctor support. A variety in Vanderlande Network communities and initiatives. Opportunity to collaborate globally. Being you @Vanderlande (Diversity statement) Vanderlande is an equal opportunity employer. Qualified applicants will be considered without regards to race, religion, colour, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status Show more Show less

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3.0 years

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Noida, Uttar Pradesh, India

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Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Additional Job Description General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties And Responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075280 Show more Show less

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3.0 - 5.0 years

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Noida, Uttar Pradesh, India

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Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3 to 5 years of experience in static timing analysis, constraints and other physical implementation aspects. Solid understanding industry standard tools PT, Tempus, And should be familliar to PNR tools like Innovus/FC Solid grip on STA fixing aspects to solve extreme critical timing and clock path analysis Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs and manual ECOs as well. Experience in deep submicron process technology nodes is strongly preferred - Below 10nm Knowledge of high performance and low power interface timing is added benefit. Strong fundamentals on basic VLSI design concepts, synchronous design timing checks, understanding of constraints Good experience with in Unix, TCL, PT-TCL, Tempus-TCL scripting Familiarity with Python background is added bonus Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075279 Show more Show less

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Bengaluru, Karnataka, India

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Role Description Role Proficiency: Execute any internal project or small tasks of customer project in any field of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes As an Individual contributor work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Analyse and complete the assigned task in the defined domain(s) successfully on-time with minimal support from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures Of Outcomes Quality –verified using relevant metrics by Lead/Manager Timely delivery - verified using relevant metrics by Lead/Manager Reduction in cycle time and cost using innovative approaches Number of trainings attended Outputs Expected Quality of the deliverables: Clean delivery of the module in-terms of ease in integration at the top level Ensure functional spec / design guidelines are met 100% of the time without deviation or limitation Documentation of the tasks and work performed Timely Delivery Meet project timelines as given by the team lead/program manager Help with intermediate tasks delivery by other team members to ensure progress Teamwork Teamwork participation; supporting team members in the time of need Able to perform additional tasks in case of any team member(s) is not available Innovation & Creativity Pro-actively plan approach towards repeated work by automating tasks to save design cycle time Participation in technical discussion training forum Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice (any one) EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Understands IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Knows Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Good knowledge of Physical Design / Circuit Design / Analog Layout d. Good understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Required technical skills and prior design knowledge to execute assigned tasks Ability to learn new skills in case required technical skills are not present to a level needed to execute the project Able to deliver tasks with quality and 100% on-time per quality guidelines and GANTT Strong communication skills Good analytical reasoning and problem-solving skills with attention to detail Knowledge Examples Previous project experience in any of the design by executing any one of the following RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc. Good Understanding of the design flow and methodologies used in designing Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager per skill set Additional Comments Working knowledge of C-language. Coding C-tests. Debugged any CPU, Cluster env, ownership Worked on GIC setup and working. Other is BUS ,AMBA bus protocol, AHB,AXI,CHI,ACE deep understanding NoC properties verification. Skills Design verification,AMBA bus protocol,C- Language Show more Show less

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1.0 - 5.0 years

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Hyderabad, Telangana, India

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Software Testing Responsibilities Technologies with sound knowledge WLAN IEEE802.11 a/b/g/n/ac/ax Test experience with minimum of 1 to 5 years Ethernet & Wired networking (added advantage) Independent Project handling with analytical ability Testing Experience Functional / Performance / IOT / Certification WLAN tests Protocols/Layers with good theoretical & practical knowledge Sound knowledge on Layer 1, 2, 3, IEEE802.11 a/b/g/n/ac/ax Knowledge on WPA2/WPA3, MU-MIMO, OFDMA, Beamforming, Roaming etc Traffic Generators Understating and Usage of Traffic generator tools like Spirent / Ixia / Chariot/ Veriwave. Knowledge on RFC2544, RFC2889, RFC3918 tests etc. Traffic Analyzers Wireshark, Ethereal, airopeak/omnipeak Operating Systems Windows 10/XP/Win7, Linux Automation Scripting Knowledge of Automation Scripts is mandatory – Python / Perl / TCL Experience required for this position -1-6 yrs Show more Show less

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3.0 years

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Hyderabad, Telangana, India

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We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and motivated professional with a passion for solving challenging technical problems in the verification domain. You are open to continuous learning and thrive on working with cutting-edge technologies. You possess excellent communication skills and enjoy collaborating with domain experts across global locations. You have a strong foundation in digital design, HDLs, and System Verilog, and you are proficient in using verification technologies. Your attention to detail and innovative mindset make you a valuable team player who partners effectively with multiple stakeholders. You are self-organized, motivated, and capable of multitasking in a dynamic environment. What You’ll Be Doing: Working on challenging technical problems in the verification domain under the Synopsys Verification Platform. Engaging with HDL/HVL methodologies and dynamic simulation aspects, including debugging. Collaborating with global teams to propose and implement solutions. Utilizing your knowledge of UNIX, Tcl, and other scripting languages to enhance productivity. Participating in continuous learning and staying updated with the latest verification technologies. Contributing to a diverse environment and interacting with domain experts across various locations. The Impact You Will Have: Accelerating the design and verification of high-performance silicon chips. Enhancing the usability and adoption of Synopsys' verification products and solutions. Optimizing chip designs for power, cost, and performance, thereby reducing project schedules. Driving technological innovation and contributing to the development of next-generation processes and models. Fostering collaboration and knowledge sharing within a global team. Supporting the creation of advanced technologies that power self-driving cars, AI, the cloud, 5G, and IoT. What You’ll Need: Bachelor’s degree in Electronics with 3+ years’ experience or a Master’s degree in Electronics with 2+ years’ experience. Proficiency in verification technologies such as Simulation, UVM, SVA, and LRM. Experience with Synopsys EDA tools (e.g., VCS, Verdi) is an advantage. Strong fundamentals in digital design, HDLs (Verilog/VHDL), and System Verilog. Excellent written and oral communication skills for effective global team interactions. Who You Are: A team player with a collaborative mindset and the ability to work with multiple stakeholders. A detail-oriented and innovative thinker who can propose effective solutions. Motivated, proactive, and self-organized with good social communication skills. Open to travel and capable of multitasking in a dynamic environment. The Team You’ll Be A Part Of: You will be part of our Silicon Design & Verification business unit, which focuses on building high-performance silicon chips faster. We are the leading provider of solutions for designing and verifying advanced silicon chips, and we develop next-generation processes and models to manufacture these chips. Our team is dedicated to optimizing chips for power, cost, and performance, and we work collaboratively with global experts to drive innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

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Hyderabad, Telangana, India

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WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SOFTWARE DEVELOPMENT ENGINEER - FPGA Engineer / Software Verification / Product Validation Engineer The Role AMD is looking for a specialized software product verification engineer who is passionate about improving the quality of products and benchmarks . You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology. The Person The ideal candidate should be passionate about software engineering and possess leadership skills to drive sophisticated issues to resolution. Able to communicate effectively and work optimally with different teams across AMD. Key Responsibilities Develop and execute test cases to validate all AMD products Automate tests using Python. Identify, document, and track issues using JIRA Participating in new ASIC and hardware bring ups Report coverage metrics using tools Review requirements and create associated test cases to ensure traceability Debugging/fix existing issues and research alternative, more efficient ways to accomplish the same work Develop technical relationships with peers and partners Preferred Experience Strong object-oriented programming background, Python preferred with 8+yrs of hands-on experience Understanding of FPGA design flow and tools (Design Entry, Synthesis, Simulation and Implementation) AMD/Xilinx Vivado Design Suite experience Hands on experience simulators like XSIM, Questa, Modesim, VCS etc. Ability to debug code with a keen attention to detail Experience with Windows, Linux and/or Android operating system development Experience with software development processes and tools such as debuggers, source code control systems (GitHub) and profilers is a plus Effective communication and problem-solving skills Hands on experience with scripting preferabley TCL Academic Credentials Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

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10.0 years

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Noida, Uttar Pradesh, India

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Senior Digital Design Manager We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: We are seeking a highly motivated and experienced Digital Design Manager to lead a team of seasoned digital design engineers. You possess a deep understanding of the ASIC digital design flow, along with hands-on experience in HDL coding, RTL2GDSII flow, and scripting languages. You excel in managing project execution from defining specifications to silicon validation and characterization. Your leadership skills foster a collaborative environment, driving your team to meet stringent project requirements and deliver superior quality designs. With a minimum of 10 years in digital design and at least 3 years in a managerial role, you bring a wealth of knowledge and a proven track record of successful project completions. What You’ll Be Doing: Work closely with 3DIO Phy Architects to define specifications and micro-architecture, supporting early evaluations and feasibility studies to meet customer and system requirements. Lead the execution of digital design solutions for 3DIO Phy projects, ensuring robust and high-performance designs. Own the implementation of RTL in Verilog and sign-off using Spyglass CDC/RDC/Lint tools. Verify the RTL to test desired functionality, coverage, and corner cases using state-of-the-art verification methods. Oversee the full execution of RTL2GDSII, including timing constraints, DFT insertion, test coverage, formal verification, physical implementation, timing closure, physical verification, EMIR, and reliability sign-off. Support silicon validation and characterization through test chip implementation. Manage team members and operations, including career development and planning. The Impact You Will Have: Drive innovation in digital design solutions for 3DIO Phy projects, enhancing Synopsys' product offerings. Ensure high-quality and robust designs that meet customer requirements and improve system performance. Streamline the digital design process from specification to silicon validation, reducing time-to-market. Lead a team of talented engineers, fostering a collaborative and productive work environment. Contribute to the continuous improvement of design methodologies and best practices. Support Synopsys' position as a leader in the semiconductor industry through successful project deliveries. What You’ll Need: Excellent understanding of ASIC digital design flow with hands-on experience in HDL coding. Proficiency in writing synthesis constraints and basics of STA. Knowledge of Lint/CDC/RDC and RTL2GDSII flow. Working knowledge of scripting languages like Perl, Shell, Python, and Tcl. Experience in leading a small team of digital design engineers to execute projects. Knowledge of high-speed/DDR PHY Layer with lane redundancy implementation is highly desirable. Exposure to FIFO, test (ATE and characterization bench), silicon validation, and debugging. Familiarity with Synopsys toolset is highly desirable. Minimum 10 years of relevant digital design experience with at least 3 years as a people manager. B.E/B.Tech/M.Tech in ECE/EE. Who You Are: Strong leadership skills with a proven track record of managing and developing teams. Excellent problem-solving abilities and attention to detail. Effective communication skills, both written and verbal. Ability to work collaboratively in a fast-paced, dynamic environment. Innovative and proactive mindset with a passion for continuous improvement. The Team You’ll Be A Part Of: You will be part of a highly skilled and dynamic team focused on digital design for 3DIO Phy solutions. The team collaborates closely with architects, verification engineers, and other stakeholders to deliver high-quality and innovative design solutions. Together, you will drive the success of Synopsys' cutting-edge technology projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

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2.0 years

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Pune, Maharashtra, India

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Responsibilities: Interaction with projects sponsors for conceptualization, initialization & build frameworks for strategic initiatives on Cramer Inventory Management Systems. Interaction with Business Analyst, Operational Users, IT Dev teams etc. for design & documentation of Cramer Inventory Management Systems at enterprise level. The role has global responsibilities and drives work on the key building blocks in the IT roadmap for Cramer Inventory Management System. The role requires close interaction with the Business Sponsors and other development teams. Cramer IMS specialist will play key role in conceptualization of all Cramer IMS Domains as per TCL vision. Key Role Activities: Part of the team involved in development and testing solutions in the inventory management (Cramer and customization around it). Manage the relationship between TCL business teams and delivery team for program Delivery. Collaborate with various stake holders within TCL for Cramer IMS program delivery across Domains. Interface with other groups within TCL that are involved in project delivery. Ensure that appropriate policies and guidelines are strictly adhered to. Drive program from project initiation through delivery, interface with internal customers, vendors and other stakeholders. Organize cross functional activities ensuring completion of the program on schedule and within budget constraints. Need to manage multiple projects within the Cramer Inventory Management Program. Identify business Process change requirements due to a new or modified Cramer Inventory Management program. Develop and publish Architecture Guidelines. Design Technical/functional solutions. Project Planning: Accountable for planning, prioritizing and execution of project by working with various stakeholders and customers. This includes procurement, integration, time, cost, scope, planning and initiation. Directs the development of required project documentation, identification of project goals and generate assignments consistent to meet objectives. Relationship Building: Maintains clear communication with customers on mutual expectations and monitors customer satisfaction. Builds business relationships (internally and externally) beyond the project environment. Organizes and leads a matrix project team. Provides feedback and focus to all team members. Mentors and coaches tech leads. Project Execution: Ensures all commitments are met in accordance with project goals/objectives. Overall responsibility for project activities. Directs project personnel and ensures compliance with policies. Responsible for monitoring and reporting on project financials and schedule progress based upon project goals. Ensures strategy for cost control is used. Requirement Management: Understand Telecom service delivery and assurance business processes and its fitment to Cramer IMS. Formulate cost effective and efficient solution based on business requirement. Should be able to foresee possible scenarios/assumptions/risks at solution stage. Should be able to finalize solution with required stakeholders. Accountable for planning, prioritization and execution of project by working with various stakeholders. Prepare plan and oversee successful implementation of project. Participate in product backlog walkthrough and provide sign off on Requirements after due diligence. Provide internal IT estimates for project. Finalize estimates (schedule and efforts) and communicate same to program manager. Create HLA(high level architecture) for Cramer IMS projects and participate in HLA creation with IT for roadmap projects. Ensure HLA walkthrough and sign off from stakeholders. Provide inputs to commercial team to conclude negotiation with vendor for issue of PO(purchase order). Requirements: Atleast 2 years of hands on experience in Cramer 8 or Above version and customisations using Cramer integrations. Should have deep knowledge on resource manager and metadata manager/Configurator. Should have been involved in testing the solutions in Cramer. Should have in-depth experience in understanding Task Engine callouts, homepage customization, web-report customization, wizard customization. Should have well knowledge on Cramer data model. Knowledge of OSS domain. Good experience in PLSQL programming, Oracle DB tasks. Knowledge of Fixed UIMwork is beneficial and added advantage. Experience on Core Java, J2EE, Unix commands, web services. Amdocs Cramer customization using Java and PL/SQL. Tools: Eclipse, SQL developer, SVN, Soap UI, REST, Spring/Hibernate, Junit Testing, Knowledge on Jenkins, Jira. Basic knowledge of WAS, Exposure to any testing tools. Should have a good understating of the industry standards and models; eTOM, ITIL, PMBOK. Experience in multi-vendor solution development delivering requirements to multiple sponsors through a common platform. High level of experience and knowledge to deliver projects and able to personally undertake IT due diligence and delivery activities across the platforms. Technical: Hands on experience on Inventory Workflow Manager (IWM) or Sync Engine. Hands on experience on Cramer Customization on Resource Manager Customization, Home page customization, Web report customization. Customization and implementation experience in Amdocs products Task Engine, Delivery Engine, Sync Engine, Resource Planner. Implementation experience in Cramer Configurator and Metadata Manager. Solution and design experience of Service Delivery and Service Assurance business process. Experience in Cramer federation and Cramer consolidation. Min 2-3 years' experience in Java and Oracle PL/SQL development. Min 2 years in solutions testing In Cramer. Bachelor Degree in Engineering-information technology or equivalent. Technical Project Management experience essential. Develop and publish solution design guidelines and integration plans. Participate in business requirement to technical requirement conversion and drive the project with required documentation (HLD/LLD), solution design and system topology documents. Coordinate development activities and ensure technical specifications are delivered to meet business requirements. Able to effectively present and communicate technical solution designs to senior management, customers and partners/suppliers. Must be able to drive the delivery of functional implementation of a solution. Must be able to own the responsibility for delivery (whether internal delivery or managing 3rd party delivery team). Can do attitude. Should continually strive to improve systems being developed to better business requirements and promote efficiency. Excellent communications skills (both verbal and written). Should be comfortable to work with a team across global time zone and geographies. Should have strong attention to detail Work Experience: Over all 2-4 years' experience in Inventory Management System and customization with third party systems. Java/PL SQL hands on experience. Development and testing experience. Experience in network inventory tools, design, implementation, enhancement, and support of business applications. Show more Show less

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Bengaluru, Karnataka, India

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Seeking motivated CAD engineer • Supporting product and test chip PG’s across various technologies at TI • Supporting Scribe Layout (KERF) Development and Support across various process nodes Job description: • Conversion of product or technology development test chip layouts (LAFF, GDS) into fracture data • Preparing mask orders for shipment to vendors and managing the integrity and archival of data that is generated through this process. (Mask Data Preparation) • Development and Support of Tech/fab-specific scribe recipe development & maintenance to generate reticle floorplan databases • Drive design and development of new software tools, scripts, automation and interfaces for use in the PG/Tapeout process. • Collaborate with & guide various teams within Advanced Technology Development (process development, PDK), EDA and business units to ensure the necessary information is available to complete the PG process. • Ensure consistent application of methodologies and best practices Required Key Skills o Understanding of Layout and basics of fabrication process (FEOL/BEOL) o Knowledge of Mask data tools like Cadence Virtuoso, (Pegasus designrev / Mentor calibredrv o Maintain a high standard for cycle time and quality o Excellent scripting skills with atleast one of PERL, Python, TCL and Cadence skill with special focus on layout automation and geometry processing algorithms Nice to have: o Knowledge of Scribe, KERF, Reticle development o Understanding of ETEST structures, fab alignment structures and photolithography o Understanding of Physical Verification signoff (DRC) and runset flow o Mask Data Preparation tools like Cadence Mask Compose Educational Qualifications Bachelor's degree in Computer Science, Electrical/Electronic Engineering or related field with (2-6) years of Hardware Engineering or related work experience. Show more Show less

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7.0 - 12.0 years

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Hyderabad, Telangana, India

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Job Title: Physical Design Engineer · He/She should be able to do top-level floor planning, PG Planning, partitioning,placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. He/She should have worked on 65nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. · Provide technical guidance, mentoring to physical design engrs. · Interface with front-end ASIC teams to resolve issues. · Low Power Design - Voltage Islands, Power Gating, Substrate-bias techniques. · Timing closure on DDR2/DDR3/PCIE interfaces. · Excellent communication skills. · Strong Back ground of ASIC Physical Design: Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure. · Extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical Design Tools. · Expertise in scripting languages such as PERL, TCL. · Strong Physical Verification skill set. · Static Timing Analysis in Primetime or Primetime-SI. · Good written and oral communication skills. Ability to clearly document plans. · Ability to interface with different teams and prioritize work based on project needs. Experience – 7 to 12 Years Location: Hyderabad/Bangalore Show more Show less

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3.0 - 6.0 years

5 - 13 Lacs

Mumbai

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Who We Are At Kyndryl, we design, build, manage and modernize the mission-critical technology systems that the world depends on every day. So why work at Kyndryl? We are always moving forward – always pushing ourselves to go further in our efforts to build a more equitable, inclusive world for our employees, our customers and our communities. The Role Are you ready to embark on a technical adventure and become a hero to our external and internal users? As Resiliency Orchestration (RO) Administrator at Kyndryl, you'll be part of an elite team that provides exceptional technical assistance, enabling our clients to achieve their desired business outcomes. As a Resiliency Orchestration (RO) Administrator at Kyndryl, you will be responsible for coordinating with Application team members and respective Bank team members to identify deviations and support till closure. You will also coordinate and support respective Subject Matter Experts (SMEs) till closure. Manage incident management of DR activities. Additionally, you will coordinate with the RO Administration team and manage documentation for changes to be done in RO. Maintain the BCP-DR Application Architecture and understanding of customer IT-DR for On-Prime/Off-Prime/Hybrid Infrastructure for the application. You'll be responsible to create a comprehensive disaster recovery plan that outlines strategies, procedures, and responsibilities for recovering systems and data in various disaster scenarios. Regularly review and update the disaster recovery plan to reflect changes in the organization's infrastructure, business processes, and technology. You will assess potential risks and vulnerabilities to the organization's IT systems and infrastructure, conduct a Business Impact Analysis to identify critical business functions, data, and systems, and determine their recovery priorities. You'll be the go-to person for our customers to define Recovery Time Objectives (RTO) and Recovery Point Objectives (RPO) for different business functions and systems, establish metrics to measure the effectiveness and efficiency of the disaster recovery processes, and organize and conduct regular disaster recovery drills and tests to validate the effectiveness of the recovery plan and identify areas for improvement. With your passion for technology, you'll provide world-class support that exceeds customer expectations. As a key member of the RO team, you will continuously monitor systems for potential signs of disaster or impending failures, respond to and coordinate incident response efforts in the event of a disaster or disruptive event, and keep management and stakeholders informed about the status of disaster recovery preparedness, including risks, progress, and improvements. You will also be responsible for designing and building LLD, HLD, and Implementation plans, as well as creating and maintaining technical reports, PPTS, and other documentation. If you're a technical wizard, a customer service superstar, and have an unquenchable thirst for knowledge, we want you to join our team. Your Future at Kyndryl Imagine being part of a dynamic team that values your growth and development. As Technical Support at Kyndryl, you'll receive an extensive and diverse set of technical trainings, including cloud technology, and free certifications to enhance your skills and expertise. You'll have the opportunity to pursue a career in advanced technical roles and beyond – taking your future to the next level. With Kyndryl, the sky's the limit. Who You Are You’re good at what you do and possess the required experience to prove it. However, equally as important – you have a growth mindset; keen to drive your own personal and professional development. You are customer-focused – someone who prioritizes customer success in their work. And finally, you’re open and borderless – naturally inclusive in how you work with others. Required Technical and Professional Expertise 5+ years of experience in Customer Service or Technical Support. Experience in disaster recovery management and DR tools (MANDATORY) Experience in Scripting perl and TCL/Shell/Batch/PowerShell/Expect Scripts or similar scripting languages is must. Knowledge of writing scripts to integrate with different technologies using CLI's /API's. Working knowledge with Linux and any database (Oracle, MySQL). Strong understanding of the Data Protection (Back-up & Recovery, BCP DR, Storage Replication, Database Native Replications, Data Archival & Retention) for application workloads such as MS SQL, Exchange, Oracle, VMware, Hyper-V, azure, AWS etc. Extremely good hands-on experience with Standalone and Clustered UNIX ( AIX/Solaris/HPUX/RHEL/etc .) and windows platform. Preferred Technical and Professional Experience Should be able to Understand and strong knowledge of any Storage Replication technology with various DR Scenarios. Application testing experience may be added advantage Overall IT Infrastructure understanding is an added advantage Cyber (IT) Security related experience is an added advantage Being You Diversity is a whole lot more than what we look like or where we come from, it’s how we think and who we are. We welcome people of all cultures, backgrounds, and experiences. But we’re not doing it single-handily: Our Kyndryl Inclusion Networks are only one of many ways we create a workplace where all Kyndryls can find and provide support and advice. This dedication to welcoming everyone into our company means that Kyndryl gives you – and everyone next to you – the ability to bring your whole self to work, individually and collectively, and support the activation of our equitable culture. That’s the Kyndryl Way. What You Can Expect With state-of-the-art resources and Fortune 100 clients, every day is an opportunity to innovate, build new capabilities, new relationships, new processes, and new value. Kyndryl cares about your well-being and prides itself on offering benefits that give you choice, reflect the diversity of our employees and support you and your family through the moments that matter – wherever you are in your life journey. Our employee learning programs give you access to the best learning in the industry to receive certifications, including Microsoft, Google, Amazon, Skillsoft, and many more. Through our company-wide volunteering and giving platform, you can donate, start fundraisers, volunteer, and search over 2 million non-profit organizations. At Kyndryl, we invest heavily in you, we want you to succeed so that together, we will all succeed. Get Referred! If you know someone that works at Kyndryl, when asked ‘How Did You Hear About Us’ during the application process, select ‘Employee Referral’ and enter your contact's Kyndryl email address.

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