1872 System Verilog Jobs - Page 33

You will be responsible for executing customer projects independently with minimum supervision, guiding team members technically in various fields of VLSI Frontend Backend or Analog design. As an individual contributor, you will take ownership of tasks/modules such as RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc., leading the team to achieve results. Your responsibilities will include completing assigned tasks successfully and on-time within the defined domain(s), anticipating, diagnosing, and resolving problems, coordinating with cross-functional teams as necessary, delivering on-time quality work approved by the projec...

As the owner of Ethernovia's India digital hardware team, you will be responsible for all aspects of digital design and digital verification. This position requires both hands-on technical contribution as well as managerial and technical leadership. You will hire and build your own team to plan and execute the design, verification, and validation of advanced automotive communication semiconductors and systems. Key Qualifications: - BS and/or MS in Electrical Engineering, Computer Science, or related field - Minimum 15+ years combined of ASIC design, verification, and leadership experience - Strong understanding of ASIC design and verification fundamentals and industry standard methodologies ...

Verification Engineer Location: Bengaluru Experience: 3+ Years Employment Type: Full-time Job Responsibilities: Create and carry out detailed plans to verify SoC systems. Design and manage test benches using SystemVerilog and UVM. Test the functionality, performance, and low-power aspects of designs. Identify and fix any design or verification problems on your own. Work with high-speed communication protocols like AXI, PCIe, Ethernet, CXL, and UCIe. Make sure that the design is thoroughly tested and follows the specifications. Skills Required: At least 3 years of experience in verifying SoC systems. Strong knowledge of SystemVerilog, UVM, and scripting languages like Python or Perl. Experien...

ASIC Verification THE ROLE : We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor , you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The V erification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers loca...

Solid Experience in DFT Architecture. The candidate should have experience with ATPG, JTAG, BSCAN, BIST and MBIST flows. Experience on Hierarchical DFT techniques using Pattern Retargeting in Tessent flow Strong knowledge of the Tessent Shell environment and Tessent tools The desired candidate must have specific emphasis on the following tools Test Kompress / Fastscan ATPG, MBIST, Boundary scan. Hands on experience in simulating scan patterns and debugging pattern mismatches during verification process Experience in helping to debug failing scan patterns on the ATE is highly desirable. Hands on knowledge in state-of-the-art EDA tools for DFT, design and verification.(Mentor, Cadence, Synopsy...

SE NIOR SILICON DESIGN ENGINEER Responsibilities: In this role, he/she would be responsible for verification of GPU Design by meeting the demands of the constantly evolving project schedule. The successful candidate will be a member of the GFX team. He/she will demonstrate passion towards design, design verification, be a teammate, a problem solver with independence, creativity, and interpersonal skills. Working with all partners such as lead architects and block design teams to understand features to be implemented and verified. Developing robust test plan for both synthetic testing and real workload trace Debug verification test failures, working with the verification team to accurate defe...

The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. At Amazon, DFT (Design-for-Testability) is a multi-faceted job that involves architecture definition, logic design, verification, test patterns generation, chip bring-up and more. As a DFT Engineer, you will impact ...

Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows Work with teams to enable deployment of new flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as SERDES, etc) and integration Document on new flows and processes for AMS DV Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL a...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Verification of processor-based subsystem ...

Educational Qualification: Bachelor's degree in Electrical Engineering, Computer Science, or a related field. Work Experience : 2 to 4 years of industry experience . Role Description : Pixxel is widely considered to be one of the fastest-growing aerospace start-ups. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of earth observation. Come join our Avionics team and help us build future architectures that will continue to drive us forward in the field. Responsibilities Duties : Participate in next-generation system architecture a full system effort spanning miss...

Role - Micro Loan Officer - Field Officer Reporting To Branch Manager 1. Starting business in a new village a. Village identification within the radius b. Feasibility study of the village based on demographics, activities and financial needs ofthe customers c. Assist the MC-IC in making the village approval 2. Sourcing of business a. Identification of customers and forming of Joint Liability Groups b. Filling up of the application form c. Verification of the residence and business of the customer d. KYC verification e. Pre-disbursement training f. Visiting potential customers in order to develop business 3. Disbursements a. Collection of KYC documents b. Assisting the MC-IC for disbursement ...

SR. DFT ENGINEER SmartSoC is looking for expert DFT engineers for the development, support, maintenance, Implementation, and Testing of complex components of an ASIC/SOC/FPGA/Board. Desired Skills and Experience- 3 – 10year’s experience in DFT Good experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. DFT logic integration and verification. Experience in debugging low coverage and DRC fixes Gate Level ATPG simulation with and without timing. Pattern generation, verification, and delivery to ATE team. Post silicon debug and support on failing patterns. Good experience with tools from Mentor/Synopsis/Cadence. LBIST experience is plus. DFT mode STA and timing closure su...

SENIOR VERIFICATION ENGINEER- SV UVM SmartSoC is looking for smart and enterprisingDesign Verification engineers to come to join us and get an opportunity to do some cutting-edge work and also work in a great environment where work is Always Fun and Exciting. SmartSoCs is currently working on multiple in-house turnkey projects and client site projects and many of our projects involve complete verification from spec to closure including building complete DV environments in SV-UVM. Job Responsibilities- Build SV, SV UVM, OVM based environments. Work with many different networking and other protocols Desired Skills and Experience- 3 to 10 years of experience in IP verification Good experience i...

SR. VERIFICATION ENGINEER – SOC VERIFICATION SmartSoC is looking for smart and enterprising SOC Verification experts to come and work on complex SOC Verification projects. This role will include- Technical execution of SOC Verification projects of complex ARM based SOCs Test Planning, Environment Architecture, SV-UVM environments Desired Skills and Experience- 3 – 10 years experience in Design Verification Excellent Communication and Presentation Skills Expert Knowledge in SOC Verification Expert at Verification – Coverage Driven Test Planning, Architecting Environments, Verification Flow Strong knowledge in System Verilog Knowledge in at least one methodology, OVM, UVM, VMM or RVM Very Good...

RTL DESIGN LEAD ENGINEER The ideal candidate will be required to work on both IP development and integration into SoCs catering to various markets and tech nodes. The job will involve RTL design, front-end tools flow, and SoC integration/porting-related tasks. Desired Skills and Experience- 8+ years of Experience Engineering experience with exposure to front end ASIC tool flows Should be self-driven and independent in tracking and closing tasks with respective holders. In depth knowledge of AHB and bus infrastructures like matrix and fabrics Good understanding of ARM based SoC Architecture Exposure to ARM Cortex A/M integration or support Good understanding of SoC DV methodology Good experie...

TECHNICAL LEAD – DFT SmartSoC is looking for a smart and enterprising leader with expert knowledge in DFT to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking. You will be responsible for leading and managing a team, client communication, and project execution. Job Responsibilities- Lead an internal DFT team, executing projects for an offshore client Manage the team and their technical and leadership growth Manage all interactions with the client Desired Skills and Experience- 7+ years of experience in DFT, mainly Scan Architecture, ATPG & MBIST Experience in planning scan chains, running scan insertion flow Experience ...

VERIFICATION LEAD – IP VERIFICATION SmartSoC is looking for a smart and enterprising leader with expert knowledge in IP Verification to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking as your role will involve leading 7 to 8 projects at one time. You will be responsible for leading and managing a team, client communication, and project execution. This role will include- Lead an internal IP Verification team, executing projects for an offshore client Be responsible for Test Planning, Environment Architecture and Project Management of Multiple Projects Guide team members in verifying IP’s and delivering zero bug IP’s Ma...

Pre-Silicon Validation Engineer Experience4 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Creating test environments, checker strategies, and test generators for validating embedded power management firmware in the SOC Communicating effectively, coordinating and working with firmware developers and SOC integration teams Potentially participating in the debug of failures in silicon and developing new testing strategies to detect these failures on pre-silicon models Mentoring junior members of the team in their development You should have 3-5 years of experience in the following areas: SoC development, verification, or integration using Verilog/Sys...

1-3 years of experience in RTL DFT Verification (DFx). Good Understanding of JTAG IEEE-1149.1 and IJTAG IEEE P1687 standard. Understanding of using ICL and PDL files for verification and knows to create a testbench. Experience in JTAG RTL verification within any UVM. Able to debug simulation fails effectively utilizing debug tools like Synopsis Verdi. Basics of system Verilog, Basics of UVM, and preferably System Verilog assertions Scripting knowledge of TCL/Perl. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

We are seeking a highly skilled and motivated Mixed Signal Verification Engineer to join our team with 8+ years of expeirence. As a Mixed Signal Verification Engineer, you will be responsible for developing and implementing testbenches, checkers, and tests using System Verilog. You will also play a key role in creating and utilizing real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Ownership of Analog/Mixed designs at the chip and/or block level will be an important aspect of this role. Responsibilities: Develop and build Mixed-Signal testbenches, checkers, and tests using System Verilog. Create and utilize real-numbered analog behavioral mode...

Experience: 5 to 12 years Location: Bangalore : We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification, with a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). The primary focus of this role will be on Ethernet protocol verification, ranging from 100G to 800G standards. Key Responsibilities: Ethernet Protocol Expertise Demonstrate expertise in Ethernet standards, encompassing 100G to 800G. In-depth knowledge of specific standards, including 100GE (cl45, cl49, CL82, CL91, CL119), 200GE, 400GE (cl161, cl116), and 800GE (802.df/800ETA). P...

Candidates need to have good experience in Tessant tools Candidates need to have good experience in ATPG pattern generation and simulation(both timing and no timing) Candidates need to have good experience in Scan insertion Experience should be more than 6+ years Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Experience Level: Over 4 years Location: Bangalore Skills: Proficiency in SystemC, C++, and SV/Verilog, coupled with hands-on coding experience in these languages. Strong aptitude for debugging and effective communication. Familiarity with scripting languages (desirable). Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Emulation Engineer Experience3 to 5 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: should have emulation experience working on available platforms such as; Palladium, Veloce, or Zebu, as well as experience with compilation, debug, performance, and throughput tuning Experience using Verilog, VHDL design Experience with C/C++ and System Verilog, UVM verification environments Experience writing scripts using Perl, Python, Makefile Debugging experience using tools like waveform, Verdi, Simvision Strong communication skills and ability to work as a team Description You’ll support multiple emulation environments using the latest emulation techniques (C/C++ DP...

We are seeking a highly skilled and experienced Lead Verification Engineer with expertise in USB/LPDDR and a strong knowledge of Cadence VIP. The ideal candidate will have a deep understanding of low-power design and verification techniques. Responsibilities: Develop and execute comprehensive verification strategies for USB/LPDDR subsystem designs, considering low-power design requirements. Collaborate with cross-functional teams to define verification goals and ensure alignment with project objectives. Design and implement reusable, scalable, and efficient verification testbenches using SystemVerilog/UVM or C based . Leverage Cadence VIP and other verification IPs to accelerate the verifica...