2434 System Verilog Jobs - Page 33

Responsibilities: * Collaborate with cross-functional teams on project deliverables * Ensure compliance with industry standards and customer requirements

General Summary: Job Overview: As a CPU Emulation Engineer, you will work as part of CPU verification team to deliver emulation-based solutions for CPU team. You will work closely with all disciplines of CPU team to help verify and validate high performance CPUs. Role and Responsibilities Work closely with CPU RTL, performance, verification and SW teams to deliver emulation-based solutions. Architect and develop test bench infrastructure in C/C++ and Systemverilog for enabling CPU emulation across different platforms. Develop verification methodology, ensuring scalable and portable environment across simulation and emulation. Debug emulation performance and area issues to efficiently use emu...

General Summary: Excellent Design verification domain expertise. Develop test strategy, TB architecture and test plan for new IPs/new features Develop strategies for re-useable, scalable and enhance Sub system level verification environment Excellent C/System Verilog/Verilog skills to handle C based TB environment Strong skills in debug, post silicon debug-failure re-creation and root cause analysis Scripting proficiency - PERL, Python, for developing applicable automation AMBA, AXI bus protocols Power intent verification, GLS etc. Capable of communicating effectively with all stakeholders across the globe Capable of seeding a new team for new IPs, able to hire and expand the team in experti...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

General Summary: We are seeking a highly skilled and experienced IP Design Engineer to join our dynamic team. The ideal candidate will have a strong background in microarchitecture design, RTL design for complex IPs, and a deep understanding of AMBA or PCIe protocols. This role requires a hands-on approach and a commitment to delivering high-quality, reliable designs. Key Responsibilities: Lead the design and development of ground-up IP solutions, focusing on microarchitecture and RTL design. Collaborate with cross-functional teams to define and implement design specifications and requirements. Ensure the quality and performance of designs through rigorous PLDRC and synthesis processes. Deve...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

InnoPhase Inc., DBA GreenWave Radios, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays. Based in San Diego, California, GreenWave Radios has earned a reputation for delivering power-efficient digital-to-RF solutions. Our commitment to innovation is backed by a robust team of more than 100 talented engineers spread across four R&D facilities worldwide and an extensive portfolio of over 120 global patent filings, underscoring our dedication to ...

InnoPhase Inc., DBA GreenWave Radios, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays. Based in San Diego, California, GreenWave Radios has earned a reputation for delivering power-efficient digital-to-RF solutions. Our commitment to innovation is backed by a robust team of more than 100 talented engineers spread across four R&D facilities worldwide and an extensive portfolio of over 120 global patent filings, underscoring our dedication to ...

Work with system architects to understand the functional and performance requirements of a unit or feature. Define micro-architecture and develop RTL for owned unit and/or feature. Work with verification and physical design teams to ensure that the unit or feature is accurately verified and implemented. Own silicon bring-up in conjunction with post silicon validation and SW teams. Mentor junior engineers and guide them in their work. What we need to see: BS / MS or equivalent experience. 2+ years of experience. Proven knowledge in implementation of complex features or units. Expertise in micro architecture definition, RTL coding using Verilog or System Verilog. Expertise in using design and ...

Role & responsibilities Be part of a team to verify complex system on a chip designs. Interact with design engineers to identify important verification scenarios. Create and enhance constrained-random verification environments using UVM/ SystemVerilog Create complex C/SV tests using reusable test libs. Team player and a mentor who is self-driven, motivated and guides a team of junior engineers Responsible for quality and timeliness of the team output Preferred candidate profile Bachelor's/ master's degree in electrical engineering or computer science, with 5-10 years of relevant experience. Experience with digital system based on AMBA Bus protocols like ACE/AXI/AHB/APB or similar complexity ...

This position is for RTL designer role in DSP processor team. The position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, formal verification, PLDRC, clock domain crossing, and low power techniques. Knowledge and experience of microprocessor integration is a definite advantage. Skills/Experience Must have 3 to 15 years of practical experience with details of RTL development (VHDL and/or Verilog) including: functional and structural RTL design, design partitioning, simulation and regression, collaboration wi...

General Summary: This position is for RTL designer role in DSP processor team. The position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, formal verification, PLDRC, clock domain crossing, and low power techniques. Knowledge and experience of microprocessor integration is a definite advantage. Skills/Experience Must have 3 to 15 years of practical experience with details of RTL development (VHDL and/or Verilog) including: functional and structural RTL design, design partitioning, simulation and regression,...

General Summary: Senior/Lead ASIC Verification Engineers with an experience of minimum 5+ yrs Very strong experience with Verilog, System Verilog and UVM Working experience on development of Verification IP of layered protocol High Speed peripheral Interface protocol PCIe Gen4+ onwards, PCIe Experience is a must Strong knowledge on UVM RAL and common register interfaces such as APB, AHB, AXI (ARM), RAM. Working experience on scripting and automation Strong Past experience of developing verification plan from scratch and testbench development using the detailed Specification and TestPlan from the scratch Strong base knowledge on digital design, blocks/components Strong debugging skills and Go...

General Summary: Work with Qualcomm's engineering team to develop Performance Models for the next generation System-on-chip (SoC) for smartphone, IoT, Auto and other product categories. Work with design team to develop IP Models for Peripherals like PCIe, Ethernet, USB, UFS. Develop the SoC platform and verify the IP/System Level use cases. Work with Hardware & Software teams to understand the design requirements, specification and interface details. You will have opportunity to suggest architecture and design changes which can optimize the overall power/performance/thermal for the chipset. The successful candidate will - Be part of Qualcomm performance team. Some of the key skills which are...

General Summary: Work with Qualcomm's engineering team to develop Performance Models for the next generation System-on-chip (SoC) for smartphone, IoT, Auto and other product categories. Work with design team to develop IP Models for Peripherals like PCIe, Ethernet, USB, UFS. Develop the SoC platform and verify the IP/System Level use cases. Work with Hardware & Software teams to understand the design requirements, specification and interface details. You will have opportunity to suggest architecture and design changes which can optimize the overall power/performance/thermal for the chipset. The successful candidate will - Be part of Qualcomm performance team. Some of the key skills which are...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity ...

We're Hiring Lead Verification Engineer Location: Ahmedabad(Preferable) /Bengaluru Are you passionate about building robust verification environments and working on cutting-edge SoC designs? Join our team and help shape the future of semiconductor innovation! Key Responsibilities • Develop verification plans and test infrastructure for SoC/IP subsystems • Create test benches and test cases using Verilog, System Verilog, UVM, C, and Formal methods • Write embedded C code and CPU-centric tests • Define, implement, and analyse functional coverage Qualifications • M.E./B.E. in Electronics Engineering with 8+ Years of Experience • Strong knowledge of UVM, C testbenches, assertion-based and formal...

As a DFT Engineer, you will be responsible for developing and implementing Design for Test methodologies for complex VLSI designs. You will ensure the testability and manufacturability of our products by working closely with design, verification, and physical design teams, Responsibilities: Develop and implement DFT architectures and strategies for complex SoC designs. Insert and verify DFT features such as scan chains, Built-In Self-Test (BIST) for memory and logic, and boundary scan (IEEE 1149.1/1149.6). Perform ATPG (Automatic Test Pattern Generation) and analyze coverage metrics to ensure high fault coverage. Collaborate with RTL designers to ensure seamless integration of DFT features i...

In this job you will be responsible for specifying and/or micro-architecting digital blocks in advanced mixed-signal circuits. You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. Requirements: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field. 4 to 10 years of experience in RTL designs. Deep knowledge of mixed signal concepts Deep knowledge of RTL design fundamentals Deep knowledge of Verilog and System-Verilog Deep knowledge of front-...

We are looking for a seasoned Senior Design Verification Engineer with 8+ years of experience in verifying complex digital IPs and SoCs. The ideal candidate will have strong expertise in developing UVM-based verification environments and driving functional coverage closure. Key Responsibilities: Develop and maintain constrained-random and directed testbenches using System Verilog/UVM Define verification plans and test strategies based on specifications Write test cases, checkers, and functional coverage models Perform RTL simulations, debug failures, and ensure coverage closure Collaborate with RTL, DV, and firmware teams across verification lifecycle Support gate-level simulation, regressio...

RoleSenior CAD Engineer Experience10+years LocationBangalore Notice PeriodMax 15days preferred Role Overview We are looking for a Senior CAD Engineer to deploy and support our front-end tools, to develop scripts to automate regression and debug flows, and to work along with our design, implementation and verification teams. What You'll Do Deploy and support front-end tools, such as, RTL simulators, low power tools, static RTL checkers such as Lint, CDC/RDC/SDC/DFT, and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) Streamline utilization of compute infrastructure using load distribution tools Ident...

RoleASIC CAD Lead Engineer Experience10+years LocationBangalore Notice PeriodMax 15days preferred Role Overview We are looking for a ASIC CAD Lead Engineer to deploy and support our front-end tools, to develop scripts to automate regression and debug flows, and to work along with our design, implementation and verification teams. What You'll Do Deploy and support front-end tools, such as, RTL simulators, low power tools, static RTL checkers such as Lint, CDC/RDC/SDC/DFT, and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) Streamline utilization of compute infrastructure using load distribution tools...

RoleFront-End RTL Design Automation Engineer Experience10+years LocationBangalore Notice PeriodMax 15days preferred Role Overview We are looking for a Senior CAD Engineer to deploy and support our front-end tools, to develop scripts to automate regression and debug flows, and to work along with our design, implementation and verification teams. What You'll Do Deploy and support front-end tools, such as, RTL simulators, low power tools, static RTL checkers such as Lint, CDC/RDC/SDC/DFT, and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) Streamline utilization of compute infrastructure using load dis...

Role: RTL Design Engineer Experience: 10+years Notice Period: Max 15days preferred Role Overview We are looking for a RTL Design Engineer? to deploy andsupport our front-end tools, to develop scripts to automate regression anddebug flows, and to work along with our design, implementation and verificationteams. What you'll do Deploy and support front-end tools, such as, RTL simulators, low power tools, static RTL checkers such as Lint, CDC/RDC/SDC/DFT, and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) Streamline utilization of compute infrastructure using load distribution tools Identify and priori...

As a RTL Packet Processing Engineer at Eridu AI India Private Limited, a subsidiary of Eridu Corporation, you will be instrumental in shaping and executing cutting-edge Networking IC solutions. Your primary tasks will include: - Designing and architecting solutions for high-speed networking devices with a focus on latency optimization, QoS support, CAMs, and routing tables. - Implementing designs on ASIC platforms, ensuring adherence to industry standards and performance benchmarks, and conducting comprehensive testing and validation. Your responsibilities will also involve: - Analyzing and optimizing pipelining architectures to enhance performance metrics. - Providing support for various ne...