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Sr. Physical Design Engineer

Sr. Physical Design Engineer

Amazon

10 - 15 years

11 - 15 Lacs

bengaluru

Posted:6 hours ago| Platform:

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Skills Required

synthesis python physical design semiconductor dfm rtl engineering fusion rtl design functional verification design compiler dft design process hardware design shell scripting design specifications perl tcl communication skills architecture

Work Mode

Work from Office

Job Type

Full Time

Job Description

Collaborate with architecture, timing, and logic design teams making a crucial impact on delivering cutting edge & Low power SOCs.
Perform I/O, bump & RDL (redistribution layer) planning, hard IP integration, partitioning, pin and feedthrough planning, repeater insertion, power grid generation. Perform special interface, and interconnect planning, bus routing, sequential pipeline planning and top-level design for testability (DFT). Be responsible for driving efficiency and quality improvements to the overall FC methodology including floorplan optimization for better utilization/QoR/runtime and timing and physical aware feedthrough/pin placement. Be responsible for coordinating collateral handoffs between the FC Design team and other functions within back-end design such as Clocking, Power Delivery and Partition synthesis/APR. Drive physical design and timing closure including FEV, LVS, DRC, and reliability verification (IR drop / EM analysis). Supervise and mentor other engineers Bachelor s degree or higher in EE, CE, or CS 10+ years or more of practical semiconductor implementation experience Scripting experience with Perl, Python, tcl, shell and drive to automate flows Proficiency in chip front-end and back-end implementation tools such as Fusion compiler, Design Compiler, ICC2 or Innovus and Primetime, Tempus Must have good communication and analytical skills. Should be able to work closely with IP Design teams and Backend Physical Design teams across multiple sites. MS/PhD in Computer Science, Electrical Engineering, or related field Experience with memory compiler Experience with formal equivalence Cadence Conformal/Synopsys Formality Have in depth knowledge of entire design process from Design specification, defining architecture, micro-architecture, RTL design and functional verification Experience with DFT and DFM flows

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Sr. Physical Design Engineer