Senior Design Verification Engineer

5 years

0 Lacs

pune maharashtra india

Posted:13 hours ago| Platform: Linkedin logo

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Skills Required

design verification signal storage networking strategies test uart ethernet simulations power analyze verilog code synopsys cadence integration ip

Work Mode

On-site

Job Type

Full Time

Job Description

About Iravan

Iravan Technologies, headquartered in Pune, is a semiconductor design services company specializing in Mixed-Signal, Digital, and Formal Verification. We partner with leading companies across Storage, Networking, Aerospace, Automotive, Defense, and other critical industries to deliver advanced semiconductor solutions.


Designation: Senior Design Verification Engineer

Experience: 5+ Year

Location: BLR/Pune/AHD

Vacancies :02

JD-

  • Manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans.
  • Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR and HBM
  • Experience on Gate-level simulations, and power-aware verification using Xprop and UPF is an added advantage
  • Analyze and implement System Verilog assertions and coverage (code, toggle, functional).
  • Demonstrate dedication, hard work, and commitment to achieving project goals and deadlines.
  • Experience with verification tools from Synopsys and Cadence, including VCS and Xsim. Integration of third-party VIPs (Verification IP) from Synopsys and Cadence.


Interested candidates may share resumes at careers@iravan.tech.

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