Posted:4 weeks ago|
Platform:
On-site
Full Time
Job Description: No. of Positions: 2 Location – Hyderabad (WFO) Experience – 5 to 7 Years & 7 to 10 Years Responsibilities : • Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. • Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. • Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. • Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. • Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Core Requirements : • Basic understanding of CMOS and gate level circuit designs • Familiarity with SPICE • Familiarity with Verilog simulations • Good communication skills and ability to work well in a team Preferred Qualities : • Analytical capability for complex gate level circuit designs • Experience in SystemVerilog, PLI coding • Experience in UVM Test Bench • Experience in DRAM, SRAM or other memory related fields • Experience in AMS verification and co-sim  Experience Level 5+ years Show more Show less
Anubudh
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My Connections Anubudh
Hyderabad, Telangana, India
Salary: Not disclosed
Hyderabad, Telangana, India
Salary: Not disclosed