RTL Verification Engineer - System Verilog

You are invited to join our team as a skilled Hardware Verification Engineer based in Hyderabad. In this role, you will be instrumental in contributing to the development of cutting-edge hardware solutions. Your primary responsibilities will include developing and maintaining System Verilog /UVM test-benches at various levels, defining test plans and specifications, engaging in verification environment architecture, collaborating with design teams, generating comprehensive documentation, performing hardware testing, and contributing to FPGA-based verification. Key Responsibilities: - Develop and maintain System Verilog /UVM test-benches at block, subsystem, and top levels. - Define and drive test plan, test specification, and test execution for complex hardware modules. - Engage in verification environment architecture and methodology development. - Collaborate with design teams to ensure functional correctness, coverage, and debugging of RTL code. - Generate and maintain comprehensive documentation including user guides, test plans, test specifications, and test reports. - Perform hardware testing using test equipment such as logic analyzers, traffic generators, and signal analyzers. - Contribute to FPGA-based verification using Xilinx tools and technology. Required Skills & Experience: - Strong experience in SystemVerilog and UVM-based verification. - Proficiency in verification of standard protocols such as Ethernet, PCIe, SPI, I2C, USB. - Hands-on experience with hardware test equipment like logic analyzers, oscilloscopes, and traffic generators. - Experience with Xilinx FPGA verification and toolchains. - Strong debugging skills at device, signal, and board levels. - Familiarity with scripting languages like Perl, Python, or TCL. - Excellent analytical, problem-solving, and communication skills. - Ability to work effectively in a collaborative and fast-paced development environment. Additional Relevant Skills (Preferred/Bonus): - Experience with code and functional coverage collection and analysis tools (e.g., VCS, Questa, Incisive). - Proficiency with constraint random verification and assertion-based verification (ABV). - Familiarity with simulation acceleration, emulation (e.g., Palladium, Veloce), or formal verification tools. - Understanding of SoC architecture, DMA, memory controllers, and bus interfaces (AXI, AHB, APB). - Exposure to version control systems such as Git, Perforce, and CI/CD verification automation. - Experience working in Agile/Scrum environments. - Exposure to cloud-based verification environments or remote simulation tools. - Familiarity with coverage-driven verification (CDV) and verification management tools like JasperGold, Specman, or Cadence vManager. If you choose to join us, you will have the opportunity to work on next-generation products in a technically driven team, with growth opportunities in both frontend and backend design flows. You will also enjoy a supportive work environment with access to advanced labs and equipment.,