Project Lead

Logic Fruit Technologies

10 - 20 years

20 - 35 Lacs

gurugram bengaluru

Posted:11 hours ago| Platform:

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Skills Required

protocols fpga design rtl implementation rtl coding digital design system development system integration testing hw/sw integration usb debugging pcle uart multiple clock domains vhdl fpga editor dsp algorithms vivado verilog ethernet altera team leading modelsim xilinx

Work Mode

Hybrid

Job Type

Full Time

Job Description

Role & responsibilities

You will
develop RTL code
to implement
FPGA-based digital designs
, working from
specification stage through to system integration
. Projects will range from Mid to multi-million gates. Most projects include designing logic for latest generation of
high speed serial protocols
like PCIe gen5, Gen6, USB 3.2 Ethernet 10G/25G/100G,
digital signal processing and control logic
(bus interfaces and state machines)
Understand the customer requirements and product definition
Define architecture and
detailed design spec based on requirements and various trade-offs
Micro-architecture and
coding of assigned module in VHDL/Verilog
Write test bench for verifying design
for complete scenario coverage
Implementation of the design for porting on FPGA
after required optimization based on available resources and timing closure requirement
FPGA debugging and HW/SW integration

Preferred candidate profile

9+ years of experience,
including successful completion of FPGA based projects
Coding experience in
VHDL and/or Verilog
is must
Experience targeting
Xilinx and/or Altera FPGAs
required
Familiarity with tools like
Modelsim, Questasim, Xilinx Vivado, Planahead, Altera Quartus
etc. is required
Familiarity with
debugging tools
like Chipscope, Signal Tap, Logic analyzer, Scope, FPGA editor
Implementation of designs with
multiple clock domains
is required
Thorough understanding of appropriate
coding styles for FPGAs
, and
trade-offs for density and speed
Experience in
RTL implementation of DSP algorithms
will be appreciated
Experience in
development of PCIe, USB, Ethernet transceivers, DDRx, ADC, DAC, AMBA-AXI, SRAM, USB, UART, I2C, SPI
will be appreciate

Note - Position Open for FPGA based background profiles not for Hardware or Verification

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