Principal verification Engineer

Role : Principal verification Engineer

Experience : 12+ Years

Location : Bangalore

WFO and 5 Days Full Time

Mandatory: Subsystem / Low power

Responsibilities & Competencies

Job Duties

• Lead a team of 7–10 verification engineers in the planning, development, and execution of SoC and subsystem-level verification activities for next-generation AI chiplets.
• Translate design specifications into detailed verification strategies and test plans ensuring complete coverage of functional, power, and performance aspects.
• Architect and develop UVM-based verification environments and reusable components for complex SoC and subsystem verification.
• Drive low-power and gate-level verification, including power intent validation (UPF/CPF) and multi- domain power sequencing checks.
• Collaborate closely with design, architecture, and validation teams to ensure design quality, seamless integration, and efficient debug.
• Review, mentor, and guide team members in technical problem-solving, coverage closure, and efficient debug methodologies.
• Contribute to process improvements, verification automation, and methodology enhancements to improve productivity and verification quality.

Competencies

• Proven expertise in advanced verification methodologies (UVM, OVM, or similar).
• Strong understanding of SoC and subsystem architecture, including interconnects like AXI, AHB, or proprietary high-speed buses.
• Solid background in HVLs (SystemVerilog, SystemC) and HDLs (Verilog/VHDL); scripting skills in Perl, Python, or Shell for automation.
• Deep understanding of low-power verification methodologies, power intent formats (UPF/CPF), and coverage-driven verification techniques.
• Strong analytical and debugging abilities using industry-standard tools (Questa, VCS, Verdi, DVE, or similar).
• Hands-on experience with coverage-based, assertion-based, and formal verification techniques.
• Excellent leadership, organizational, and communication skills to manage a diverse technical team.
• Self-motivated, proactive problem solver with the ability to lead complex projects independently in a fast-paced environment.

Qualifications (Requirements)

• Bachelor’s or Master’s degree in Electronics & Communication, Computer Engineering, or a related field.
• 12+ years of experience in SoC/Subsystem Verification, including testbench architecture, test plan development, and functional verification of complex designs.
• Demonstrated experience leading verification teams and driving end-to-end verification execution for high-performance SoCs or chiplets.
• Strong exposure to AI, Compute, or Data-Center class designs with emphasis on subsystem-level verification, coherency, and power management.
• Proficiency with simulation and debug tools such as Questa, VCS, Verdi, or similar EDA toolchains.
• Familiarity with state-of-the-art verification techniques such as assertion-based verification, formal verification, and hardware-assisted verification.

Job Type: Full-time

Work Location: In person