Job
Description
You will be working as a Qualcomm Hardware Engineer, where your main responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. To be eligible for this role, you must have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with at least 3 years of experience in Hardware Engineering. Alternatively, a Master's degree with 2+ years of experience or a PhD with 1+ year of experience will also be considered. **Key Responsibilities:** - Lead a team of engineers in the implementation and Low Power domain for Display Sub-System - Handle multiple time-critical and complex projects - Review PTPX results for DC and PD netlists - Communicate effectively with stakeholders - Collaborate with cross-functional teams - Focus on improving execution efficiency and optimizations in area, power, and performance - Grow the team in technical depth and size - Innovate and bring fresh ideas - Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation - Develop signoff quality constraints and power intent constraints - Work on RTL Lint, CLP, MEMBIST, DFT DRC - Power Cleanup and understanding of UPF/CLP - Correlate Power domain crossings in Synthesis - Solve CLP issues during Synthesis - Develop TCL scripts - Hands-on experience with Synopsys DCG/Genus/Fusion Compiler and Prime Time - Experience with Cadence Conformal LEC and Conformal Low Power, UPF development - Understand RTL development or Physical Design **Qualifications Required:** - Bachelor's or Master's degree in engineering with 5-9 years of experience - Strong understanding of Physical Synthesis and Synthesis methodologies - Experience with timing constraints, STA, timing closure, and pipelining - Familiarity with low-power design using UPF - Proficiency in scripting languages like Perl, Python, TCL - Knowledge of power optimization flows such as clock gating - Ability to work independently and collaborate with design, DFT, and PD teams - Handle ECOs, formal verification, and maintain high-quality matrix Please note that Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you need accommodations during the application/hiring process, you may contact disability-accommodations@qualcomm.com.,
