Physical Design Technical Manager

Location:

Job Summary

Physical Design Technical Manager

Key Responsibilities

Technical Manager Responsibilities (Added Pointers)

• Own project planning, resource allocation, and delivery for multiple blocks or full-chip programs.
• Conduct technical reviews, approve methodologies, and ensure engineering best practices are followed.
• Drive risk assessment, mitigation planning, and decision-making for schedule, tool, and design challenges.
• Interface with customers, stakeholders, and leadership teams to communicate technical status, risks, and dependencies.
• Guide juniors and mid-level engineers in skill development, career growth, and performance improvement.
• Establish, evaluate, and improve PD flows, ensuring scalability, robustness, and quality.
• Identify gaps in tools/methodologies and work with CAD teams for enhancements.

Leadership Responsibilities

• Lead and mentor the Physical Design engineering team while also contributing as an individual contributor.
• Drive execution, quality, and delivery for block-level and full-chip physical design activities.
• Review design challenges with stakeholders and provide technical direction for closure.
• Coordinate cross-functionally and communicate progress, risks, and decisions to management.

Technical Responsibilities

• Own and execute end-to-end physical design tasks:
• Floorplanning
• Power planning
• Placement
• Clock Tree Synthesis (CTS)
• Routing
• Physical Verification (LVS/DRC)
• Achieve timing closure across multiple PVT corners using STA methodologies.
• Perform IR drop and EM analysis, driving fixes for power integrity.
• Debug PnR, timing, SI, and physical verification issues and provide RCA-based solutions.
• Work closely with RTL, DFT, Packaging, CAD, and Manufacturing teams for seamless integration.
• Contribute to PD flow and automation enhancements to improve QoR, performance, and schedule.

Required Qualifications

• B.Sc. / M.Sc. in Electrical Engineering or related field.

• 13 to 20+ years

  of hands-on experience in ASIC Physical Design with a strong tape-out track record.
• Expertise with industry-standard EDA tools:
• Innovus / ICC2
• PrimeTime
• Voltus / RedHawk
• Calibre (DRC/LVS)
• Strong understanding of:
• Timing closure
• Signal integrity
• IR drop / EM analysis
• Physical verification flows
• Proficiency in scripting (TCL, Python, Perl) for automation.
• Excellent technical leadership, problem-solving, communication, and cross-team coordination skills.

Preferred Qualifications

• Experience with

  hierarchical design methodologies

  .
• Exposure to

  low-power (UPF-based)

  design techniques.
• Familiarity with

  advanced process nodes

  (7nm, 5nm, 3nm, or below).
• Experience leading multi-site or cross-functional engineering teams.

  Role & responsibilities