1693 Physical Design Jobs - Page 19

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your typical day will involve collaborating with team members to ensure the successful implem...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your day will involve collaborating with team members to ensure the successful implementation...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, your typical day involves analyzing, designing, coding, and testing various components of application code across multiple clients. You will engage in maintenance and enhancement tasks, ensuring that the software remains efficient and effective. Coll...

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test ca...

We are seeking an experienced ASIC Physical Designer to join our team in Hyderabad. The successful candidate will be responsible for designing and implementing complex ASICs, ensuring timely and efficient physical design closure.

We are looking for Women coming with Semicon experience - these people should be available to attend the drive on October 28th 2025 at RENESE OFFICE Address : , East West Metro Corridor, Old Baiyyappanahalli, Maruthi Sevanagar, Bengaluru, Karnataka 560038 We are seeking an expert to lead a workshop focused on the evolving landscape of semiconductor design . The session will cover: AI-assisted EDA tools and their role in accelerating innovation. The growing demand for multidisciplinary engineering talent . Best practices to manage design complexity in fast-paced innovation cycles. Insights into the future skills and workforce readiness for chip design. Ideal Speaker Profile : 12+ years of exp...

Hands-on technical, finfet expertise (nodes 12nm or below) and manage a team of 5+ members. Proven track record of managing a team of >5 members. Experience within the service industry. Performs layout and takes corrective actions in such a way that the final result meets all requirements as stated in the Design document, section layout, including all remarks from review, the customer and back annotation. Performs layout in such a way that the final result meets all general layout guidelines and matches 1-to-1 with parameter devices and hierarchy used in simulations. Create floorplan Performs DRC and takes corrective actions if needed until DRC is error free Performs LVS and takes corrective...

you'll be an integral part of our design process from brainstorming ideas to executing them across mediums, ensuring everything we put out looks, feels, and communicates right. Your work will scale our brand in both physical and digital spaces, and you'll collaborate closely with the team to shape end-to-end design solutions. Here s a taste of what you'll be handling: Brand Development & Design System Help shape and maintain our evolving brand identity. Brand Collateral Development & Management From brochures to pitch decks, ensure consistency everywhere. Marketing Ads (Digital + Physical) Design creative that works across billboards, screens, and scrolls. Landing Pages for Campaigns Build c...

Backup and recovery processes and tools Database knowledge (logical and physical design) Experience with troubleshooting database performance issues and query tuning concepts Perform data management tasks as required: loading / unloading, updating, restoring and removing data to ensure that database is accurate as a data source. Perform Database Maintenance activities like Adhoc Reorgs, Runstats etc on demand from the application teams, as we'll as monitor the scheduled maintenance activities. Monitor and manage Space: Purge obsolete data and reclaim space Identify and troubleshoot databases issues with high priority. Monitor database backups and Database maintenance jobs. Troubleshoot job f...

Expertise in ASIC PD. Expertise in digital physical design Expertise in working with 3nm & 5nm technology nodes Expertise in EDA synthesis, APR, STA tools and methodologies Expertise in one or more of the following tools ICC, ICC2, Innovus, Olympus Working knowledge of one or more of the following tools Primetime, Calibre, and Red hawk Expertise in working with multi modes and multi corners STA Working Knowledge of multiple power planes and multiple VT libraries Basic domain knowledge of EM, IR, RV analysis, Noise and Formal Equivalence Verification Good at scripting languages PERL, TCL, shell Worked on at least 2 tape ins of moderate to high speed designs with multiple power planes Debug, f...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ PMTS SILICON DESIGN ENGINEER THE PERSON: You have a passion for modern, complex processor arc...

DFT Engineer (MBIST) in Bangalore, KA, India Description Invent the future with us. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team we d love to have you apply. Come invent the future with u...

Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering. Expertise in Analog Layout design Expertise in planar technology node / higher node (180nm - 28nm) is mandatory Expertise in EMIR analysis, ESD, antenna and related layout solutions Knowledge of advanced technology nodes (7nm & below) Good understanding of advanced semiconductor technology process and device physics Full-custom circuit layout/verification and RC extraction experience Familiar with Cadence Virtuoso environment and various industry physical verification tools (DRC,LVS,DFM) Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Taiwan and Vietnam are...

As a member of the Computing & Graphics (CG) SoC Architecture team, this SoC Power Management Design Engineer will develop and design custom silicon for gaming consoles, datacenter, client, or embedded computer vision SOCs and related platforms. In this role, you will work with the lead SoC architect to define customer-specific architectures and contribute to product specifications, micro-architecture specifications, performance and power trade-offs. The role will work from early concept development through the development phases to final production. THE PERSON: In this role, you will collaborate with a network of expert architects and designers around the world where collaboration and commu...

Backup and recovery processes and tools Database knowledge (logical and physical design) Experience with troubleshooting database performance issues and query tuning concepts Perform data management tasks as required: loading / unloading, updating, restoring and removing data to ensure that database is accurate as a data source. Perform Database Maintenance activities like Adhoc Reorgs, Runstats etc on demand from the application teams, as well as monitor the scheduled maintenance activities. Monitor and manage Space: Purge obsolete data and reclaim space Identify and troubleshoot databases issues with high priority. Monitor database backups and Database maintenance jobs. Troubleshoot job fa...

We are currently seeking a highly skilled Lead Physical Design Engineer to join our team on a temporary basis. As the Lead Physical Design Engineer, you will be responsible for overseeing the physical design process, ensuring the successful implementation of complex integrated circuits. Key Responsibilities: - Lead the physical design team in developing and implementing cutting-edge design methodologies - Collaborate with cross-functional teams to ensure project milestones are met - Perform floorplanning, placement, routing, and physical verification tasks - Optimize design for performance, power, and area - Troubleshoot and resolve design issues in a timely manner Qualifications: - Bachelor...

Job Specs : Work with design and architecture teams to define and generate timing constraints that specify the desired timing requirements for the design. Set up and configure STA tools ( PrimeTime, StarRC, Tempus, Innovus and QRC ) for the analysis, including library characterization, delay models, and clock definitions Perform static timing analysis to evaluate setup and hold times, clock-to-q delays, and other timing metrics. Ensure that the design meets timing requirements for various corners and operating conditions (e.g., process, voltage, temperature variations). Identify and analyze asynchronous signals crossing between different clock domains to ensure proper synchronization and to ...

Job Description Company Description Genisup India Private Limited is a semiconductor and system design company based in Bangalore. We specialize in Foundational IP Fabless Design, Semiconductor Product Engineering, and IoT solutions. This position is for one of our key global semiconductor clients. Role Description Genisup is seeking a talented VLSI Analog Custom Design Automation Engineer to join our team in Bangalore. The selected candidate will be part of a central CAD team supporting global product design teams working on advanced technology nodes (22nm to 3nm). This role involves driving VLSI CAD flow/methodology development and automation for analog and mixed-signal design environments...

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning (for hierarchical designs) , placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks and be able to fix the violations . S hould have worked on 4 5nm , 28nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design eng inee rs. Interface with front-end ASIC teams to resolve issues. Excellent comm...

Minimum qualifications: Bachelors degree in Electrical Engineering or equivalent practical experience, 5 years of experience with advanced design, including clock/voltage domain crossing, Design for Testing (DFT), and low power designs, Experience with System on a Chip (SoC) cycles, Experience in high-performance, high-frequency, and low-power designs, Preferred qualifications: Masters degree in Electrical Engineering, Experience in coding with System Verilog and scripting with TCL, Experience with VLSI design in SoC or multiple-cycles of SoC in ASIC design, Experience with layout verification and design rules, About The Job Be part of a team that pushes boundaries, developing custom silicon...

Excellent Communication Proficiency in collaboration and delegation of duties Hands on - Google sheet, forms & drives Flexible with work timings & Male candidate is preferred Follow ups on tasks and activity.

As a Lead Application Engineer at Cadence, you will have the opportunity to work on cutting-edge technology in an environment that fosters creativity, innovation, and impact. Cadence values the physical and mental well-being of its employees, career development, learning opportunities, and celebrates success. The One Cadence - One Team culture promotes diversity, equity, and inclusion to drive innovation and growth. You will collaborate with a diverse team of passionate individuals dedicated to exceeding customer expectations. **Job Summary:** You will be a part of the GCS Organization for the DSG (Digital & Sign-off Group), partnering with global Cadence customers to offer post-sales techni...

Role Overview: You will be part of a team that develops custom silicon solutions for Google's direct-to-consumer products, contributing to the innovation of products used by millions globally. Your expertise will play a crucial role in shaping the next generation of hardware experiences, focusing on delivering high performance, efficiency, and integration. The Platforms and Devices team at Google works on various computing software platforms and first-party devices, combining Google AI, software, and hardware to create innovative user experiences worldwide. Key Responsibilities: - Contribute to Central Processing Unit (CPU) front-end designs, emphasizing microarchitecture and Register-Transf...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: GPU Design and micro-Architect who will work across functions like GPU architecture and Systems in design and micro-architecture of the next generation GPU features. Work very closely with Architecture teams to come up with micro-architecture and hardware specification for features Design and RTL ownership Work very closely with Design Verification teams to review test plans and sign off the validation of all design features across products Work closely with physical design teams to achieve the right power, performance and area metrics for the GPU blocks Minimum Qualifications: Bachelor's degree in Compute...

Seeking a highly experienced Physical Design Methodology/CAD manager to lead/build a team in Bangalore, India. Key Responsibilities Looking for someone with a blend of technical expertise and strong management skills Experience managing/building a team and ability to manage timelines and multiple on-going projects Expertise in PDK enablement and physical design concepts Strong understanding of the RTL2GDS concepts and methodology and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus) Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies Design/System level experience with DTCO and PPA analysis Hands-on expertise...